Matches 1 - 35 out of 35
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7432599 Memory module having interconnected and stacked integrated circuits  
A multi-chip memory module may be formed including two or more stacked integrated circuits mounted to a substrate or lead frame structure. The memory module may include means to couple one or more...
7372129 Two die semiconductor assembly and system including same  
A semiconductor die assembly includes a substantially planar lead frame including a die paddle and a plurality of lead fingers, a first semiconductor die secured by an active surface thereof to the...
7368320 Method of fabricating a two die semiconductor assembly  
A semiconductor die assembly includes a substantially planar lead frame including a die paddle and a plurality of lead fingers, a first semiconductor die secured by an active surface thereof to the...
7352199 Memory card with enhanced testability and methods of making and using the same  
By decreasing the amount of card substrate required in a memory card to support the actual memory unit, the test interface of the card, which is usually removed before final assembly of the card,...
7329565 Silicide-silicon oxide-semiconductor antifuse device and method of making  
An antifuse contains a first silicide layer, a grown silicon oxide antifuse layer on a first surface of the first silicide layer, and a first semiconductor layer having a first surface in contact...
7319053 Vertically stacked field programmable nonvolatile memory and method of fabrication  
A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells....
7283403 Memory device and method for simultaneously programming and/or reading memory cells on different levels  
A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells....
7265000 Vertically stacked field programmable nonvolatile memory and method of fabrication  
A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells....
7250646 TFT mask ROM and method for making same  
There is provided a monolithic three dimensional TFT mask ROM array. The array includes a plurality of device levels. Each of the plurality of device levels contains a first set of enabled TFTs and...
7190602 Integrated circuit incorporating three-dimensional memory array with dual opposing decoder arrangement  
A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells....
7160761 Vertically stacked field programmable nonvolatile memory and method of fabrication  
A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells....
7157314 Vertically stacked field programmable nonvolatile memory and method of fabrication  
A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells....
7129538 Dense arrays and charge storage devices  
There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is...
7005730 Memory module having interconnected and stacked integrated circuits  
A multi-chip memory module may be formed including two or more stacked integrated circuits mounted to a substrate or lead frame structure. The memory module may include means to couple one or more...
6992349 Rail stack array of charge storage devices and method of making same  
There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is...
6940109 High density 3d rail stack arrays and method of making  
A semiconductor device comprises two transistors where a gate electrode of one transistor and source or drain of another transistor are located in the same rail. A monolithic three dimensional...
6897514 Two mask floating gate EEPROM and method of making  
There is provided a floating gate transistor, such as an EEPROM transistor, and method of making the transistor using two masking steps. The method of making a transistor includes patterning a...
6888750 Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication  
A nonvolatile memory array is provided. The array includes an array of nonvolatile memory devices, at least one driver circuit, and a substrate. The at least one driver circuit is not located in a...
6881994 Monolithic three dimensional array of charge storage devices containing a planarized surface  
There is provided a monolithic three dimensional array of charge storage devices which includes a plurality of device levels, wherein at least one surface between two successive device levels is...
6853049 Silicide-silicon oxide-semiconductor antifuse device and method of making  
An antifuse contains a first silicide layer, a grown silicon oxide antifuse layer on a first surface of the first silicide layer, and a first semiconductor layer having a first surface in contact...
6844616 Multi-chip semiconductor package structure  
A multi-chip semiconductor package structure. The structure includes two chips and two lead frames. The leads on one of the lead frames have inner leads at one end and joint sections at the other...
6843421 Molded memory module and method of making the module absent a substrate support  
An improved memory module and method of manufacture are presented. The memory module takes on the same outer dimensions as conventional memory cards. The memory module includes an integrated...
6841858 Leadframe for die stacking applications and related die stacking concepts  
A leadframe design (and method of forming the leadframe design), comprising: an inner die pad structure lying in a first plane; and an outer die pad structure supported by outer tie bars and...
6841813 TFT mask ROM and method for making same  
There is provided a monolithic three dimensional TFT mask ROM array. The array includes a plurality of device levels. Each of the plurality of device levels contains a first set of enabled TFTs and...
6780711 Vertically stacked field programmable nonvolatile memory and method of fabrication  
A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells....
6737675 High density 3D rail stack arrays  
A semiconductor device comprises two transistors where a gate electrode of one transistor and source or drain of another transistor are located in the same rail. A monolithic three dimensional...
6731011 Memory module having interconnected and stacked integrated circuits  
A multi-chip memory module may be formed including two or more stacked integrated circuits mounted to a substrate or lead frame structure. The memory module may include means to couple one or more...
6706967 Lead-less semiconductor device with improved electrode pattern structure  
A semiconductor device includes an insulating substrate having a first main face which is sealed with a sealing material and at least a set of input and output electrode patterns provided on the...
6689644 Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication  
A three-dimensional, field-programmable, non-volatile memory includes multiple layers of first and second crossing conductors. Pillars are self-aligned at the intersection of adjacent first and...
6627990 Thermally enhanced stacked die package  
A stacked die design, and a method of forming the same, comprising: a substrate having a lower surface and an upper surface; a lower die connected to the substrate; a thermally conductive metal...
6624485 Three-dimensional, mask-programmed read only memory  
A 3-dimensional read only memory includes vertically stacked layers of memory cells. Each of the memory cells includes a mask programmed insulating layer, a pair of diode components, and a pair of...
6593624 Thin film transistors with vertically offset drain regions  
There is provided a semiconductor device, such as a TFT, with a vertical drain offset region. The device contains a substrate having an upper first surface, a semiconductor channel region of a...
6583511 Semiconductor device and a method of producing the same  
A laminated semiconductor chip assembly fabricated by fixing back surfaces of first and second semiconductor chips, respectively having principal surfaces and back surfaces, to each other. Each of...
6525953 Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication  
A three-dimensional, field-programmable, non-volatile memory includes multiple layers of first and second crossing conductors. Pillars are self-aligned at the intersection of adjacent first and...
6483736 Vertically stacked field programmable nonvolatile memory and method of fabrication  
A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells....
Matches 1 - 35 out of 35