|
Match
|
Document |
Document Title |
|
|
7432600 |
System having semiconductor component with multiple stacked dice
A system includes a semiconductor component having a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the...
|
|
|
7429529 |
Methods of forming through-wafer interconnects and structures resulting therefrom
Methods for forming conductive vias or through-wafer interconnects in semiconductor substrates and resulting through-wafer interconnect structures are disclosed. In one embodiment of the present...
|
|
|
7419299 |
Methods of sensing temperature of an electronic device workpiece
The present invention includes electronic device workpieces, methods of semiconductor processing and methods of sensing temperature of an electronic device workpiece. In one aspect, the invention...
|
|
|
7411304 |
Semiconductor interconnect having conductive spring contacts
An interconnect for testing a semiconductor component includes a substrate, and interconnect contacts on the substrate configured to electrically engage component contacts on a semiconductor...
|
|
|
7402516 |
Method for making integrated circuits
Integrated circuits, the key components in thousands of electronic and computer products, include interconnected networks of electrical components. The components are typically wired, or...
|
|
|
7391117 |
Method for fabricating semiconductor components with conductive spring contacts
An interconnect for testing a semiconductor component includes a substrate, and interconnect contacts on the substrate configured to electrically engage component contacts on a semiconductor...
|
|
|
7388294 |
Semiconductor components having stacked dice
A semiconductor package component includes a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the secondary...
|
|
|
7388159 |
Printed wiring board and method for manufacturing the same
A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film...
|
|
|
7385146 |
Printed wiring board and method for manufacturing the same
A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film...
|
|
|
7378737 |
Structures and methods to enhance copper metallization
Disclosed structures and methods inhibit atomic migration and related capacitive-resistive effects between a metallization layer and an insulator layer in a semiconductor structure. One exemplary...
|
|
|
7371976 |
Printed wiring board and method for manufacturing the same
A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film...
|
|
|
7371676 |
Method for fabricating semiconductor components with through wire interconnects
A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also...
|
|
|
7368378 |
Methods for making integrated-circuit wiring from copper, silver, gold, and other metals
Integrated circuits, the key components in thousands of electronic and computer products, include interconnected networks of electrical components. The components are typically wired, or...
|
|
|
7361849 |
Printed wiring board and method for manufacturing the same
A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film...
|
|
|
7347702 |
Contact carriers (tiles) for populating larger substrates with spring contacts
An interconnection apparatus and a method of forming an interconnection apparatus. Contact structures are attached to or formed on a first substrate. The first substrate is attached to a second...
|
|
|
7345493 |
Wafer-level burn-in and test
Techniques for performing wafer-level burn-in and test of semiconductor devices include a test substrate having active electronic components such as ASICs mounted to an interconnection substrate or...
|
|
|
7345358 |
Copper interconnect for semiconductor device
An improved wire bond is provided with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductive lead of a TAB tape bond with the bond pad of a...
|
|
|
7338889 |
Method of improving copper interconnects of semiconductor devices for bonding
An improved wire bond is provided with the bond pads of semiconductor devices and the lead fingers of lead frames or an improved conductive lead of a TAB tape bond with the bond pad of a...
|
|
|
7335994 |
Semiconductor component having multiple stacked dice
A semiconductor package component includes a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the secondary...
|
|
|
7325302 |
Method of forming an interconnection element
A method of forming an interconnection element. In one embodiment, the interconnection element includes a first structure and a second structure coupled to the first structure. The second structure...
|
|
|
7314821 |
Method for fabricating a semiconductor interconnect having conductive spring contacts
An interconnect for testing a semiconductor component includes a substrate, and interconnect contacts on the substrate configured to electrically engage component contacts on a semiconductor...
|
|
|
7301190 |
Structures and methods to enhance copper metallization
Disclosed structures and methods inhibit atomic migration and related capacitive-resistive effects between a metallization layer and an insulator layer in a semiconductor structure. One exemplary...
|
|
|
7291551 |
Sub-milliohm on-chip interconnection
A method to form a very low resistivity interconnection in the manufacture of an integrated circuit device is achieved. A bottom conductive layer is formed overlying a substrate. The bottom...
|
|
|
7285196 |
Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals
In recent years, copper wiring has emerged as a promising substitute for the aluminum wiring in integrated circuits, because copper offers lower electrical resistance and better reliability at...
|
|
|
7282936 |
Die design with integrated assembly aid
An upper die portion ( 36 ) of a die head for aligning probe pins ( 14 ) in first array of first micro-holes ( 18 ) formed in lower die portion ( 12 ) of the die head, which generally includes a...
|
|
|
7276400 |
Methods of making microelectronic packages with conductive elastomeric posts
A method of making a microelectronic assembly includes providing a first microelectronic element having a first surface and a plurality of contacts exposed at the first surface; providing a second...
|
|
|
7262505 |
Selective electroless-plated copper metallization
Structures and methods are provided which include a selective electroless copper metallization. The present invention includes a novel methodology for forming copper vias on a substrate, including...
|
|
|
7262130 |
Methods for making integrated-circuit wiring from copper, silver, gold, and other metals
Integrated circuits, the key components in thousands of electronic and computer products, include interconnected networks of electrical components. The components are typically wired, or...
|
|
|
7259578 |
System for testing semiconductor components having interconnect with variable flexure contacts
A test system for testing semiconductor components includes an interconnect having a substrate and contacts on the substrate for electrically engaging terminal contacts on the components. The...
|
|
|
7256115 |
Asymmetric plating
A method and apparatus are disclosed for forming a tapered contact structure over a contact pad. The tapered contact structure may be used to securely anchor an overlying solder bump or solder...
|
|
|
7253521 |
Methods for making integrated-circuit wiring from copper, silver, gold, and other metals
Integrated circuits include networks of electrical components that are typically wired, or interconnected, together with aluminum wires. In recent years, researchers have begun using copper in...
|
|
|
7250780 |
Probe card for semiconductor wafers having mounting plate and socket
A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing...
|
|
|
7245136 |
Methods of processing a workpiece, methods of communicating signals with respect to a wafer, and methods of communicating signals within a workpiece processing apparatus
An electronic device workpiece processing apparatus and method of communicating signals within an electronic device workpiece processing apparatus are provided. One embodiment of an electronic...
|
|
|
7225538 |
Resilient contact structures formed and then attached to a substrate
Contact structures exhibiting resilience or compliance are formed. The contact structures may be formed on a sacrificial substrate. The contact structures are attached to an array of electrical...
|
|
|
7224051 |
Semiconductor component having plate and stacked dice
A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for...
|
|
|
7220665 |
H2 plasma treatment
Electronic devices are constructed by a method that includes forming a first conductive layer in an opening in a multilayer dielectric structure supported by a substrate, forming a core conductive...
|
|
|
7217580 |
Method for processing an integrated circuit
Methods for processing at least one die which comprises an integrated circuit. In one example of a method of the invention, an identification code is applied to a carrier. A singulated die is...
|
|
|
7215131 |
Segmented contactor
A method of fabricating a large area, multi-element contactor. A segmented contactor is provided for testing semiconductor devices on a wafer that comprises a plurality of contactor units mounted...
|
|
|
7202677 |
Socket for mating with electronic component, particularly semiconductor device with spring packaging, for fixturing, testing, burning-in or operating such a component
Products and assemblies are provided for socketably receiving elongate interconnection elements, such as spring contact elements, extending from electronic components, such as semiconductor...
|
|
|
7200930 |
Probe for semiconductor devices
An interconnection contact structure assembly including an electronic component having a surface and a conductive contact carried by the electronic component and accessible at the surface. The...
|
|
|
7169646 |
Interconnect assemblies and methods
Interconnect assemblies and methods for forming and using them. In one example of the invention, an interconnect assembly comprises a substrate, a resilient contact element and a stop structure....
|
|
|
7148718 |
Articles of manufacture and wafer processing apparatuses
The present invention includes an electronic device workpiece processing apparatus and method of communicating signals within an electronic device workpiece processing apparatus. One embodiment of...
|
|
|
7142000 |
Mounting spring elements on semiconductor devices, and wafer-level testing methodology
Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies...
|
|
|
7140883 |
Contact carriers (tiles) for populating larger substrates with spring contacts
An interconnection apparatus and a method of forming an interconnection apparatus. Contact structures are attached to or formed on a first substrate. The first substrate is attached to a second...
|
|
|
7129725 |
Semiconductor test interconnect with variable flexure contacts having polymer material
An interconnect for testing semiconductor components includes a substrate, and interconnect contacts on the substrate for electrically engaging terminal contacts on the components. The interconnect...
|
|
|
7127811 |
Methods of fabricating and using shaped springs
A method of fabricating and using an interconnection element that includes a first element material adapted to be coupled to a substrate and a second element material comprising a material having a...
|
|
|
7126062 |
Compliant electrical contact assembly
A compliant electrical contact assembly for temporarily interfacing two electrical devices. The assembly includes a contact having loops with axes forming with a closed coil with opposed contact...
|
|
|
7109068 |
Through-substrate interconnect fabrication methods
A method for forming a conductive via or through-wafer interconnect (TWI) in a semiconductive substrate for use as a contact card, test connector, semiconductor package interposer, or die...
|
|
|
7093622 |
Apparatus for deforming resilient contact structures on semiconductor components
A method for testing and burning-in semiconductor components such as semiconductor dice on a semiconductor wafer, is provided. The method includes the step of providing all of the components on the...
|
|
|
7091611 |
Multilevel copper interconnects with low-k dielectrics and air gaps
Structures and methods are provided for an improved multilevel wiring interconnect in an integrated circuit assembly. The present invention provides for a multilayer copper wiring structure by...
|