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7402516 Method for making integrated circuits  
Integrated circuits, the key components in thousands of electronic and computer products, include interconnected networks of electrical components. The components are typically wired, or...
7368378 Methods for making integrated-circuit wiring from copper, silver, gold, and other metals  
Integrated circuits, the key components in thousands of electronic and computer products, include interconnected networks of electrical components. The components are typically wired, or...
7304388 Method and apparatus for an improved air gap interconnect structure  
In one embodiment, an apparatus comprises a first layer having at least one interconnect formed in an interlayer dielectric (ILD), a second layer formed over the first layer having a second at...
7285196 Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals  
In recent years, copper wiring has emerged as a promising substitute for the aluminum wiring in integrated circuits, because copper offers lower electrical resistance and better reliability at...
7262505 Selective electroless-plated copper metallization  
Structures and methods are provided which include a selective electroless copper metallization. The present invention includes a novel methodology for forming copper vias on a substrate, including...
7262130 Methods for making integrated-circuit wiring from copper, silver, gold, and other metals  
Integrated circuits, the key components in thousands of electronic and computer products, include interconnected networks of electrical components. The components are typically wired, or...
7253521 Methods for making integrated-circuit wiring from copper, silver, gold, and other metals  
Integrated circuits include networks of electrical components that are typically wired, or interconnected, together with aluminum wires. In recent years, researchers have begun using copper in...
7211496 Freestanding multiplayer IC wiring structure  
A dielectric wiring structure and method of manufacture therefor. The wiring structure includes air dielectric formed in a hemisphere. The wiring structure also includes, in embodiments, a method...
7208836 Integrated circuitry and a semiconductor processing method of forming a series of conductive lines  
A semiconductor processing method of forming a plurality of conductive lines includes, a) providing a substrate; b) providing a first conductive material layer over the substrate; c) providing a...
7148134 Integrated circuitry and a semiconductor processing method of forming a series of conductive lines  
A semiconductor processing method of forming a plurality of conductive lines includes, a) providing a substrate; b) providing a first conductive material layer over the substrate; c) providing a...
7126223 Semiconductor device formed with an air gap using etch back of inter layer dielectric (ILD)  
A method is disclosed of forming an air gap using etch back of an inter layer dielectric (ILD) with self-alignment to metal pattern. The method entails forming a first metallization layer deposited...
7105420 Method to fabricate horizontal air columns underneath metal inductor  
A new method is provided for creating an inductor on the surface of a silicon substrate. The invention provides overlying layers of oxide fins beneath a metal inductor. The oxide fins provide the...
7091611 Multilevel copper interconnects with low-k dielectrics and air gaps  
Structures and methods are provided for an improved multilevel wiring interconnect in an integrated circuit assembly. The present invention provides for a multilayer copper wiring structure by...
7067421 Multilevel copper interconnect with double passivation  
Structures and methods provide multilevel wiring interconnects in an integrated circuit assembly which alleviate problems associated with integrated circuit size and performance and include methods...
6995470 Multilevel copper interconnects with low-k dielectrics and air gaps  
Structures and methods are provided for an improved multilevel wiring interconnect in an integrated circuit assembly. The present invention provides for a multilayer copper wiring structure by...
6875685 Method of forming gas dielectric with support structure  
A method for forming a gas dielectric with support structure on a semiconductor device structure provides low capacitance and adequate support for a conductor of the semiconductor device structure....
6853054 High frequency semiconductor device  
A high frequency semiconductor device including wiring layers which are formed above a semiconductor substrate and in which transmission lines are formed by combining with a ground plate having a...
6780755 Gas dome dielectric system for ULSI interconnects  
A method of forming a multilevel conductor structure for ULSI circuits is provided. The structure includes a substrate having a plurality of dielectric supports extending from the substrate to...
6674167 Multilevel copper interconnect with double passivation  
Structures, systems and methods are provide for multilevel wiring interconnects in an integrated circuit assembly which alleviate problems associated with integrated circuit size and performance....
6667552 Low dielectric metal silicide lined interconnection system  
Multi-level semiconductor devices are formed with reduced parasitic capacitance without sacrificing structural integrity or electromigration performance by removing the inter-layer dielectrics and...
6548883 Reduced RC between adjacent substrate wiring lines  
A void is defined between adjacent wiring lines to minimize RC coupling. The void has a low dielectric value approaching 1.0. For one approach, hollow silicon spheres define the void. The spheres...
6492705 Integrated circuit air bridge structures and methods of fabricating same  
Airbridge structures and processes for making air bridge structures and integrated circuits are disclosed. One airbridge structure has metal conductors 24 encased in a sheath of dielectric...
6429522 Microprocessor having air as a dielectric and encapsulated lines  
A multi-layer semiconductor circuit comprising a plurality of conductive lines having air as a dielectric between the sides of the conductive lines in a first layer and having a structurally...
6396119 Reduced RC delay between adjacent substrate wiring lines  
A void is defined between adjacent wiring lines to minimize RC coupling. The void has a low dielectric value approaching 1.0. For one approach, hollow silicon spheres define the void. The spheres...
6376330 Dielectric having an air gap formed between closely spaced interconnect lines  
A dielectric material is provided having air gaps purposely formed within the dielectric. The dielectric is deposited, and air gaps formed, between respective interconnect lines. The geometries...
6368939 Multilevel interconnection structure having an air gap between interconnects  
A semiconductor device has an air-gap/multi-level interconnection structure. The interconnects are insulated from one another by an air gap in the same layer, and by an interlevel dielectric film...
6307265 Feasible, gas-dielectric interconnect process  
Wires are provided on an insulating layer, reaching the source region and drain region of a MOS transistor. Each wire is composed of a conductor and a barrier layer covering the surfaces of the...
6306753 Feasible, gas-dielectric interconnect process  
Wires are provided on an insulating layer, reaching the source region and drain region of a MOS transistor. Each wire is composed of a conductor and a barrier layer covering the surfaces of the...
6303486 Method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer and an unconstrained copper anneal  
A method is provided for forming a copper interconnect, the method including forming a first dielectric layer above a structure layer, forming a first opening in the first dielectric layer, and...
6277705 Method for fabricating an air-gap with a hard mask  
A fabrication method for an air-gap, in which method hard mask is used, is described. A patterned hard mask layer is formed on a semiconductor substrate. Taking advantage of the etching selectivity...
6252290 Method to form, and structure of, a dual damascene interconnect device  
A method of fabricating a dual damascene interconnect structure in a semiconductor device, comprises the following steps. A first level via photo sensitive dielectric layer is deposited and exposed...
6246118 Low dielectric semiconductor device with rigid, conductively lined interconnection system  
Multi-level semiconductor devices are formed with reduced parasitic capacitance without sacrificing structural integrity or electromigration performance by removing the inter-layer dielectrics and...
6245658 Method of forming low dielectric semiconductor device with rigid, metal silicide lined interconnection system  
Multi-level semiconductor devices are formed with reduced parasitic capacitance without sacrificing structural integrity or electromigration performance by removing the inter-layer dielectrics and...
6228770 Method to form self-sealing air gaps between metal interconnects  
A new method of forming metal interconnects with air gaps between adjacent interconnects in the manufacture of an integrated circuit device is achieved. A semiconductor substrate is provided. The...
6218282 Method of forming low dielectric tungsten lined interconnection system  
Multi-level semiconductor devices are formed with reduced parasitic capacitance without sacrificing structural integrity or electromigration performance by removing the inter-layer dielectrics and...
6208015 Interlevel dielectric with air gaps to lessen capacitive coupling  
A reduced permittivity interlevel dielectric in a semiconductor device arranged between two levels of interconnect. The dielectric comprises a first dielectric layer preferably from a silane source...
6184159 Interlayer dielectric planarization process  
A method of forming a planar interlayer dielectric layer over underlying structures is disclosed. First, a liner oxide layer is formed over the underlying structures. Then, a BPSG layer is formed...
6160316 Integrated circuit utilizing an air gap to reduce capacitance between adjacent metal linewidths  
A method is provided for forming a multi-level interconnect in which capacitive coupling between laterally adjacent conductors employed by an integrated circuit is reduced. According to an...
6146985 Low capacitance interconnection  
A semiconductor device having reduced parasitic capacitance and, consequentially increased integrated circuit speed, is achieved by removing sections of dielectric interlayers which do not support...
6097092 Freestanding multilayer IC wiring structure  
A dielectric wiring structure and method of manufacture therefor. Successively formed wiring layers synergistically combine with subsequently formed sidewall supports spanning two or more layers to...
6078088 Low dielectric semiconductor device with rigid lined interconnection system  
Multi-level semiconductor devices are formed with reduced parasitic capacitance without sacrificing structural integrity or electromigation performance by removing the inter-layer dielectrics and...
6064118 Multilevel interconnection structure having an air gap between interconnects  
A semiconductor device has an air-gap/multi-level interconnection structure. The interconnects are insulated from one another by an air gap in the same layer, and by an interlevel dielectric film...
6057224 Methods for making semiconductor devices having air dielectric interconnect structures  
A method of making an integrated circuit interconnect structure having air as the effective dielectric between metallization layers includes the steps of: a) providing an air dielectric formation...
6054769 Low capacitance interconnect structures in integrated circuits having an adhesion and protective overlayer for low dielectric materials  
In accordance with the present invention, an improved method and structure is provided for integrating polymer and other low dielectric constant materials, which may have undesirable properties,...
5998293 Multilevel interconnect structure of an integrated circuit having air gaps and pillars separating levels of interconnect  
An improved multilevel interconnect structure is provided. The interconnect structure includes pillars spaced from each other across a wafer. The pillars are placed between levels of interconnect...
5994218 Method of forming electrical connections for a semiconductor device  
A silicon film is deposited using low pressure chemical vapor deposition (LPCVD) to fill in openings formed in a substrate such as an insulating film. An aluminum film and a metal film are then...
5966634 Method of manufacturing semiconductor device having multi-layer wiring structure with diffusion preventing film  
In a method of manufacturing a semiconductor device, when a copper diffusion preventing film portion on the connecting hole bottom portion is to be removed, a film thickness of other portion of the...
5950102 Method for fabricating air-insulated multilevel metal interconnections for integrated circuits  
A method for making air-insulated planar metal interconnections having low interlevel capacitance with improved RC time delays for integrated circuits is achieved. The method involves using a...
5933704 Method to reveal the architecture of multilayer interconnectors in integrated circuits  
A new method of preparing for inspection a wafer having multilayer interconnections is described. Semiconductor device structures having multilayer interconnections are provided in and on a...
5900668 Low capacitance interconnection  
A semiconductor device having reduced parasitic capacitance and, consequentially increased integrated circuit speed, is achieved by removing sections of dielectric interlayers which do not support...
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