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EP1285465B1 |
BIPOLAR TRANSISTOR
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7339830 |
One transistor SOI non-volatile random access memory cell
Various semiconductor structure embodiments include a substrate, a buried insulator over at least a portion of the substrate, a body region over the buried insulator, first and second source/drain...
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7184312 |
One transistor SOI non-volatile random access memory cell
One aspect of the present subject matter relates to a memory cell, or more specifically, to a one-transistor SOI non-volatile memory cell. In various embodiments, the memory cell includes a...
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7145186 |
Memory cell with trenched gated thyristor
One aspect of this disclosure relates to a memory cell. Various memory cell embodiments include an isolated semiconductor region separated from a bulk semiconductor region, an access transistor and...
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RE38582 |
Semiconductor diode with suppression of auger generation processes
A multi-layer Auger suppressed diode having at least two exclusion interfaces and at least two extraction interfaces. A specific embodiment has two composite contacts, each consisting of a heavily...
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6770902 |
Charge carrier extracting transistor
An extracting transistor ( 10 )—an FET—includes a conducting channel extending via a p-type InSb quantum well ( 22 ) between p-type InAlSb layers ( 20, 24 ) of wider band-gap. One of the InAlSb...
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6674104 |
Bipolar transistor
A bipolar transistor having base and collector regions of narrow bandgap semiconductor material and a minority-carrier excluding base contact has a base doping level greater than 10 17 cm −3 ....
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6624451 |
High frequency field effect transistor with carrier extraction to reduce intrinsic conduction
A field effect transistor (FET) is of the type which employs base biasing to depress the intrinsic contribution to conduction and reduce leakage current. It incorporates four successive layers (...
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6515348 |
Semiconductor device with FET MESA structure and vertical contact electrodes
A semiconductor device comprises one or more field effect devices (FD) having source and drain regions ( 5 and 6 ) spaced apart by a body region ( 3 a ). A gate structure ( 7 a , 7 b ),...
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6081019 |
Semiconductor diode with suppression of auger generation processes
A multi-layer Auger suppressed diode having at least two exclusion interfaces and at least two extraction interfaces. A specific embodiment has two composite contacts, each consisting of a heavily...
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