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7429541 |
Method of forming trench isolation in the fabrication of integrated circuitry
This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of...
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7387940 |
Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry
The invention includes methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating integrated circuitry including memory circuitry, and integrated...
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7368800 |
Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry
The invention includes methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating integrated circuitry including memory circuitry, and integrated...
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7368366 |
Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry
The invention includes methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating integrated circuitry including memory circuitry, and integrated...
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7365013 |
System for the preferential removal of silicon oxide
A system, composition, and a method for planarizing or polishing a composite substrate are provided. The planarizing or polishing system comprises (i) a polishing composition comprising (a) about...
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7364981 |
Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry
The invention includes methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating integrated circuitry including memory circuitry, and integrated...
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7361614 |
Method of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry
This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of...
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7294556 |
Method of forming trench isolation in the fabrication of integrated circuitry
This invention includes methods of forming a phosphorus doped silicon dioxide comprising layers, and methods of forming trench isolation in the fabrication of integrated circuitry. In one...
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7250380 |
Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry
This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of...
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7250378 |
Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry
This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of...
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7238618 |
System for the preferential removal of silicon oxide
A system, composition, and a method for planarizing or polishing a composite substrate are provided. The planarizing or polishing system comprises (i) a polishing composition comprising (a) about...
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7235459 |
Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry
The invention includes methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating integrated circuitry including memory circuitry, and integrated...
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7217634 |
Methods of forming integrated circuitry
The invention includes methods of forming integrated circuitry. In one implementation, a method of forming an integrated circuit includes forming a plurality of isolation trenches within...
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7157385 |
Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry
This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of...
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7125815 |
Methods of forming a phosphorous doped silicon dioxide comprising layer
This invention includes methods of forming phosphorus doped silicon dioxide comprising layers, and methods of forming trench isolation in the fabrication of integrated circuitry. In one...
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7053010 |
Methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming arrays of memory cells
This invention includes methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming bit line over...
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7012010 |
Methods of forming trench isolation regions
In accordance with an aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A silanol layer is formed to partially fill the trench and...
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6974780 |
Semiconductor processing methods of chemical vapor depositing SiO2 on a substrate
The invention provides semiconductor processing methods of depositing SiO 2 on a substrate. In a preferred aspect, the invention provides methods of reducing the formation of undesired reaction...
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6897120 |
Method of forming integrated circuitry and method of forming shallow trench isolation in a semiconductor substrate
A method of forming integrated circuitry includes forming a silicon nitride comprising layer over a semiconductor substrate. At least a portion of the silicon nitride comprising layer is etched...
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6872633 |
Deposition and sputter etch approach to extend the gap fill capability of HDP CVD process to ≦0.10 microns
A method of filling an STI feature with a dielectric material using a HDP CVD technique is described. By omitting an inert carrier gas like argon in the first CVD step, a small keyhole in a SiO 2 ...
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6777346 |
Planarization using plasma oxidized amorphous silicon
A planarization process for filling spaces between patterned metal features formed over a surface of a semiconductor substrate. The patterned metal features are preferably coated with a dielectric...
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6719012 |
Method of forming trench isolation regions
In accordance with an aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A silanol layer is formed to partially fill the trench and...
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RE38363 |
Method of forming trench isolation having polishing step and method of manufacturing semiconductor device
A method of forming trench isolation including a burying step of burying trenches by a deposition means for conducting etching and deposition simultaneously and a polishing step of flattening a...
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6583028 |
Methods of forming trench isolation regions
In accordance with an aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A silanol layer is formed to partially fill the trench and...
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6551897 |
Wafer trench article and process
A bonded wafer 100 has a device substrate 16 with isolation trenches 30 defining device regions 18. Oxide dogbone structures are removed before filling trenches 30 . Voids 36 in the...
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EP0842532B1 |
PROCESS FOR GENERATING A SPACER IN A STRUCTURE
Abstract not available for EP0842532 Abstract of corresponding document: US6030900 PCT No. PCT/DE96/01277 Sec. 371 Date Feb. 4, 1998 Sec. 102(e) Date Feb. 4, 1998 PCT Filed Jul. 12, 1996 PCT Pub....
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6365523 |
Integrated high density plasma chemical vapor deposition (HDP-CVD) method and chemical mechanical polish (CMP) planarizing method for forming patterned planarized aperture fill layers
A method for forming a series of patterned planarized aperture fill layers within a series of apertures within a topographic substrate layer employed within a microelectronics fabrication. There is...
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6362098 |
Plasma-enhanced chemical vapor deposition (CVD) method to fill a trench in a semiconductor substrate
In a CVD chamber ( 120 ) having a chuck ( 122 ) to hold a semiconductor substrate ( 100 ) and having a plasma generator ( 121 ) to generate a plasma ( 125 ), a trench in the substrate is filled...
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6300219 |
Method of forming trench isolation regions
In accordance with an aspect of the invention, a method of forming a trench isolation region includes forming a trench within a substrate. A silanol layer is formed to partially fill the trench and...
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6261957 |
Self-planarized gap-filling by HDPCVD for shallow trench isolation
Within a method for forming an aperture fill layer within an aperture there is first provided a topographic substrate which has formed therein a pair of mesas which defines an aperture. There is...
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6194305 |
Planarization using plasma oxidized amorphous silicon
A planarization process for filling spaces between patterned metal features formed over a surface of a semiconductor substrate. The patterned metal features are preferably coated with a dielectric...
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6184158 |
Inductively coupled plasma CVD
A method of depositing a dielectric film on a substrate in a process chamber of an inductively coupled plasma-enhanced chemical vapor deposition reactor. Gap filling between electrically conductive...
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6150233 |
Semiconductor device and method of manufacturing the same
An underlaid silicon oxide film (2) and a polycrystalline silicon film (5) are formed in this order on a surface (1S) of a silicon substrate (1). The polycrystalline silicon film (5) and the...
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6090714 |
Chemical mechanical polish (CMP) planarizing trench fill method employing composite trench fill layer
A method for forming a planarized trench fill layer within a trench within a substrate. There is first provided a substrate having a trench formed therein. There is then formed over the substrate...
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6030900 |
Process for generating a space in a structure
In a method for the production of a spacer layer in a structure in a first step a structure is produced by anisotropic dry etching, and in a further step an oxide layer is deposited with an organic...
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5915190 |
Methods for filling trenches in a semiconductor wafer
A method for filling a trench in a semiconductor wafer that is disposed in a plasma-enhanced chemical vapor deposition chamber. The method includes the step of depositing a protection layer of...
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5872052 |
Planarization using plasma oxidized amorphous silicon
A planarization process for filling spaces between patterned metal features formed over a surface of a semiconductor substrate. The patterned metal features are preferably coated with a dielectric...
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5849644 |
Semiconductor processing methods of chemical vapor depositing SiO.sub.2 on a substrate
The invention provides semiconductor processing methods of depositing SiO 2 on a substrate. In a preferred aspect, the invention provides methods of reducing the formation of undesired reaction...
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5728621 |
Method for shallow trench isolation
A new method for forming planarized high quality oxide shallow trench isolation is described. A nitride layer overlying a pad oxide layer is provided over the surface of a semiconductor substrate....
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5721173 |
Method of forming a shallow trench isolation structure
A method of forming a trench isolation structure is provided in which a film is formed on a semiconductor substrate and a trench is formed in the semiconductor substrate through the film. A...
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5498565 |
Method of forming trench isolation having polishing step and method of manufacturing semiconductor device
A method of forming trench isolation including a burying step of burying trenches by a deposition means for conducting etching and deposition simultaneously and a polishing step of flattening a...
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5420065 |
Process for filling an isolation trench
A process for filling an isolation trench with a dielectric is described. The deposition pressure of a gas from which a silicon dioxide dielectric is deposited in a trench is changed on a real-time...
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