Matches 1 - 27 out of 27
Match Document Document Title
7418071 Method and apparatus for generating a phase dependent control signal  
A phase detector generates a phase dependent control signal according to the phase relationship between a first and second clock signal. The phase detector includes first and second phase detector...
7415404 Method and apparatus for generating a sequence of clock signals  
A clock generator circuit generates a sequence of clock signals equally phased from each other from a master clock signal. The clock generator is formed by inner and outer delay-locked loops. The...
7414371 Voltage regulation loop with variable gain control for inverter circuit  
A controller for an inverter provides variable gain control in a voltage regulation loop to prevent overshoot in an output voltage of the inverter. A feedback circuit senses the output voltage and...
7411360 Apparatus and method for striking a fluorescent lamp  
A lamp inverter with continuous strike voltage facilitates faster striking of a fluorescent lamp, especially at cold temperatures. A frequency sweep generator sweeps the frequency of the lamp...
7391172 Optical and temperature feedbacks to control display brightness  
An illumination control circuit allows a user to set a desired brightness level and maintains the desired brightness level over temperature and life of a light source. The illumination control...
7373575 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same  
Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of the data signals were properly captured. A first group of the applied data...
7234070 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding  
A memory system includes a memory hub controller that sends write data to a plurality of memory modules through a downstream data bus and receives read data from the memory modules through an...
7168027 Dynamic synchronization of data capture on an optical or other high speed communications link  
A method and system that dynamically adjusts link control parameters of a communications network. The communications network includes a transmitter coupled through a first data link to a receiver....
7159092 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same  
A method and circuit adaptively adjust respective timing offsets of digital signals relative to a clock output along with the digital signals to enable a latch receiving the digital signals to...
7085975 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same  
Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of the data signals were properly captured. A first group of the applied data...
7061417 Method and system for increased effective resolution in an N-bit digital-to-analog converter  
In digital-to-analog conversion systems, a method and system for increased effective resolution in an N-bit DAC are provided. Additional resolution may be provided in an N-bit DAC by increasing the...
7016451 Method and apparatus for generating a phase dependent control signal  
A phase detector generates a phase dependent control signal according to the phase relationship between a first and second clock signal. The phase detector includes first and second phase detector...
6959016 Method and apparatus for adjusting the timing of signals over fine and coarse ranges  
A variable delay circuit is formed by a fine delay circuit and a coarse delay circuit. The fine delay circuit adjusts the delay of a delayed clock signal in relatively small phase increments with...
6954097 Method and apparatus for generating a sequence of clock signals  
A clock generator circuit generates a sequence of clock signals equally phased from each other from a master clock signal. The clock generator is formed by inner and outer delay-locked loops. The...
6952462 Method and apparatus for generating a phase dependent control signal  
A phase detector generates a phase dependent control signal according to the phase relationship between a first and second clock signal. The phase detector includes first and second phase detector...
6931086 Method and apparatus for generating a phase dependent control signal  
A phase detector generates a phase dependent control signal according to the phase relationship between a first and second clock signal. The phase detector includes first and second phase detector...
6912680 Memory system with dynamic timing correction  
A memory system includes a memory controller and a bank of memory devices. The memory controller controls the memory devices through packets of control data and a master clock signal. Each of the...
6801989 Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same  
A method and circuit adaptively adjust respective timing offsets of digital signals relative to a clock output along with the digital signals to enable a latch receiving the digital signals to...
6788229 Margining pin interface circuit for clock adjustment of digital to analog converter  
A voltage margin setting interface circuit has a single input pin, and is configured to program the slew rate and polarity direction of variation of the operation of a digital-to-analog converter,...
6662304 Method and apparatus for bit-to-bit timing correction of a high speed memory bus  
A synchronization circuit performs bit-to-bit timing correction of respective digital signals in digital signal packets applied to a packetized memory device. Each digital signal packet includes a...
6647523 Method for generating expect data from a captured bit pattern, and memory device using same  
Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of the applied data signals were properly captured. A first group of the...
6643789 Computer system having memory device with adjustable data clocking using pass gates  
A circuit for adjusting a time when data is delivered to a data terminal with respect to an external clock signal includes a data passing circuit and a delay adjusting circuit. The delay adjusting...
6507819 Sound signal processor for extracting sound signals from a composite digital sound signal  
A sound signal processing apparatus including extracting means for extracting from a composite sound signal, representing multiple sound sequences, digital sound signals corresponding to a portion...
6441600 Apparatus for measuring the duty cycle of a high speed clocking signal  
A system and method for accurately measuring the duty cycle of an input periodic pulsed signal. The system includes a device for converting the input signal to be measured into a first dc voltage...
6369636 Method, architecture and circuit for selecting, calibrating and monitoring circuits  
A circuit including a plurality of first calibration circuits, a second circuit and a third circuit. The plurality of calibration circuits may each be configured to present a calibration signal....
6049770 Video and voice signal processing apparatus and sound signal processing apparatus  
5323438 Programmable pulse-width modulation signal generator  
A programmable pulse-width-modulation (PWM) signal generator for selectively generating several PWM signals each of which has a different pulse width. The programmable PWM signal generator, which...
Matches 1 - 27 out of 27