Matches 1 - 23 out of 23
Match Document Document Title
7078952 Device for calibrating a clock signal  
An integrated circuit having a clock calibration device receiving a local clock signal from an oscillator and applying a correction value to the signal to produce a corrected clock signal. The...
EP0565127B1 Method for a TDMA mobile unit frequency synthesizer having power saving mode during transmit and receive slots  
Abstract of EP0565127 During transmit and receive slots of a TDMA frame, a reference pulse source (31) is made inactive for power savings purposes, and during an idle slot of the frame it is...
6194975 Dual band VCO with improved phase noise  
A dual band VCO selects between the oscillator output frequencies by switching the resonant circuit elements in the active circuit. For each output frequency selected, the oscillator produces a...
6188287 Method and apparatus for reducing phase noise in a voltage controlled oscillator circuit  
A phase noise optimization circuit (208) minimizes phase noise for a voltage controlled oscillator (VCO) (202). Control circuitry (214) locates a minimum phase noise region for VCO operation based...
6023198 Self-tuning and temperature compensated voltage controlled oscillator  
A self-tuning VCO (116) receives a control voltage input (Vcont) (114) and an adjustable programmable voltage (Vadj) (122) and provides optimized locked conditions even under variations in...
5686864 Method and apparatus for controlling a voltage controlled oscillator tuning range in a frequency synthesizer  
A frequency synthesizer (100, 500) provides multiple selectable voltage controlled oscillator (VCO) frequency ranges. A VCO control circuit (114) controls the selectable VCO frequency ranges based...
5594735 TDMA mobile unit frequency synthesizer having power saving mode during transmit and receive slots  
In a frequency synthesizer of a TDMA cellular communication mobile unit, a reference pulse is supplied from a reference pulse source to a phase comparator whose output is coupled through an...
5541929 TDMA mobile unit frequency synthesizer having power saving mode during transmit and receive slots  
During transmit and receive slots of a TDMA frame, a reference pulse source (31) is made inactive for power savings purposes, and during an idle slot of the frame it is rendered active to supply...
EP0435552B1 A phase locked loop with reduced frequency/phase lock time  
Abstract of EP0435552 A phase locked loop provides a programmable frequency output signal. A phase detector (18) detects a phase difference between a reference frequency (FREF) divided by a first...
5420545 Phase lock loop with selectable frequency switching time  
A phase lock loop (PLL) circuit for controlling an oscillator includes a phase comparator, a loop filter, a reference converter and a feedback converter whose performance characteristics are...
5339278 Method and apparatus for standby recovery in a phase locked loop  
A phase locked loop (20) includes a standby control circuit (30) and recovers from standby with minimum lock time. A reference counter (21), a loop counter portion (22, 23) and a phase detector...
5293380 Frame synchronization system among multiple radio base stations for TDMA digital mobile communications system  
A TDMA digital mobile communications system prevents TDMA frame synchronization from being asynchronous among radio base stations when a communication held by a mobile station is handed over from...
EP0565127A2 TDMA mobile unit frequency synthesizer having power saving mode during transmit and receive slots.  
During transmit and receive slots of a TDMA frame, a reference pulse source (31) is made inactive for power savings purposes, and during an idle slot of the frame it is rendered active to supply...
5220294 Phase-locked loop circuit  
A phase-locked loop circuit comprises first and second charge pumps which apply charge and discharge voltages to a control voltage generator. The control voltage generator applies a control voltage...
5200712 Variable speed phase locked loop  
A variable speed phase locked loop includes a phase detector and a voltage controlled oscillator, the output of which is provided through a divider circuit to the phase detector. A plurality of...
5146187 Synthesizer loop filter for scanning receivers  
An improved adaptive loop lag filter for phase locked loop frequency synthesizers used in scanning receivers includes an additional resistor controllably inserted into the lag filter by a...
5043678 Phase lock loop  
A Phase Locked Loop including a monolithic Phase Locked Loop component. The monolithic component has an internal amplifier stage and an internal VCO. An external phase detector compares the phase...
EP0435552A2 A phase locked loop with reduced frequency/phase lock time.  
A phase locked loop provides a programmable frequency output signal. A phase detector (18) detects a phase difference between a reference frequency (FREF) divided by a first number (R), and a...
4980653 Phase locked loop  
A phase locked loop (100) with a sample and hold phase detector (106) with adjustable gain. A switching circuit adjusts the slew rate of the phase detector by either introducing additional ramp...
4951005 Phase locked loop with reduced frequency/phase lock time  
A phase locked loop for providing a programmable frequency output signal with reduced phase-frequency lock time. A phase detector detects a phase difference between a reference frequency divided by...
4940950 Frequency synthesis method and apparatus using approximation to provide closely spaced discrete frequencies over a wide range with rapid acquisition  
A frequency synthesizer takes advantage of the simplicity of the phase lock loop and the rapid settling time and spectral purity of direct methods of frequency synthesis. "Approximations" and...
4849714 Signal generating apparatus  
The frequency setting data for setting a preset voltage of a VCO and a frequency dividing ratio of a frequency divider are latched in a data register. A control section includes two registers for...
4816774 Frequency synthesizer with spur compensation  
A synthesizer circuit with spur compensation utilizes fractional division in the synthesizer loop. Two accumulators are utilized for determining the divisor value N. The capacity of the two...
Matches 1 - 23 out of 23