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7413480 Silicon pillars for vertical transistors  
In order to form a more stable silicon pillar which can be used for the formation of vertical transistors in DRAM cells, a multi-step masking process is used. In a preferred embodiment, an oxide...
7371627 Memory array with ultra-thin etched pillar surround gate access transistors and buried data/bit lines  
A memory array with data/bit lines extending generally in a first direction formed in an upper surface of a substrate and access transistors extending generally upward and aligned generally atop a...
7368365 Memory array buried digit line  
A method of forming a buried digit line is disclosed. Sacrificial spacers are formed along the sidewalls of an isolation trench, which is then filled with a sacrificial material. One spacer is...
7368344 Methods of reducing floating body effect  
Methods of reducing the floating body effect in vertical transistors are disclosed. The floating body effect occurs when an active region in a pillar is cut off from the substrate by a depletion...
7285812 Vertical transistors  
Vertical transistors for memory cells, such as 4F2 memory cells, are disclosed. The memory cells use digit line connections formed within the isolation trench to connect the digit line with the...
7247570 Silicon pillars for vertical transistors  
In order to form a more stable silicon pillar which can be used for the formation of vertical transistors in DRAM cells, a multi-step masking process is used. In a preferred embodiment, an oxide...
7229895 Memory array buried digit line  
A method of forming a buried digit line is disclosed. Sacrificial spacers are formed along the sidewalls of an isolation trench, which is then filled with a sacrificial material. One spacer is...
7211523 Method for forming field oxide  
A method for forming a field oxide is disclosed. In one embodiment, the method comprises providing a semiconductor structure having a substrate, a pad oxide, and a patterned barrier layer,...
6835634 Streamlined field isolation process  
A field isolation process performed on a silicon wafer is carried out by high pressure oxidation. Using oxygen rather than water vapor as the oxidant substantially eliminates nitride inclusions via...
RE38674 Process for forming a thin oxide layer  
A novel process for forming a robust, sub-100 Å oxide is disclosed. Native oxide growth is tightly controlled by flowing pure nitrogen during wafer push and nitrogen with a small amount of oxygen...
6661061 Integrated circuit with differing gate oxide thickness  
A semiconductor process for producing two gate oxide thicknesses within an integrated circuit in which a semiconductor substrate having a first region and a second region is provided. The first...
6579769 Semiconductor device manufacturing method including forming FOX with dual oxidation  
In a method of manufacturing a semiconductor device, there are comprised the steps of forming an oxidation preventing layer on a surface of a semiconductor substrate, forming a first window in the...
6531364 Advanced fabrication technique to form ultra thin gate dielectric using a sacrificial polysilicon seed layer  
A method is presented for forming a transistor wherein polysilicon is preferably deposited upon a dielectric-covered substrate to form a sacrificial polysilicon layer. The sacrificial polysilicon...
6420241 Method for forming an isolation region in a semiconductor device and resulting structure using a two step oxidation process  
A method for forming an element isolation film of a semiconductor device and the semiconductor device. A pad insulator is constructed on a semiconductor substrate. An over-etching process is...
6387777 Variable temperature LOCOS process  
A process of forming isolation structures in semiconductor substrates comprises exposing a selected region of the substrate to an oxidizing ambient held at a first predetermined temperature. As the...
6177332 Method of manufacturing shallow trench isolation  
A method is described for manufacturing a shallow trench isolation. The method comprises the steps of providing a substrate having a pad oxide layer, a mask layer and a trench, wherein the trench...
6103020 Dual-masked field isolation  
A field isolation process utilizes two or more isolation formation steps to form active areas on a semiconductor substrate. Each field isolation step forms a portion of the field isolation in a...
6046483 Planar isolation structure in an integrated circuit  
A method is provided for forming an isolation structure at a semiconducting surface of a body, and the isolation structure formed thereby. A masking layer is formed over selected regions of the...
6040207 Oxide formation technique using thin film silicon deposition  
A semiconductor process in which a silicon film is chemically vapor deposited upon a native oxide film as part of the gate oxide formation process. The invention contemplates a method of forming a...
6033943 Dual gate oxide thickness integrated circuit and process for making same  
A semiconductor manufacturing process for producing MOS integrated circuits having two gate oxide thickness is provided. A first gate dielectric is formed on an upper surface of a semiconductor...
5985738 Method for forming field oxide of semiconductor device using wet and dry oxidation  
A method for forming a field oxide of a semiconductor device is disclosed, which takes advantage of wet oxidation at an early stage of field oxidation to prevent the ungrowth of field oxide and dry...
5972776 Method of forming a planar isolation structure in an integrated circuit  
A method is provided for forming isolated regions of oxide of an integrate circuit, and an integrated circuit formed according to the same. A plurality of active areas is formed in an upper surface...
5962914 Reduced bird's beak field oxidation process using nitrogen implanted into active region  
A method of forming a self-aligned field oxide isolation structure without using silicon nitride. The method comprises forming a dielectric on an upper surface of a semiconductor substrate. The...
5937310 Reduced bird's beak field oxidation process using nitrogen implanted into active region  
A method of forming a self-aligned field oxide isolation structure without using silicon nitride. The method comprises forming a dielectric on an upper surface of a semiconductor substrate. The...
5927992 Method of forming a dielectric in an integrated circuit  
A method is provided for forming an improved device dielectric of a semiconductor integrated circuit, and an integrated circuit formed according to the same. For scaling geometries for use in the...
5909630 Dual-masked isolation  
A field isolation process utilizes two or more isolation formation steps to form active areas on a semiconductor substrate. Each field isolation step forms a portion of the field isolation in a...
5882993 Integrated circuit with differing gate oxide thickness and process for making same  
A semiconductor process for producing two gate oxide thicknesses within an integrated circuit in which a semiconductor substrate having a first region and a second region is provided. The first...
5880009 Method for forming oxides on buried N.sup.+ -type regions  
A method for forming oxides on buried N + -type regions in a memory cell fabrication process, suitable for forming oxides on the bury N + -type regions before self-aligned MOS device etching,...
5872376 Oxide formation technique using thin film silicon deposition  
A semiconductor process in which a silicon film is chemically vapor deposited upon a native oxide film as part of the gate oxide formation process. The invention contemplates a method of forming a...
5861339 Recessed isolation with double oxidation  
A method provides a recessed isolation is provided in a semiconductor substrate by (a) growing a first field oxide, (b) selectively removing portions of the first field oxide to leave recessed...
5834360 Method of forming an improved planar isolation structure in an integrated circuit  
A method is provided for forming an isolation structure at a semiconducting surface of a body, and the isolation structure formed thereby. A masking layer is formed over selected regions of the...
5811865 Dielectric in an integrated circuit  
A method is provided for forming an improved device dielectric of a semiconductor integrated circuit, and an integrated circuit formed according to the same. For scaling geometries for use in the...
5789306 Dual-masked field isolation  
A field isolation process utilizes two or more isolation formation steps to form active areas on a semiconductor substrate. Each field isolation step forms a portion of the field isolation in a...
5742095 Method of fabricating planar regions in an integrated circuit  
A method is provided for forming a planar surface of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A gate oxide layer is formed over a silicon...
5739063 High temperature local oxidation of silicon for fine line patterns  
Field oxide regions are formed in a dry oxygen environment containing controlled amounts of HCl at elevated temperatures to reduce edge defects of narrow source/drain regions.
5689459 Low voltage one transistor flash EEPROM cell using Fowler-Nordheim programming and erase  
A single transistor electrically erasable programmable memory device capable of being programmed and erased using Fowler-Nordheim tunneling and capable of being operated using low voltages....
5687120 Low voltage one transistor flash eeprom cell using fowler-nordheim programming and erase  
A single transistor electrically erasable programmable memory device capable of being programmed and erased using Fowler-Nordheim tunneling and capable of being operated using low voltages....
5587947 Low voltage one transistor flash EEPROM cell using Fowler-Nordheim programming and erase  
A single transistor electrically erasable programmable memory device capable of being programmed and erased using Fowler-Nordheim tunneling and capable of being operated using low voltages....
5543343 Method fabricating an integrated circuit  
A method is provided for forming a planar surface of a semiconductor integrated circuit, and an integrated circuit formed according to the same. A gate oxide layer is formed over a silicon...
5443998 Method of forming a chlorinated silicon nitride barrier layer  
A method of forming a chlorinated silicon nitride barrier layer is disclosed. The method of the present invention includes depositing a silicon nitride layer over a semiconductor substrate. The...
5244843 Process for forming a thin oxide layer  
A novel process for forming a robust, sub-100 Å oxide is disclosed. Native oxide growth is tightly controlled by flowing pure nitrogen during wafer push and nitrogen with a small amount of oxygen...
5151381 Method for local oxidation of silicon employing two oxidation steps  
A process of forming field oxide regions using a field oxidation performed in a dry oxidation environment in a temperature equal to or greater than approximately 1000° C. The dry oxidation reduces...
EP0274779B1 Method of manufacturing a semiconductor device,in which a silicon wafer is provided at its surface with field oxide regions  
Abstract of EP0274779 A method of manufacturing a semiconductor device, in which a surface (1) of a silicon wafer (2) is locally provided with an oxidation mask (3), whereupon the wafer is...
5081058 Method of manufacturing an insulated gate field effect transistor allowing precise control of operating characteristics  
An insulated gate field effect transistor surrounded by a field silicon oxide layer which is at least partially embedded in a silicon substrate, is disclosed. A pair of silicon oxide layers thinner...
5057463 Thin oxide structure and method  
A method for forming a thin oxide layer structure includes the step of first growing a dry oxide layer. A layer grown in steam and chlorine is formed next, followed by a final dry oxide layer. An...
4968641 Method for formation of an isolating oxide layer  
In a method for the formation of an isolating oxide layer on a silicon substrate, an anti-nitridation layer is formed on a silicon substrate at locations where isolating oxide is desired. The...
4906595 Method of manufacturing a semiconductor device, in which a silicon wafer is provided at its surface with field oxide regions  
A method of manufacturing a semiconductor device, in which a surface (1) of a silicon wafer (2) is locally provided with an oxidation mask (3), whereupon the wafer is subjected to an oxidation...
4900396 Method of forming modified layer and pattern  
A two-dimensional pattern of a silicon oxide film is formed on a silicon surface of a substrate, thereby to form a material, the two-dimensional pattern being represented by the presence and...
4897365 Reduced-beak planox process for the formation of integrated electronic components  
A method for reducing birdbeaks formed during a planox process is disclosed. On a silicon substrate (1), oxide (2) and nitride (3) are formed. The oxide and nitride are then selectively etched...
4894353 Method of fabricating passivated tunnel oxide  
A method of fabricating a high-quality tunnel oxide layer includes a two-step oxidation process. The first oxidation step includes oxidizing a substrate in an atmosphere comprising oxygen and...
Matches 1 - 50 out of 57 1 2 >