Matches 1 - 26 out of 26
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7349450 Multi-stage high speed bit stream demultiplexer chip set having switchable master/slave relationship  
A bit stream demultiplexer that couples a high-speed bit stream media to a communication Application Specific Integrated Circuit (ASIC). The bit stream multiplexer performs its demultiplexing...
EP0932286B1 DATA TRANSMISSION METHOD AND GAME SYSTEM CONSTRUCTED BY USING THE METHOD  
Abstract of EP0932286 To provide a new data transmission system between a game device and related peripheral devices, and a device using same. Serial transmission data is divided into an...
EP0561039B1 A frame alignment circuit  
Abstract of EP0561039 A frame alignment circuit comprises a first series-to-parallel data converting means comprising a first shift register for accumulating a series data, a first latch circuit...
6338105 Data transmission method and game system constructed by using the method  
To provide a new data transmission system between a game device and related peripheral devices, and a device using same. Serial transmission data is divided into an odd-numbered bit sequence and...
6324603 Data transmission system and game system using the same  
To provide a new data transmission system between a game device and related peripheral devices, and a device using same. Serial transmission data is divided into an odd-numbered bit sequence and an...
EP0932286A1 DATA TRANSMISSION METHOD AND GAME SYSTEM CONSTRUCTED BY USING THE METHOD  
To provide a new data transmission system between a game device and related peripheral devices, and a device using same. Serial transmission data is divided into an odd-numbered bit sequence and an...
5610911 Method and device for channel selection  
The present invention provides a method and device for channel selection for setting at least one channel among N channels as a reference channel, detecting temporal location of the reference...
EP0333122B1 Method and apparatus for frame synchronization  
Abstract of EP0333122 A frame synchronization method in which a synchronization detection of a frame synchronization signal using one of n-multiplexed frame synchronization signals derived from a...
5490147 Frame alignment circuit  
A frame alignment circuit including at least a first series-to-parallel data converter having a shift register for accumulating series data, a latch circuit for converting the accumulated data into...
5483539 Programmable PCM/TDM demultiplexer  
A programmable PCM/TDM demultiplexer including an FA function unit including Frame Alignment Logic (FAL) hardware controlled by a Programmable Frame Alignment Controller (PFAC), and accompanied by...
EP0379384B1 A phase adjustment circuit  
Abstract of EP0379384 A phase adjustment circuit uses a broad band circuit for processing a plurality of high speed highway data comprising m bit frames. The phase adjustment circuit provides a...
5327434 Frame alignment circuit  
A frame alignment circuit comprises a first series-to-parallel data converting means comprising a first shift register for accumulating a series data, a first latch circuit for converting the...
EP0285158B1 Frame synchronizing apparatus  
Abstract of EP0285158 Disclosed is a frame synchronizing apparatus in a receiving equipment for receiving digital signals for PCM communication. The digital signals consist serial signals at a...
EP0249935B1 Frame synchronizing circuit  
EP0411014B1 HIGH SPEED DIGITAL SIGNAL FRAMER-DEMULTIPLEXER  
Abstract not available for EP0411014 Abstract of corresponding document: US4835768 A framer-demultiplexer circuit provides means for reducing the high serial bit-stream rate of byte-interleaved...
EP0561039A1 A frame alignment circuit.  
A frame alignment circuit comprises a first series-to-parallel data converting means comprising a first shift register for accumulating a series data, a first latch circuit for converting the...
5014272 Frame synchronizer for detecting misframes with different shift patterns  
A frame synchronizer is adapted to receive an incoming high-speed TDM (time division multiplex) signal of a framed structure containing, at frame intervals, a sequence of identical synchronization...
4991975 Division multiplexing and demultiplexing means lightwave communication system comprising optical time  
Disclosed is a time division multiplexed optical communication system that is capable of operation at relatively high bit rates and that is relatively stable and immune to crosstalk and noise. The...
EP0379384A2 A phase adjustment circuit.  
A phase adjustment circuit uses a broad band circuit for processing a plurality of high speed highway data comprising m bit frames. The phase adjustment circuit provides a master frame pulse based...
EP0333122A2 Method and apparatus for frame synchronization.  
A frame synchronization method in which a synchronization detection of a frame synchronization signal using one of n-multiplexed frame synchronization signals derived from a sequence of frame...
4811341 Hierarchical data transmission system  
A hierarchical data transmission system outputs a high speed second data train by step-by-step multiplexing a plurality of first data trains. A first signal processing part operates at the...
EP0285158A2 Frame synchronizing apparatus.  
Disclosed is a frame synchronizing apparatus in a receiving equipment for receiving digital signals for PCM communication. The digital signals consist serial signals at a rate of f0 (bps). The...
EP0249935A2 Frame synchronizing circuit.  
A frame synchronizing circuit uses parallel processing of a received multiplexed signal to detect frame synchronization. The input signal is separated into a predetermined number of signal trains....
4602367 Method and apparatus for framing and demultiplexing multiplexed digital data  
If each data channel comprising a set of multiplexed data channels contains channel identity information, a single framing detector operating on one channel can provide a framing detection...
4168398 Initial acquisition signal detection system for TDMA satellite communication  
A low level initial acquisition signal consisting of a continuous wave signal portion followed by a phase-modulated signal portion is transmitted via a satellite to a receiving station. The...
4010325 Framing circuit for digital signals using evenly spaced alternating framing bits  
In a digital multiplexer which employs pulse stuffing and a plurality of signaling bits including evenly spaced framing bits, a framing circuit consists essentially of a pair of flip-flops which...
Matches 1 - 26 out of 26