Matches 1 - 30 out of 30
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6477584 Message FIFO empty early warning method  
A method of insuring continuous processing of messages from a Work FIFO in a message passing interface between a requesting module and a receiving module. Each module has access to two queues in...
5974482 Single port first-in-first-out (FIFO) device having overwrite protection and diagnostic capabilities  
A FIFO single port storage device and methods for using the same are disclosed. The FIFO device includes a single port memory for storing data from a host processor. The single port memory is...
5950014 Methodology for pull model invocation  
A method for dynamic reconfiguration of a message-passing interface from a Push model to a Pull model is disclosed. In the Push model, a host computer device moves data stored in a host local...
5941964 Bridge buffer management by bridge interception of synchronization events  
A bus bridge which intercepts synchronization events and selectively flushes data in buffers within the bridge is disclosed. The bridge insures data consistency by actively intercepting...
5941960 Host initiated PCI burst writes utilizing posted write buffers  
A bridge logic takes write cycles that appear one at a time as an address followed by an associated data word on a host bus, detects consecutive addresses, and uses this information to create burst...
5897667 Method and apparatus for transferring data received from a first bus in a non-burst manner to a second bus in a burst manner  
A bridge logic takes non-burst write cycles that appear one at a time as an address followed by an associated data word on a first bus, detects consecutive addresses, and uses this information to...
5664117 Apparatus and method for prefetching data to load buffers in a bridge between two buses in a computer  
A bridge circuit providing for efficient data transfer between a first bus and a second bus in a computer system. The bridge circuit receives an address indicating a memory location storing a data...
5222232 Apparatus and method for monitoring PROM access in a microcomputer  
Each time a programmable read only memory is written, the memory device of the programmable read only memory is degraded a certain extent. This invention relates to a microcomputer having a...
4845661 Display information processing apparatus  
A display information processing apparatus includes a central processing unit, a dual port memory including a first storage area and a second storage area, a display address generator, a timing...
EP0312238A2 FIFO buffer controller.  
A FIFO (first in first out) control circuit (111) for providing address information to a FIFO memory (112). Two up counters (117,118) are used; one to provide the write address and one to provide...
4734850 Data process system including plural storage means each capable of concurrent and intermediate reading and writing of a set of data signals  
A data processing system having a plurality of FIFO memories and a plurality of ALUs and in which a FIFO memory may be selected to receive a set of data signals from an ALU and at the same time to...
EP0206743A2 Zero fall-through time asynchronous FIFO buffer with nonambiguous empty/full resolution.  
A First In First Out shift register memory system (10) with a plurality of memory word registers (50) having data inputs connected to a common data-in bus (16), and a plurality of data outputs...
4527236 Communications device for data processing system  
A communications device for transferring process data between a data processing system and an external device at high speed. The communications device receives command signals from a user process...
4510581 High speed buffer allocation apparatus  
A high speed data buffer array allocation circuit is provided in association with a plurality of buffer memories for directing high speed data into the memories. The circuitry employs high speed...
4507760 First-in, first-out (FIFO) memory configuration for queue storage  
A first-in, first-out queue has a random access memory (RAM) for storing a plurality of information words, seriatim. A controller is used to insure that only after a complete message, comprising...
4414628 System for displaying overlapping pages of information  
Various size frames or pages of information elements stored in a computer system can be simultaneously displayed on a screen-based terminal. The computer processor identifies the screen position...
4395757 Process synchronization utilizing semaphores  
An information structure called a semaphore serves as a signalling mechanism in process synchronization. The semaphore is used to relate a process and an event which do not appear simultaneously....
4374409 Method of and system using P and V instructions on semaphores for transferring data among processes in a multiprocessing system  
Synchronization of processes in a multiprogramming/multiprocessing system is provided by P and V instructions that are executed during execution of processes and operate on data structures known as...
4326264 Display system for a supervisory control system  
An automatic supervisory control system is arranged to provide monitoring and supervisory functions in a noisy electrical environment over communication channels which are also noisy and generally...
4285038 Information transfer control system  
The system is constructed to operate to mutually transfer information between a processor and a terminal device via a first-in/first-out type stack. Signal generators are provided on the input and...
4271480 Apparatus enabling the transfer of data blocks of variable lengths between two memory interfaces of different widths  
An apparatus for transferring data blocks of variable lengths between intaces of different widths. The apparatus includes a series memory of the first-in, first-out type (FIFO) and an interface...
4208714 Apparatus for giving priority to certain data signals  
The invention relates to an apparatus in a computer system for transmitting signals from one processor to one or several other processors connected to the same bus system so that the signals having...
4179031 Document dispensing system  
A document dispensing system for dispensing documents or bills from a source to a customer access receptacle or a reject bin depending upon certain characteristics of the bills or the manner in...
4175287 Elastic store slip control circuit apparatus and method for preventing overlapping sequential read and write operations  
The method of and circuitry for controlling the "slip" of data between input and output of a multisection memory circuit wherein the memory is used in an elastic store mode. This is accomplished...
4171538 Elastic store slip circuit apparatus for preventing read and write operations interference  
A method of and circuitry for the operations of reading from and writing into a memory, each of which operations occurs on a sequential basis and each of which has different clock rates while...
4145755 Information transferring apparatus  
The system comprises a central information processing unit, an input/output unit, a first-in first-out stack which is connected to receive information from the central information processing unit...
4125870 Information transfer control system  
An information transfer control system for controlling the information transfer between a data processor and an input/output device is disposed between the data processor and the input/output...
4106091 Interrupt status indication logic for polled interrupt digital system  
An interface adaptor couples peripheral equipment to a bidirectional data bus and an address bus of a digital system. A plurality of interrupt sources are provided on such an interface adaptor...
4079234 Manual key input apparatus  
A manual key input apparatus, which comprises a memory for successively storing the characters of each of a plurality of words includes in one record which is supplied from a key input device and...
4056849 High speed buffered tape reader with low tape stress  
A high speed tape reader has a buffer positioned between the read head output and the reader output which may be connected to the input of a data receiving station. When the data receiving station...
Matches 1 - 30 out of 30