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7379382 System and method for controlling timing of output signals  
The timing of output signals can be controlled by coupling a digital signal through a signal distribution tree having a plurality of branches extending from an input node to respective clock inputs...
7366966 System and method for varying test signal durations and assert times for testing memory devices  
A testing system includes a phase interpolator receiving a clock signal. An output of the phase interpolator is coupled to both a first signal distribution tree that includes a first delay line in...
Matches 1 - 2 out of 2