Match Document Document Title
US20150311924 TELECONTROL FOR AUTOMOBILE COMPRISING A DEVICE FOR SUPPRESSING MAGNETIC COUPLING  
The invention relates to a telecontrol (TEL) tier the locking/unlocking and the starting of a motor vehicle comprising:—an electronic circuit (ELEC) comprising at least one pathway comprising an...
US20150311923 TECHNIQUES FOR DIFFERENTIATING BETWEEN SIGNALS OF DIFFERENT RADIO ACCESS TECHNOLOGIES  
Systems and methods for differentiating between LTE and Wi-Fi signals based on distinguishing characteristics thereof are disclosed. A radio or receiver configured for processing signals...
US20150311922 System and Method for a Radio Frequency Integrated Circuit  
In accordance with an embodiment, a radio frequency integrated circuit (RFIC) includes an adjustable capacitance coupled to an input terminal of the RFIC, and a first single-pole multiple-throw...
US20150311921 MEMORY CONTROLLER, STORAGE DEVICE AND DECODING METHOD  
According to one embodiment, a memory controller includes a first decoder that decodes a block product code read out from a non-volatile memory and calculates reliability information of each...
US20150311920 DECODER FOR A MEMORY DEVICE, MEMORY DEVICE AND METHOD OF DECODING A MEMORY DEVICE  
According to embodiments of the present invention, a decoder for a memory device is provided. The decoder includes an error detection circuitry configured to multiply a vector of one or more data...
US20150311919 CODE DESIGN AND HIGH-THROUGHPUT DECODER ARCHITECTURE FOR LAYERED DECODING OF A LOW-DENSITY PARITY-CHECK CODE  
A low-density parity-check (LDPC) decoder may receive LDPC coded data. The LDPC decoder may perform a decoding iteration associated with decoding the LDPC coded data. The decoding iteration may be...
US20150311918 EFFICIENT STORAGE ARCHITECTURE FOR LOW-DENSITY PARITY-CHECK DECODING  
A low-density parity-check (LDPC) decoder may comprise a shift register configured to receive LDPC coded data, perform an iteration associated with decoding the LDPC coded data, and provide a...
US20150311917 LOW DENSITY PARITY CHECK DECODER  
A method and system for decoding low density parity check (“LDPC”) codes. A method and system for decoding low density parity check (“LDPC”) codes. An LDPC code decoder includes decoding circuitry...
US20150311916 ENCODING AND DECODING OF DATA  
An apparatus run-length encodes data to obtain a sequence of records. The data are associate to grid points of a grid and the records are defined such that they allow embedding data associated to...
US20150311915 FIELD LEVEL COMPRESSION IN PARALLEL DATA FLOWS  
According to one embodiment of the present invention, a system selectively compresses data fields in a parallel data flow. The system identifies within an execution plan for the parallel data flow...
US20150311914 RECONFIGURABLE ANALOG-TO-DIGITAL CONVERTER, IMAGE SENSOR AND MOBILE DEVICE INCLUDING THE SAME  
An image sensor includes a pixel array, a controller, and a plurality of analog-to-digital converters. The pixel array includes a plurality of pixels coupled to column lines, respectively, and the...
US20150311913 DISTRIBUTED VIRTUAL-GROUND SWITCHING FOR SAR AND PIPELINED ADC  
Systems, apparatuses, and methods are provided for analog-to-digital converters (ADCs), such as successive-approximation-register (SAR) ADCs and pipelined ADCs that utilize distributed...
US20150311912 ANALOG-TO-DIGITAL CONVERTER AND AN IMAGE SENSOR INCLUDING THE SAME  
An analog-to-digital converter includes a modulator, a controller, and a digital filter. The modulator generates a modulated signal based on an analog signal. The controller generates a weight...
US20150311911 Quantum Tunneling Devices and Circuits with Lattice-Mismatched Semiconductor Structures  
Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched...
US20150311910 CURRENT COMPARATOR OFFSET CALIBRATION IN DIGITAL-TO-ANALOG CONVERTER CALIBRATIONS  
In an aspect of the disclosure, a method and an apparatus are provided for calibrating a current comparator circuit associated with a DAC element. The apparatus receives an output of a current...
US20150311909 CONVERTER FOR ANALOG INPUTS  
A device having a first oscillator circuit configured to generate a first signal with a first frequency based on an analog input and external characteristics, and a second oscillator circuit...
US20150311908 LOCAL OSCILLATOR INTERFERENCE CANCELLATION  
Systems and methods for mitigating interference in a Local Oscillator (LO) signal generated by a Phase-Locked Loop (PLL) are disclosed. In one embodiment, a system includes a PLL and an error...
US20150311907 SAMPLING CIRCUIT MODULE, MEMORY CONTROL CIRCUIT UNIT, AND METHOD FOR SAMPLING DATA  
A sampling circuit module, a memory control circuit unit, and a method for sampling data are provided. The sampling circuit module includes a state machine circuit, a first delay line circuit, a...
US20150311906 OSCILLATOR CROSSTALK COMPENSATION  
Systems and methods for mitigating crosstalk between controlled oscillators of Phase-Locked Loops (PLLs) are disclosed. In one embodiment, a system includes a first PLL including a first...
US20150311905 ALL-DIGITAL PHASE-LOCKED LOOP (ADPLL)  
An all-digital phase-locked loop (ADPLL) is provided. The ADPLL comprises a first circuit and a second circuit. The first circuit is configured to monitor a first signal and set a voltage of a...
US20150311904 SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE  
A semiconductor device includes a clock input circuit that receives an external clock signal, a PLL circuit for input timing control that performs phase adjustment between the external clock...
US20150311903 Communication Over Generator Bus  
A generator system includes at least one generator, at least one generator controller, and a power bus. The power bus transmits power to a load circuit. Data communications are also transmitted by...
US20150311902 PLL WITH ACROSS-STAGE CONTROLLED DCO  
In some embodiments, a PLL comprises an across-stage DCO controller and a DCO. The across-stage DCO controller comprises a first detector and a second tuning code adjustor. The first detector...
US20150311901 A NONVOLATILE MAGNETIC LOGIC DEVICE  
In one aspect, a nonvolatile magnetic logic device comprises an electrically insulating layer, a write path, and a read path. The write path comprises a plurality of write path terminals and a...
US20150311900 PROGRAMMABLE LOGIC CIRCUIT AND NONVOLATILE FPGA  
A programmable logic circuit according to an embodiment includes: a first programmable device with a first and second terminals, a resistance of the first programmable device being changeable from...
US20150311899 VIRTUALIZATION OF PROGRAMMABLE INTEGRATED CIRCUITS  
A programmable IC includes a plurality of programmable resources, a plurality of shareable logic circuits coupled to the plurality of programmable resources, and a virtualization circuit. The...
US20150311898 SPARE GATE CELL FOR INTEGRATED CIRCUIT  
Spare gate cells for inclusion in an integrated circuit have multiple inputs and outputs and are capable of selectively performing, concurrently, multiple logic functions on signals appearing at...
US20150311897 SEMICONDUCTOR DEVICE  
A dynamic reconfigurable semiconductor device is provided. The semiconductor device includes two logic blocks, a pass transistor, two selection transistors and a precharge transistor. The two...
US20150311896 SOURCE DRIVING CIRCUIT AND RESISTOR RENORMALIZATION METHOD  
A resistor renormalization method for a source driving circuit is provided, wherein the source driving circuit includes a plurality of resistors coupled in series, and the resistors respectively...
US20150311895 HIGH PERFORMANCE RECONFIGURABLE VOLTAGE BUFFERS  
In this disclosure, new structures for high-performance voltage buffers (source followers and emitter followers) are described. The structures achieve high performance (linearity) and reduce power...
US20150311894 Systems and Methods for Sensing Current Through a Low-Side Field Effect Transistor  
Systems and techniques detecting a reverse current are disclosed. An apparatus comprises a switching circuit coupled to a load and a reference node. The switching circuit may be capable of...
US20150311893 METHOD, APPARATUS AND SYSTEM FOR AN EDGE RATE CONTROLLED OUTPUT BUFFER  
A circuit for minimizing variation over process, voltage and temperature for edge rate over and propagation delay. The circuit includes at least two first buffers for decoupling large nonlinear...
US20150311892 ELECTRONIC CONTROL DEVICE  
Provided is an electronic control device capable of preventing all of semiconductor relays from being forcibly controlled to be opened by a self-protection shutoff function. An electronic control...
US20150311891 HIGH VOLTAGE BOOTSTRAP GATE DRIVING APPARATUS  
A high voltage bootstrap gate driving apparatus is provided. The gate driving apparatus includes a high-end transistor, a low-end transistor, a buffer, a boost capacitor, and a high voltage...
US20150311890 SIGNAL GENERATOR, SIGNAL GENERATION METHOD, AND NUMERICALLY CONTROLLED OSCILLATOR  
A waveform conversion unit (42) of a numerically controlled oscillator has a cosine table (101) and a sine table (102) in which parameters for cosine wave and sine wave signal generation are...
US20150311889 CIRCUITRY FOR PHASE DETECTOR  
A circuit for a phase detector is provided. A first buffer of the circuit receives a data signal and generates a first modified data signal using the data signal. A notifier receives the data...
US20150311888 CLOCK FREQUENCY MODULATION METHOD AND CLOCK FREQUENCY MODULATION APPARATUS  
Embodiments of the present invention provide a clock frequency modulation method and a clock frequency modulation apparatus. The method includes: determining N digital clocks according to a first...
US20150311887 ANALOG SIGNAL GENERATION CIRCUIT  
An analog signal generation circuit is provided. The analog signal generation circuit includes a first control section that generates a first control signal; a second control section that...
US20150311886 SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF  
The circuit includes a first wiring for supplying a power supply potential to a signal processing circuit, a transistor for controlling electrical connection between the first wiring and a second...
US20150311885 POWER-UP SIGNAL GENERATION CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME  
A power-up signal generation circuit including a pre-power-up signal generation block operates by using a first power supply voltage, and generates a pre-power-up signal when the first power...
US20150311884 CHARGE-RECYCLING CIRCUITS INCLUDING SWITCHING POWER STAGES WITH FLOATING RAILS  
In one embodiment, a circuit comprises a first switching transistor and a second switching transistor. The first switching transistor and the second switching transistor are coupled in series...
US20150311883 System and Method for a Switchable Capacitance  
In accordance with an embodiment, a switchable capacitance circuit includes a plurality of capacitance-switch cells that each have a capacitance circuit having a capacitance between a first...
US20150311882 A FILTER ASSEMBLY AND A METHOD OF FILTERING  
A filter assembly is provided comprising a first filter (12), a notch filter (26, 26′), and a phase-shifter (36). The first filter has a stop-band. The filter assembly is configured to, in use,...
US20150311881 ANTENNA DEVICE  
A stray capacitance is generated between an antenna element and a ground electrode. A capacitance detection circuit detects the stray capacitance. An antenna matching circuit, is provided along a...
US20150311880 Electric Power Transmission Device and Electric Power Transmission Method  
An electric power transmission device characterized in that the electric power transmission device includes a power transmitting unit which wirelessly transmits an electric power and a power...
US20150311879 MICROPHONE BIAS CIRCUIT  
A bias circuit supplies a bias voltage VBIAS to a microphone. A variable gain amplifier amplifies a reference voltage VREF. A low-pass filter removes a high-frequency component from the output of...
US20150311878 RECEIVING APPARATUS THAT RECEIVES PACKET SIGNAL  
An RF unit receives predetermined signals. The RF unit amplifies the received signals. A gain control unit controls the gain at the RF unit based on the amplified signal and has the RF unit use...
US20150311877 Automatic Gain Control in a Heterogeneous Mobile Communication Network  
The invention refers to performing an automatic gain control—AGC—with respect to a received signal comprising a plurality of consecutive subframes (S1 S12), comprising identifying subframes that...
US20150311876 Amplifiers and Related Biasing Methods and Devices  
Biasing methods and devices for amplifiers are described. The described methods generate bias voltages proportional to the amplifier output voltage to control stress voltages across transistors...
US20150311875 SENSE AMPLIFIER WITH IMPROVED RESOLVING TIME  
Sense amplifiers that can provide improved resolving times can be used, for example, in clock and data recovery circuits. The sense amplifiers sense the value of a differential input signal using...