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US20080066057 |
Testing Internationalized Software Using Test Resource File and Test Font
An efficient testing method is provided for internationalized software executed in a plurality of language environments. The method includes mock-translating an externalized resource file written i...
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US20080066056 |
Inspection Apparatus, Program Tampering Detection Apparatus and Method for Specifying Memory Layout
A debugger 100 is connected to a multi-processor system configured so that each processor autonomously accesses a shared memory and loads a program stored in the shared memory into storage of the...
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US20080066055 |
Reversing execution of instructions in a debugger
A method can include receiving navigational debug input from a debugger interface including input to traverse input code in a plurality of modes; in response to receiving the navigational debug inp...
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US20080066054 |
SYSTEM AND METHOD FOR DETERMINING WHEN AN EJB COMPILER NEEDS TO BE EXECUTED
A system for determining when an EJB compiler needs to be executed, comprising: a server, including an EJB or plurality of EJBs and an EJB compiler operating thereon that determines a first snapsho...
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US20080066053 |
Automatically Generating a Second Graphical Program Based on a First Graphical Program
A system and method for automatically generating a second graphical program based on a first graphical program. The first graphical program may be associated with a first programming development en...
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US20080066052 |
METHODS AND SYSTEMS FOR DETERMINING A FORMULA
In a method to help a user determine a formula, (e.g., a fact, rule, or principle expressed in scientific, mathematical, technical, etc. symbols), a user may input an indication of the formula in a...
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US20080066051 |
MANAGING APPLICATION CUSTOMIZATION
A facility is provided for managing application customization. In various embodiments, an application associated with the facility receives an indication of an application identifier that identifie...
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US20080066050 |
CALCULATING DEFECT DENSITY BY FILE AND SOURCE MODULE
Techniques are provided for tracking and analyzing defect density by source file or module. Defect density is the number of distinct defects which required changes to be made (to fix the defect) to...
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US20080066049 |
METHOD FOR ENFORCING CHANGE POLICY BASED ON PROJECT STATE
A set of tools and other mechanisms automatically enforce software development change policies by providing a way to map physical source control system codelines to projects and by providing a way ...
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US20080066048 |
Method And System For Managing The Lifecycle Of A Service Oriented Architecture
Managing the lifecycle of a service oriented architecture (SOA). The method may include selecting a subset of a plurality of objects of the SOA for lifecycle management in accordance with the requi...
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US20080066047 |
System and method for employing patterning process statistics for ground rules waivers and optimization
A system and method of employing patterning process statistics to evaluate layouts for intersect area analysis includes applying Optical Proximity Correction (OPC) to the layout, simulating images ...
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US20080066046 |
Hardware definition language generation for frame-based processing
An automatic code generation application is used to automatically generate code and build programs from a textual model or graphical model for implementation on the computational platform based on ...
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US20080066045 |
Methods and system for configurable domain specific abstract core
The present invention provides a configurable domain specific abstract core (DSAC) for implementing applications within any domain. The DSAC comprises at least one function specific abstract module...
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US20080066044 |
Enhanced Routing Grid System And Method
Routing systems and methods are provided having various strategies for optimizing and evaluating possible routes for netlist connections. In one embodiment, a data structure or matrix provides cost...
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US20080066043 |
METHOD AND SYSTEM FOR CLOCK TREE GENERATION
A method for generating a clock tree between a clock source and a plurality of logic units is disclosed. The logic units are defined to operate according to a clock signal generated from the clock ...
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US20080066042 |
Method and system for creating, viewing, editing, and sharing output from a design checking system
Existing text output from a design rule checker is put in appropriate input format, and automatically displayed as text within a design tool using existing design tool capabilities, such as highlig...
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US20080066041 |
Auxiliary pattern generation for cell-based optical proximity correction
Method and apparatus for designing an integrated circuit. A new layout is generated for at least one standard cell that incorporates an auxiliary pattern on a gate layer to facilitate cell-based op...
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US20080066040 |
Integrated Circuit Chip With Repeater Flops and Method for Automated Design of Same
An integrated circuit (IC) chip having repeaters for propagating signals along relatively long wires that extend between and among lower-level physical blocks of the IC chip, wherein the repeaters ...
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US20080066039 |
Semi-Flattened Pin Optimization Process for Hierarchical Physical Designs
In a hierarchical semiconductor digital unit comprised of a plurality of macro functional logic blocks, each of said macro functional logic blocks comprised of a plurality of leaf cells, each of sa...
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US20080066038 |
Method and apparatus for designing semiconductor integrated device using noise current and impedance characteristics of input/output buffers between power supply lines
In a method for designing a semiconductor integrated device, there are prepared a first power supply cell having a first decoupling capacitance and a second power supply cell having a second decoup...
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US20080066037 |
METHOD TO REDUCE THE WIRELENGTH OF ANALYTICAL PLACEMENT TECHNIQUES BY MODULATION OF SPREADING FORCES VECTORS
A method of force directed placement programming is presented. The method includes sorting objects of a netlist for placement by magnitude of their spreading force and selecting a plurality of the ...
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US20080066036 |
Chip Having Timing Analysis of Paths Performed Within the Chip During the Design Process
An integrated Circlet chip is made using Genie, a described computer chip design tool which can analyze the data contained within an entire endpoint report, compute relationships between paths base...
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US20080066035 |
Method and design system of semiconductor integrated circuit
Disclosed is a design method for optimizing the timings at which a plurality of power supply switches in a power gating circuit in a semiconductor integrated circuit by the steps of (A) providing a...
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US20080066034 |
Method and System for Performing Heuristic Constraint Simplification
A method for performing verification is disclosed. The method includes selecting a first computer-design constraint for simplification and applying structural reparamaterization to simplify the fir...
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US20080066033 |
Method and System for Performing Heuristic Constraint Simplification
A method for performing verification is disclosed. The method includes selecting a first computer-design constraint for simplification and applying structural reparamaterization to simplify the fir...
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US20080066032 |
MEASURE OF ANALYSIS PERFORMED IN PROPERTY CHECKING
The amount of analysis performed in determining the validity of a property of a digital circuit is measured concurrent with performance of the analysis, and provided as an output when a true/false ...
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US20080066031 |
Method For Verification Using Reachability Overapproximation
A method, system and computer program product for verifying that a design conforms to a desired property is disclosed. The method comprises receiving a design, a first initial state of the design, ...
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US20080066030 |
Systems, Methods, and Media for Block-Based Assertion Generation, Qualification and Analysis
Systems, methods, and media for block-based assertion generation, qualification and analysis are disclosed. Embodiments may include a method for generating assertions for verifying a design. The em...
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US20080066029 |
METHOD AND SYSTEM ALERTING AN ENTITY TO DESIGN CHANGES IMPACTING THE MANUFACTURE OF A SEMICONDUCTOR DEVICE IN A VIRTUAL FAB ENVIRONMENT
A design coordination engine coordinates design implementation among a manufacturing facility, a customer, an IP vendor, and a design group during the design phase of a semiconductor device. The de...
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US20080066028 |
Logic circuit verifying apparatus
A logic circuit verifying apparatus is provided which can control function verification in response to reports in progress as to the function verification. A logic circuit verifying apparatus is p...
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US20080066027 |
Computationally efficient design rule checking for circuit interconnect routing design
Techniques are described which decrease DRC (design rule check) marking time, e.g., in a circuit interconnect router, by capitalizing on repetitious relationships between interconnect elements (and...
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US20080066026 |
Power network analyzer for an integrated circuit design
A design of an integrated circuit device, in which locations of power wires and memory/logic circuitry are known, is analyzed by at least: identifying intersections of power wires with one another,...
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US20080066025 |
Method for analyzing characteristic of circuit included in integrated circuit based on process information and the like
A circuit analyzing method of the present invention comprises the steps of (a) applying, for a characteristic having a variation width of characteristics of an element included in a circuit to be a...
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US20080066024 |
ENABLING NETLIST FOR MODELING OF TECHNOLOGY DEPENDENT BEOL PROCESS VARIATION
A method, system and program product are disclosed that enable a netlist of an integrated circuit (IC) design for modeling of technology dependent back-end-of-line (BEOL) process variation. In one ...
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US20080066023 |
METHOD AND APPARATUS FOR FAST IDENTIFICATION OF HIGH STRESS REGIONS IN INTEGRATED CIRCUIT STRUCTURE
Roughly described, high-stress volumetric regions of an integrated circuit structure are predicted by first scanning one or more layout layers to identify planar regions of high 2-dimensional stres...
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US20080066022 |
METHOD AND APPARATUS FOR OPTIMIZING THERMAL MANAGEMENT SYSTEM PERFORMANCE USING FULL-CHIP THERMAL ANALYSIS OF SEMICONDUCTOR CHIP DESIGNS
A method and apparatus for optimizing cooling system performance using full-chip thermal analysis of semiconductor chip designs is provided. One embodiment of a novel method for optimizing the cool...
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US20080066021 |
Method of optimal parameter adjustment and system thereof
A method of optimal parameter adjustment includes randomly generating a first parameter group, setting each parameter into a device to detect a fitness function value corresponding to each paramete...
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US20080066020 |
System and Method to Capture and Manage Input Values for Automatic Form Fill
A system for automatically completing fields in online forms, such as login forms and new user registration forms, which employs a Master Cookie File containing sets of records associated with the ...
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US20080066019 |
Compact Batch Viewing Techniques for use in Batch Processes
A data collection and viewing application associated with a batch process control system used within a process plant provides a user interface that allows a user to quickly and easily examine a par...
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US20080066018 |
AGENDA DETERMINATION IN AN ELECTRONIC DEVICE
A method of displaying an agenda at an electronic device includes retrieving, from at least one database of the electronic device, calendared events that meet a set of constraints, determining free...
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US20080066017 |
Displaying items using a reduced presentation
To reduce the amount of space needed to display an item, while still retaining meaning for the item, a reduced presentation is determined for the item. The reduced presentation is based on analysis...
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US20080066016 |
Media manager with integrated browsers
Methods and systems that improve the way media is played, sorted, modified, stored and cataloged are disclosed. One aspect relates to a browse window that allows a user to navigate through and sele...
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US20080066015 |
VISUAL DISPLAY OF AUTOMATED TELEPHONE SYSTEM MENUS
An efficient method for dealing with automated telephone system menus is provided herein. The method includes a new signaling from origination of the phone menu system to allow for visual display o...
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US20080066014 |
Image Based Turing Test
A system and method for determining if a computer user is a human or a computer program. A computer user is presented with a series of images, the series of images including: at least two related i...
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US20080066013 |
Rendering Icons Along A Multidimensional Path Having A Terminus Position
Icons are arranged in foreground background positions in an interface environment to define a multidimensional path extending from a terminus. The icons transition between the foreground position a...
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US20080066012 |
Method and System for Reconfiguring a Selection System Based on Layers of Categories Descriptive of Recordable Events
A method and system for selection of recordable events from among a set of recordable events, based on categories and sub-categories, that cumulatively describe a substantial portion of the entire ...
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US20080066011 |
SYSTEM AND METHOD FOR THE VISUALIZATION OF SPORTS INFORMATION
The present invention is directed to a system and method for visualizing information, e.g., information regarding a sporting event. The method may comprise identifying an event type and generating ...
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US20080066010 |
User Interface With Menu Abstractions And Content Abstractions
Media menu items are generated within a media interface environment. Media menu item abstractions are generated, one of the media menu item abstractions arranged in a foreground position, and one o...
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US20080066009 |
Visual test automation tool for message-based applications, web applications and SOA systems
In one embodiment, a graphical user interface (“GUI”) enables the efficient composition and execution of a test of a message-based application, Web application, or SOA systems' capacity to rece...
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US20080066008 |
Visual Control Interface for Controlling Multi-Window Display System
A visual interface for controlling a multi-window display system is disclosed. The visual interface includes at least one session icon, a multiple of window icons and at least one link icon. When t...
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