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US20080052498 |
RUNTIME CODE MODIFICATION IN A MULTI-THREADED ENVIRONMENT
A code region forming part of a computer program is modified during execution of the computer program by a plurality of threads. In one aspect, identical modification instructions are provided to...
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US20080052497 |
PARALLEL OPERATION DEVICE ALLOWING EFFICIENT PARALLEL OPERATIONAL PROCESSING
In arithmetic/logic units (ALU) provided corresponding to entries, an MIMD instruction decoder generating a group of control signals in accordance with a Multiple Instruction Multiple Data (MIME)...
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US20080052496 |
Method And Apparatus For Priority Based Data Processing
When performing simulation of a system having a plenty of components such as a physical phenomenon and a social phenomenon, there has been a problem that an enormous calculation time is required if...
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US20080052495 |
SYSTEM AND METHOD OF EXECUTION OF REGISTER POINTER INSTRUCTIONS AHEAD OF INSTRUCTION ISSUES
A pipeline system and method includes a plurality of operational stages. The stages include a pointer register stage which stores pointer information and updates, and a rename and dependence...
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US20080052494 |
Method And Device For Operand Processing In A Processing Unit
A method and a device for operand processing in a processing unit having at least two execution units, which are able to be operated at a predefinable clock cycle. The execution units are...
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US20080052493 |
PORTABLE ELECTRONIC DEVICE AND PROCESSOR THEREFOR
A processor for a portable electronic device. The processor includes a RISC (reduced instruction set computing) core a CISC (complex instruction set computing) core, a video accelerator circuit and...
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US20080052492 |
PARALLEL DATA PROCESSING APPARATUS
A data processing apparatus includes a plurality of processing elements arranged in a single instruction multiple data array. The apparatus includes an instruction controller operable to receive...
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US20080052491 |
Manifold Array Processor
An array processor includes processing elements ( 00, 01, 02, 03, 10, 11, 12, 13, 20, 21, 22, 23, 30, 31, 32, 33 ) arranged in clusters (e.g., 44, 46, 48, 50 ) to form a rectangular array ( 40 )....
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US20080052490 |
Computational resource array
A sea of computational resources includes a number of computational resources, each of which is a member of one or more nearest neighbor pairings. Each nearest neighbor pairing has an upstream...
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US20080052489 |
Multi-Pipe Vector Block Matching Operations
A vector processor includes a set of vector registers for storing data to be used in the execution of instructions and a vector functional unit coupled to the vector registers for executing...
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US20080052488 |
Method for a Hash Table Lookup and Processor Cache
The present, invention improves the hash table lookup operation by using a new processor cache architecture. A speculative processing of entries stored in the cache is combined with a delayed...
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US20080052487 |
NETWORK SWITCHING DEVICE AND CONTROL METHOD OF NETWORK SWITCHING DEVICE
A network switching device includes multiple ports, multiple switching processors, and a table manager. The switching processors respectively have an address table, a output port specification...
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US20080052486 |
Method and Apparatus for Translating a Virtual Address to a Real Address Using Blocks of Contiguous Page Table Entries
A page table mechanism translates virtual addresses to real addresses. In a first aspect, page table entries are contained in equal-sized blocks, the entries within each block corresponding to...
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US20080052485 |
System For Synchronous Code Retrieval From An Asynchronous Source
The present invention discloses a computer-readable storage medium having computer-readable code embodied on the computer-readable storage medium, the computer-readable code including: program code...
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US20080052484 |
Method, apparatus, and computer program for image data processing
An image processing apparatus includes an input device, an encoder, a memory, a first allocator, a data block size determination mechanism, a second allocator, and a processor. The input device...
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US20080052483 |
THERMAL CONTROL OF MEMORY MODULES USING PROXIMITY INFORMATION
An information handling system includes a processor having access to a system memory. The system is operable to detect a thermal alert and identify an associated portion of system memory. The...
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US20080052482 |
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR CONTROLLING CLOCK LATENCY ACCORDING TO REORDERING OF BURST DATA
In an embodiment, a semiconductor memory device includes a clock latency that can be controlled responsive to whether or not an output order of burst data is reordered. The semiconductor memory...
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US20080052481 |
METHOD AND CIRCUIT FOR TRANSMITTING A MEMORY CLOCK SIGNAL
Embodiments of the invention generally provide a method and apparatus for transmitting and receiving clock signals. In one embodiment, the method includes receiving, at a memory device, a first...
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US20080052480 |
Data replication in a storage system
For a storage system having plural control units to which plural disk devices are connected, in the method for creating replication in a volume of the disk devices connected to different control...
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US20080052479 |
Storage system, method of controlling storage system, and storage device
The present invention provides a storage system and a method of controlling the storage system, in which a second site rapidly resumes system process when a first site is damaged. The storage...
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US20080052478 |
RELOCATING A LOGICAL VOLUME FROM A FIRST STORAGE LOCATION TO A SECOND STORAGE LOCATION USING A COPY RELATIONSHIP
Provided are a method, system, and article of manufacture for relocating a logical volume from a first storage location to a second storage location using a copy relationship. An operation is...
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US20080052477 |
CONTROLLING ACCESS TO NON-VOLATILE MEMORY
Access to non-volatile memory is controlled when a first data segment is loaded in the non-volatile memory from a hard disk, a weight is calculated for the first data segment stored in the...
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US20080052476 |
Probe-Based Data Storage Devices
A probe-based data storage device includes a storage surface having an array of A storage fields; a probe array comprising A probes for writing data to respective storage fields; and an apparatus...
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US20080052475 |
Ring optimization for data sieving writes
In one embodiment, a method and apparatus for ring optimization for data sieving writes is disclosed. The method includes dividing a file range to be written to via a data sieving write operation...
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US20080052474 |
Write data mask method and system
In various embodiments, dedicated mask pins are eliminated by sending a data mask on address lines of the interface. A memory controller receives a request for a memory write operation from a...
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US20080052473 |
INFORMATION PROCESSING APPARATUS
A system controller which controls a plurality of storage devices comprises a unit which divides data of processor bus width from a processor into a plurality of divided data, a first transfer unit...
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US20080052472 |
METHODS AND APPARATUS FOR REDUCING COMMAND PROCESSING LATENCY WHILE MAINTAINING COHERENCE
In a first aspect, a first method of reducing command processing latency while maintaining memory coherence is provided. The first method includes the steps of (1) providing a memory map including...
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US20080052471 |
DATA PROCESSING SYSTEM AND METHOD FOR EFFICIENT COMMUNICATION UTILIZING AN IG COHERENCY STATE
A cache coherent data processing system includes at least first and second coherency domains each including at least one processing unit and a cache memory. The cache memory includes a cache...
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US20080052470 |
RUNTIME REGISTER ALLOCATOR
Methods and arrangements for accessing a storage structure. Included are an arrangement for providing a storage access instruction, an arrangement for inputting an address into a storage structure...
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US20080052469 |
REDUCED MEMORY TRAFFIC VIA DETECTION AND TRACKING OF TEMPORALLY SILENT STORES
A computer implemented method, data processing system, and computer program product for reducing memory traffic via detection and tracking of temporally silent stores. When a memory store,...
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US20080052468 |
Methods, systems and computer readable medium for detecting memory overflow conditions
Representative is a computer-implemented method of detecting a buffer overflow condition. In accordance with the method, a destination address for a computer process' desired right operation is...
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US20080052467 |
System for restricted cache access during information transfers and method thereof
Instructions involving a relatively significant information transfer or a particular type of information transfer via a cache, or specified address ranges within cache causing a cache miss result...
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US20080052466 |
System and method for instruction-based cache allocation policies
A cache is configured to have a first cache line allocation policy for a memory address. An instruction associated with the memory address is received and a second cache line allocation policy is...
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US20080052465 |
Method of accessing cache memory for parallel processing processors
A method of accessing cache memory for parallel processing processors includes providing a processor and a lower level memory unit. The processor utilizes multiple instruction processing members...
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US20080052464 |
SELF-TRIGERRING OUTGOING BUFFERS
A buffer output manager facilitates automatic self-triggering output of buffer contents. At least one processes writes control data to at least one buffer, the control data being such that a buffer...
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US20080052463 |
Method and apparatus to implement cache-coherent network interfaces
A cache-coherent network interface includes registers or buffers addressable by a processor with reference to an address space of the processor. The processor and the cache-coherent network...
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US20080052462 |
Buffered memory architecture
A memory architecture includes at least one unbuffered dual inline memory module (DIMM). At least one advanced memory buffer (AMB) provides an interface between the at least one DIMM and a host...
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US20080052461 |
Portable storage device
Portable storage devices and methods of configuring portable storage devices are disclosed. In an exemplary implementation, a method for configuring a portable storage device may include receiving...
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US20080052460 |
METHOD AND APPARATUS FOR ACCESSING A MULTI ORDERED MEMORY ARRAY
A method and system for transferring data in a multi ordered memory array from a source memory array to a destination memory array, at least one of which is multi-ordered. A reading memory access...
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US20080052459 |
Redundant array of independent disks system
A redundant array of independent disks (RAID) system is provided, comprising a nonvolatile memory card array and a RAID controller. Wherein, the non-volatile memory card array consists of at least...
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US20080052458 |
NON-VOLATILE, ELECTRICALLY-PROGRAMMABLE MEMORY
A solid-state mass storage device is provided. The solid-state mass storage device defines a storage area adapted to store data; the storage area is adapted to be exploited for storing data with a...
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US20080052457 |
Methods and apparatus for improved raid 1 mirror re-synchronization
Systems and methods for improving performance of a re-synchronization process in a RAID level 1 storage system. In one aspect a local cache memory associated with the second or mirrored disk...
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US20080052456 |
APPARATUS, SYSTEM, AND METHOD FOR PREVENTING WRITE STARVATION IN A PARTITIONED CACHE OF A STORAGE CONTROLLER
An apparatus, system, and method are disclosed for preventing write starvation in a storage controller with access to low performance storage devices. A storage device allocation module is included...
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US20080052455 |
Method and System for Mapping Disk Drives in a Shared Disk Cluster
An information handling system may include a cluster. The cluster may comprise at least a first node and a second node. The first node may include a first shared disk mapping driver and a second...
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US20080052454 |
Methods and systems for a memory section
A storage system that may include one or more memory devices, a memory interface device corresponding to one or more of the memory devices, which are organized in sections, and a section...
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US20080052453 |
PORTABLE DATA STORAGE DEVICE
A portable data storage device ( 10 ) includes a universal serial bus (USB) coupling device ( 1 ) and an interface device ( 2 ) is coupled to the USB coupling device ( 1 ). The portable data...
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US20080052452 |
ELECTRONIC DATA FLASH CARD WITH VARIOUS FLASH MEMORY CELLS
An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit...
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US20080052451 |
FLASH STORAGE CHIP AND FLASH ARRAY STORAGE SYSTEM
A flash storage chip including a single circuit board, a microcontroller, a flash memory, and a peripheral component interconnect express (PCI Express) connecting interface is provided. The...
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US20080052450 |
SYSTEM AND METHOD OF UTILIZING OFF-CHIP MEMORY
One or more methods and/or systems of utilizing a memory external to an integrated circuit chip are presented. In one embodiment, the system comprises an Integrated circuit containing a logic...
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US20080052449 |
MODULAR COMMAND STRUCTURE FOR MEMORY AND MEMORY SYSTEM
A system including a memory system and a memory controller is connected to a host system. The memory system has at least one memory device storing data. The controller translates the requests from...
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