|
Match
|
Document |
Document Title |
|
|
DE102016112516B3 |
signal converter
The invention relates to an analog-to-digital converter (1) with a successive approximation for converting an analog input signal (VIN) into a digital output signal (DOUT). The analog-to-digital... |
|
|
DE102017102334A1 |
TECHNIQUES FOR REDUCING OFFSETS IN A ANALOG / DIGITAL CONVERTER
In one example, includes an analog / digital converter with successive approximation register, a first switched capacitor digital / analogue converter array assembly (switched capacitor DAC array... |
|
|
DE102015104814A1 |
A digital-analog converter circuit, a device for providing a radio-frequency transmission signal and a method of a digital-to-analog conversion
A digital-analog converter circuit comprising a plurality of digital-to-analog converter cells is provided. A first digital-to-analog converter cell of the plurality of digital-to-analog converter... |
|
|
DE102015104814B4 |
A digital-to-analog converter circuit, an apparatus for providing a radio frequency transmit signal and a method of digital-to-analog conversion
A digital-to-analog converter circuit (400) comprising a plurality of digital-to-analog converter cells (410) comprising: a first digital-to-analog converter cell (410-1) comprising a first cell... |
|
|
DE102014113922A1 |
Digital-to-analog converter circuits, apparatus and method for generating a high-frequency transmission signal and process a digital-to-analog conversion
A digital-to-analog converter circuit includes a plurality of digital-to-analog converter cells. The digital-to-analog converter circuit further comprises a control circuit which is adapted to an... |
|
|
DE112014001646T5 |
Digital-to-analog converters and digital-analog conversion device
The present invention provides a DA converter ready, capable of having a lower power consumption than in a conventional case by carrying out a time-interleaved DAC operation for realizing a high... |
|
|
DE102015102769A1 |
DIGITAL-ANALOG CONVERTER WITH CORRECTING parasitic ROUTING RESISTANCE
An embodiment of a digital-analog converter circuit comprises a resistance element network, which is connected to an output node, a switch network having a first plurality of switches that connect... |
|
|
DE202014010464U1 |
Active clock tree for data converter
A clock distribution system for reducing time mismatches in a converter which is configured to translate between an analog signal and a digital signal, and where demands on the timing are severe,... |
|
|
DE102014114540A1 |
METHOD AND DEVICE FOR REDUCING INDUCED CAPACITOR ISI IN DACS
A circuit may include a plurality of primary digital to analog (DAC) elements for converting a digital input signal into an analog output signal. A control circuit may control each primary DAC... |
|
|
DE102014114216B4 |
A digital-to-analog converter and a method of operating a digital-to-analog converter
A digital-to-analog converter (30, 100, 120, 150, 160, 180, 190, 192) comprising: a first portion (32, 122, 152, 162) having a first plurality of current flow paths, the binary weighted values in... |
|
|
DE102014114216A1 |
A digital-analog converter and a method for operating a digital-to-analog converter
A digital-to-analog converter (DAC), comprising: a first portion having a first plurality of current flow paths that form the binary weighted values in the DAC; and a second portion, which is... |
|
|
DE102014103362B4 |
High-frequency digital-to-analog converter
A high-frequency digital-to-analog converter (18 ') comprising: a first capacitor array (30) comprising a plurality of parallel-arranged switchable capacitor paths (32a, 32b), each switchable... |
|
|
DE102014103362A1 |
High-frequency digital-to-analog converter
An RF digital-to-analog converter comprises a first capacitor array, a first connecting node and a first controller. The first capacitor array comprises a plurality of parallel switchable... |
|
|
DE102014001559B4 |
Capacitive digital-to-analog converter
A transmitter (400) comprising: A digital signal processing unit (102) adapted to provide a digital send signal; A digital to analog converter (104) comprising: a matrix of cells, each cell... |
|
|
DE102014001559A1 |
Capacitive digital-to-analog converter
Some examples relate to a digital-to-analog converter (DAW). The DAC includes a digital signal input adapted for receiving a multi-bit digital input signal and a matrix of cells. Respective cells... |
|
|
DE102014001558A1 |
CAPACITIVE HIGH FREQUENCY DIGITAL ANALOG CONVERTER WITH SWITCHABLE LAST
The present disclosure relates to an apparatus and a method for increasing the dynamic bit range of a radio frequency digital-to-analog converter (RF-DAC). Typically, a load of the cap RF DAW of a... |
|
|
DE102014001558B4 |
CAPACITIVE HIGH FREQUENCY DIGITAL ANALOG CONVERTER WITH SWITCHABLE LAST
Digital-to-analog converter (400) with a programmable load comprising: a first digital multi-bit input comprising a plurality of first parallel-equipped current sources and arranged for providing... |
|
|
DE102014001557A1 |
DIGITAL-ANALOG CONVERTER WITH MIXER
An example described herein relates to a digital-to-analog converter (DAW). The DAC includes a digital signal input adapted for receiving a multi-bit digital input signal and a plurality of spaced... |
|
|
DE102014001557B4 |
DIGITAL ANALOG CONVERTER WITH MIXER
A digital-to-analog converter (200) comprising: a digital signal input (202) adapted to receive a multi-bit digital input signal; A matrix (208) comprising cells of unit current sources for... |
|
|
DE102012100144B4 |
Calibration circuit and method for calibrating capacitive compensation in digital-to-analog converters
(109) is connected to an output terminal (105) for outputting an output current, the compensation circuit (200) being connected to an output terminal (105) for outputting an output current, the... |
|
|
DE102012100144A1 |
Calibration circuit and method for calibrating a capacitive compensation in digital-to-analog converters
A digital-to-analog converter converts a digital input signal into an analog output signal. The digital-to-analog converter includes an input selector which is configured for inputting the digital... |
|
|
DE102010042339B4 |
Digital / analog converter with a mixer
Digital / analog converter (11) comprising: a digital signal input, a plurality of cells (23), each cell (23), a mixer (45, 46), and a coupling circuit (44, 47), which is designed a local... |
|
|
DE102010042339A1 |
Digital / analog converter with a mixer
In some embodiments, digital / analog converters are provided which comprise a plurality of cells. Each cell includes a mixer (45, 46) and a coupling circuit (44, 47) for selectively coupling a... |
|
|
DE102010016556A1 |
Digital-to-analog-converter, has memory for storing digital information representing control voltages, and auxiliary-digital-analog-converter receiving information from memory and generating voltages for voltage sources
The converter (300) has resistive elements connected in a chain, and electric field-applying circuits connected to one of the resistive elements, where each element has a polysilicon resistance... |
|
|
DE102009038074A1 |
Digital to analog converter
Disclosed is a PRA-DAC. The PRA-DAC may be operated so that its rate of conversion is increased. |
|
|
DE102009012583B4 |
modulator
Modulator comprising: a first converter (305), which is designed such that it receives a first bit (301) and a first current which is a function of the first bit (301) provides, wherein said first... |
|
|
DE102008057282A1 |
Compensating a non-linearity of non-differential digital-to-analog converters
system full: a digital-to-analog converter (100), which plurality of current source cells (400; 500), wherein each of the cells (400; 500) an output terminal (414; 516), a current source... |
|
|
DE102008057282B4 |
Compensation of non-linearity of non-differential digital-to-analog converters
A system comprising: a digital to analog converter (100) comprising a plurality of current source cells (400; 500), each of said cells (400; 500) having an output terminal (414; 516), a current... |
|
|
DE102007017639B4 |
Integrated circuit arrangement with at least one digital-to-analog converter
An integrated circuit device comprising at least one digital-to-analog converter (12) having a plurality of parallel arranged and designed as a FET current source transistors (N1-N8) for providing... |
|
|
DE102007017639A1 |
Integrated circuit arrangement with at least one digital-to-analog converter
The Invention relates to an integrated circuit assembly (10) comprising at least one digital-to-analog converter (12) having a plurality of parallel arranged current source transistors (N1-N8) for... |
|
|
DE102005046371A1 |
Digital to analog converter has data word, reference signal inputs, series resistance circuit, tapping for connection via switch to input with first and/or second resistances independently of data word, amplifier with gain setting input
The device has an input (3) for the data word, a reference input (25) for a reference signal, a series circuit (2) with a first resistance and at least one second resistance, a tapping (6) for... |
|
|
DE102005017304B3 |
Digital / analog converter with self-calibration
The Invention relates to a method for calibrating a a plurality having transducer cells of at least one reference cell, and Digital / analog converter, wherein the respective value of a converter... |
|
|
DE102005017305A1 |
Thirteen-bit-digital to analog converter, has segments of partitioned cell arrangement with converter cells and redundant converter cells and self calibration unit with individual reference cell to calibrate converter cells
The converter has two segments of partitioned cell arrangement (14) wit number of converter cells (15a, 17a) and redundant converter cells (15b, 17b). Weighted redundant converter cells are... |
|
|
DE102005017305B4 |
Segmented digital / analog converter, A method for on-line calibration of the digital / analog converter and method of operating the segmented digital / analog converter
Segmented digital to analog converter with a sub-divided into at least two segments, each cell array having a plurality of transducer cells and redundant transducer cells, - Wherein in a first... |
|
|
DE19930113B4 |
Device and method for filtering a data stream representative of a digital signal
device for filtering a representing a digital data stream Signal (TXDATA), wherein the signal to be generated (I) using the currents (I1-I18) or of voltages of a plurality of current or Voltage... |
|
|
DE19840930B4 |
Digital / analog converter and driver circuit for a liquid crystal display
Digital / analog converter with a plurality of input terminals for a corresponding plurality analog reference signals (ARi), comprising two respective MOS transistors Switch groups (404, 406)... |
|
|
DE10237856B4 |
Arrangement for digital to analog conversion of a high-frequency digital input signal into a carrier-analog output signal
arrangement for digital to analog conversion of a high-frequency digital input signal (DE) in a carrier- analog output signal (AA) - In the delay means (VZ) has a first delay element (VG1) and... |
|
|
DE10066029B4 |
Analog / digital converter
Analog / digital converter according to the principle of successive approximation with an internal digital / analog converter, whose analog output value (Vdecode) to Generating a k-digit Digital... |
|
|
DE102004015308A1 |
Circuit structure for converting digital signals into analog signals has converting and filtering devices with an impedance transfer function
Converting devices (CD) (10) convert a digital signal (1) into an analog signal (I+,I-). Filter devices (FD) (20) filter the analog signal. The CD are designed so as to convert digital signals... |
|
|
DE102004015308B4 |
Circuit arrangement for converting a digital signal into an analog signal
Circuit arrangement for converting a digital signal (1) into an analog signal (VOUT), Comprising conversion means (10) for converting the digital signal (1) into an analogue signal (I+, I_), and... |
|
|
DE10342057B4 |
Halbleiter-Schaltungsanordnung und Continuous-Time-Sigma-Delta-Modulatorschaltung
Halbleiter-Schaltungsanordnung, aufweisend eine Digital-Analog-Wandlerschaltung (30), eine Additionsschaltung (20) zur Addition eines Ausgangs-Stromsignals der Digital-Analog-Wandlerschaltung (30)... |
|
|
DE102004002013B4 |
High-resolution digital-to-analog converter with a small area requirement
Digital-to-analog converter for converting a digital input signal into an analog output voltage, with - A resistor chain (7) with switchable taps - A decoder circuit (5, 6; 5.1, 6.1, 5.2, 6.2) for... |
|
|
DE102004002013A1 |
High-resolution digital-to-analog converter e.g. for integrated circuit, uses decoding circuit for switching or separating tags depending on input signal
A differential digital-analog converter includes a resistance chain (7) with switchable tags, a decoding circuit (5,6) for switching or separating the tags depending on the digital input signal... |
|
|
DE102004058915B4 |
Thermometric digital-to-analog converter
Thermometric digital-to-analog converter having a cell array having a plurality of cell elements which are arranged on a wafer in a two-dimensional matrix, each integrated cell element has a... |
|
|
DE102004058915A1 |
Cell array with minimal deviation
cell array having a plurality of cell elements, the two-dimensional in a are integrated on a cell array wafer, each integrated Cell element has a deviation, the current between its physical... |
|
|
DE4300984B4 |
Bootstrap MOSFET Abtastschaltstufe
Analog Bootstrap MOSFET Abtastschaltstufe in the form of an integrated circuit, full: (A) a sample-MOSFET (6) whose drain electrode is connected to an output line (12) having a source electrode is... |
|
|
DE10350594B4 |
A method for calibration of current cells for digital-to-analog converter circuits and digital to analog converter circuit
A method for calibration of current cells (10p, 10n) for a digital-analog converter circuit, wherein during an operating phase of a cell stream, which is formed with another stream in a... |
|
|
DE10350594A1 |
Calibrating method for current cells in a digital-analog converter circuit uses the current in a mirror transistor to form a cell current with a further current in a calibrating transistor
During an operating phase, a cell current (CC) is formed by the sum of a current in a mirror transistor (MT) (11) with a further current in a calibrating transistor (CT) (15) linked in parallel to... |
|
|
DE102004005138A1 |
A method for digital / analog conversion and corresponding digital / analog converter device
It A method and an apparatus for the digital / analog conversion proposed, for improving the use of a "dynamic element matching" algorithm, in particular a "Data Weighted Averaging" algorithm, the... |
|
|
DE102004005138B4 |
A method for digital / analog conversion and corresponding digital / analog converter device
A method for digital / analog conversion, comprising the steps of a) reacting a to be reacted in a corresponding analog signal digital word into a control code for a number of transducer elements... |