| D317592 | Semiconductor element | June, 1991 | Yoshizawa | D13/182 |
| D359028 | Socketed integrated circuit package | June, 1995 | Siegel et al. | D13/182 |
| 5053853 | Modular electronic packaging system | October, 1991 | Haj-Ali-Ahmadi et al. | 257/693 |
| 5155067 | Packaging for a semiconductor die | October, 1992 | Wood et al. | 257/693 |
| 5173451 | Soft bond for semiconductor dies | December, 1992 | Kinsman et al. | 437/209 |
| 5206536 | Comb insert for semiconductor packaged devices | April, 1993 | Lim | 257/668 |
| 5302891 | Discrete die burn-in for non-packaged die | April, 1994 | Wood et al. | 324/158F |
| 5408190 | Testing apparatus having substrate interconnect for discrete die burn-in for nonpackaged die | April, 1995 | Wood et al. | 324/765 |
| 5440240 | Z-axis interconnect for discrete die burn-in for nonpackaged die | August, 1995 | Wood et al. | 324/765 |
| 5442232 | Thin semiconductor package having many pins and likely to dissipate heat | August, 1995 | Goto et al. | 257/668 |
| 5451165 | Temporary package for bare die test and burn-in | September, 1995 | Cearley-Cabbiness et al. | 439/71 |
| 5455452 | Semiconductor package having an LOC structure | October, 1995 | Kiyono | 257/668 |
| 5471088 | Semiconductor package and method for manufacturing the same | November, 1995 | Song | 257/668 |
| 5495179 | Carrier having interchangeable substrate used for testing of semiconductor dies | February, 1996 | Wood et al. | 324/755 |
| 5517125 | Reusable die carrier for burn-in and burn-in process | May, 1996 | Posedel et al. | 324/755 |
| 5519332 | Carrier for testing an unpackaged semiconductor die | May, 1996 | Wood et al. | 324/755 |
| 5530376 | Reusable carrier for burn-in/testing of non packaged die | June, 1996 | Lim et al. | 324/765 |
| 5541525 | Carrier for testing an unpackaged semiconductor die | July, 1996 | Wood et al. | 324/755 |
| 5543725 | Reusable carrier for burn-in/testing on non packaged die | August, 1996 | Lim et al. | 324/755 |
| 5581195 | Semiconductor chip holding device | December, 1996 | Lee et al. | 324/755 |
FIG. 1 is an enlarged top perspective view of a temporary package for semiconductor dice showing our new design;
FIG. 2 is a left side elevational view thereof;
FIG. 3 is a right side elevational view thereof;
FIG. 4 is a top plan view thereof;
FIG. 5 is a front side elevational view thereof;
FIG. 6 is a bottom plan view thereof; and,
FIG. 7 is a rear side elevation view thereof.