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7620945 |
Parallelization scheme for generic reduction
One embodiment of the present invention provides a system that supports parallelized generic reduction operations in a parallel programming language, wherein a reduction operation is an associative...
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7613599 |
Method and system for virtual prototyping
An integrated design environment (IDE) is disclosed for forming virtual embedded systems. The IDE includes a design language for forming finite state machine models of hardware components that are...
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7594223 |
Straight-line post-increment optimization for memory access instructions
A compiler configured for optimizing non-loop memory access instructions of a computer program to form architected memory instructions conforming to a base register auto-incrementing addressing...
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7581215 |
Dependency analysis system and method
We present a technique to perform dependence analysis on more complex array subscripts than the linear form of the enclosing loop indices. For such complex array subscripts, we decouple the...
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7571432 |
Compiler apparatus for optimizing high-level language programs using directives
A compiler 58 , which is a compiler that realizes program development in a fewer man hours, translates a source program 72 written in a high-level language into a machine language program. This...
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7549146 |
Apparatus, systems, and methods for execution-driven loop splitting and load-safe code hosting
Techniques for execution-driven loop splitting and load-safe code hosting are provided. Compiled code includes statements associated with an original loop and statements associated with an...
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7546592 |
System and method for optimized swing modulo scheduling based on identification of constrained resources
A method, computer program product, and a data processing system for scheduling instructions in a data processing system are provided. Dependencies among a plurality of nodes are analyzed to...
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7530063 |
Method and system for code modification based on cache structure
A method and system of modifying instructions forming a loop is provided. A method of modifying instructions forming a loop includes modifying instructions forming a loop including: determining...
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7516481 |
Program development supporting apparatus, method, program and recording medium
A program development supporting apparatus that groups a plurality of events each executed in an information processor to divide the events into a plurality of parallel execution units to be...
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7506331 |
Method and apparatus for determining the profitability of expanding unpipelined instructions
A method, apparatus, and computer instructions for processing instructions. A data dependency graph is built. The data dependency graph is analyzed for recurrences, and unpipelined instructions...
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7493609 |
Method and apparatus for automatic second-order predictive commoning
A method and apparatus for automatic second-order predictive commoning is provided by the present invention. During an analysis phase, the intermediate representation of a program code is analyzed...
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7493604 |
Conditional compilation of intermediate language code based on current environment
Conditional compilation of intermediate language code based on current environment includes loading intermediate language code on a device. Portions of the intermediate language code are...
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7487497 |
Method and system for auto parallelization of zero-trip loops through induction variable substitution
A method and system of auto parallelization of zero-trip loops that substitutes a nested basic linear induction variable by exploiting a parallelizing compiler is provided. Provided is a use of a...
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7478377 |
SIMD code generation in the presence of optimized misaligned data reorganization
Generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop operates on datatypes having different lengths, is disclosed. Further, a preferred...
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7475392 |
SIMD code generation for loops with mixed data lengths
Generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop operates on datatypes having different lengths, is disclosed. Further, a preferred...
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7428731 |
Continuous trip count profiling for loop optimizations in two-phase dynamic binary translators
A method, machine readable medium, and system are disclosed. In one embodiment the method comprises collecting a loop trip count continuously during runtime of a region of code being executed that...
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7421687 |
Optimizing branch condition expressions in a JIT compiler
A Java virtual machine includes a just in time (JIT) Java compiler. The JIT compiler includes at least one optimizer. Each of the at least one optimizer includes logic for recognizing a pattern in...
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7415700 |
Runtime quality verification of execution units
One embodiment disclosed relates to a method of compiling a program to be executed on a target microprocessor with multiple execution units of a same type. The method includes selecting one of the...
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7404183 |
Transforming locks in software loops
An improved method and system for acquisition and release of locks within a software program is disclosed. In an exemplary embodiment, a lock within a loop is transformed by relocating acquisition...
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7395531 |
Framework for efficient code generation using loop peeling for SIMD loop code with multiple misaligned statements
A system and method is provided for vectorizing misaligned references in compiled code for SIMD architectures that support only aligned loads and stores. In this framework, a loop is first simdized...
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7395419 |
Macroscalar processor architecture
A macroscalar processor architecture is described herein. In one embodiment, an exemplary processor includes one or more execution units to execute instructions and one or more iteration units...
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7386842 |
Efficient data reorganization to satisfy data alignment constraints
An approach is provided for vectorizing misaligned references in compiled code for SIMD architectures that support only aligned loads and stores. In the framework presented herein, a loop is first...
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7373642 |
Defining instruction extensions in a standard programming language
A method is provided for modifying a program written in a standard programming language so that when the program is compiled both an executable file is produced and an instruction is programmed...
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7367026 |
Framework for integrated intra- and inter-loop aggregation of contiguous memory accesses for SIMD vectorization
A method, computer program product, and information handling system for generating loop code to execute on Single-Instruction Multiple-Datapath (SIMD) architectures, where the loop contains...
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7367024 |
Compiler-driven dynamic memory allocation methodology for scratch-pad based embedded systems
A highly predictable, low overhead and yet dynamic, memory allocation methodology for embedded systems with scratch-pad memory is presented. The dynamic memory allocation methodology for global and...
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7353505 |
Tracing the execution path of a computer program
The invention relates to tracing the execution path of a computer program comprising at least one module including a plurality of instructions. At least one of these instructions is a branch...
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7331045 |
Scheduling technique for software pipelining
An improved scheduling technique for software pipelining is disclosed which is designed to find schedules requiring fewer processor clock cycles and reduce register pressure hot spots when...
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7318223 |
Method and apparatus for a generic language interface to apply loop optimization transformations
A generic language interface is provided to apply a number of loop optimization transformations. The language interface includes two new directives. The present invention detects the directives in...
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7316012 |
System, method, and apparatus for spilling and filling rotating registers in software-pipelined loops
An efficient method for software-pipelining (SWP) of loops to translate programs, from higher level languages into equivalent object or machine language code for execution on a computer. In one...
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7313788 |
Vectorization in a SIMdD DSP architecture
A method for determining vectorization configurations in a computer processor architecture, the method including identifying a vectorizable loop in a computer program, identifying a memory access...
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7302680 |
Data repacking for memory accesses
A method and apparatus are provided for repacking of memory data. For at least one embodiment, data for a plurality of store instructions in a source code program is loaded from memory into the...
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7302557 |
Method and apparatus for modulo scheduled loop execution in a processor architecture
A processor method and apparatus that allows for the overlapped execution of multiple iterations of a loop while allowing the compiler to include only a single copy of the loop body in the code...
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7263692 |
System and method for software-pipelining of loops with sparse matrix routines
A method that uses software-pipelining to translate programs, from higher level languages into equivalent object or machine language code for execution on a computer, including sparse...
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7257810 |
Method and apparatus for inserting prefetch instructions in an optimizing compiler
One embodiment of the present invention provides a system that generates code to perform anticipatory prefetching for data references. During operation, the system receives code to be executed on a...
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7254810 |
Apparatus and method for using database knowledge to optimize a computer program
A code optimizer is used to optimize a computer program that references a database by determining the characteristics of the database and making suitable optimizations based on the characteristics...
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7222337 |
System and method for range check elimination via iteration splitting in a dynamic compiler
A range check elimination loop structure is provided. The range check elimination loop structure includes a pre-loop structure based on an original loop structure, where the pre-loop structure is...
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7188337 |
Interrupt program module
A computer implemented method to be implemented by a computer, which sequentially consecutively performs a plurality of predetermined process, when the computer receives an interrupt request to...
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7185330 |
Code optimization method and system
A method and system for optimizing computer source code is provided. Prior to compiling the source code, the code is analyzed to determine the occurrence of repeating patterns of code. The...
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7181737 |
Method and apparatus for deployment of high integrity software using static procedure return addresses
A method for statically allocating a procedure return address includes separating a software program including multiple procedures into a cyclic part and an acyclic part, allocating a static...
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7171544 |
Run-time parallelization of loops in computer programs by access patterns
Parallelization of loops is performed for loops having indirect loop index variables and embedded conditional statements in the loop body. Loops having any finite number of array variables in the...
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7146300 |
Method of co-simulating a digital circuit
A method is provided for co-simulating a digital circuit using a simulation engine ( 45 ) which communicates with one or more first programming languages by means of a foreign language interface...
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7140009 |
Unrolling transformation of nested loops
A transformation technique for nested loops. A virtual iteration space may be determined based on an unroll factor (UF). The virtual iteration space, which includes the actual iteration space, is...
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7140007 |
Aspect-oriented programming with multiple semantic levels
Techniques that allow the operations of a program to be intercepted and intervened with are known. These techniques are restricted by the same limited view of the program's data that is currently...
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7131119 |
Code optimization
A code optimizing procedure involves isolating code from a loop construct, executed a predetermined number of times, and optimizing the code for execution conditions which cause the loop to be...
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7127710 |
Identifying pure pointers to disambiguate memory references
In one embodiment, disambiguation of memory references, such as structure field accesses, of a computer program is performed. Disambiguation may be effected by identifying pure pointer variables...
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7120907 |
Unrolling loops with partial hot traces
Methods and apparatus are disclosed for improved loop unrolling by a compiler. A large class of loops exists for which effective loop unrolling has not previously been performed because they are...
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7114151 |
Code conversion method and apparatus
Interlocked floating-point instructions are detected, and a register address referring to and assigning an operand in the interlocked instructions is changed to an odd-number address not assigned...
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7111132 |
Parallel processing apparatus, system, and method utilizing correlated data value pairs
An apparatus may include a first storage location to store a key value of an activated correlated data values (CDV) pair and a second storage location to store a correlated value corresponding to...
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7107583 |
Method and apparatus for reducing cache thrashing
A method for compiling a program to reduce the possibility of cache thrashing is provided. The method comprises identifying a loop in a program, identifying each vector memory reference in the...
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7089545 |
Detection of reduction variables in an assignment statement
This invention relates to a method, system and program product to detect reduction variables in assignment statements in the source code for enabling the parallel execution of program loops. The...
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