Matches 401 - 450 out of 2116 < 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 >
Match Document Document Title
7418603 Mobile terminal, circuit board, circuit board design aiding apparatus and method, design aiding program, and storage medium having stored therein design aiding program  
The present invention provides a tamper resistant circuit board, an apparatus and method for aiding the design of the circuit board, a computer readable storage medium having stored therein a...
7418375 Load current evaluation device, load current evaluation method, and recording medium containing load current evaluation program  
A load electric current evaluating device includes a load electric current calculating section for calculating a load electric current flowing through a predetermined part of electric wiring...
7418684 Systems, methods, and apparatus to perform static timing analysis and optimization for multi-mode clock circuit networks  
A method and an apparatus to perform static timing analysis and optimization for multi-mode clock circuit networks have been disclosed. In one embodiment, the method includes determining a...
7418360 Project design method  
A configurable system for automating a control sequence, in particular a motion sequence, has several components which exchange in regular time intervals during the control sequence with each other...
7418682 Method and mechanism for performing DRC processing with reduced passes through an IC design  
A method and mechanism is disclosed for performing a spacing rule DRC check that does not require an excessive number of passes through the IC design. In one approach, a two-pass approach is...
7418677 Method of calculating predictive shape of wire structure, calculation apparatus, and computer-readable recording medium  
A calculating apparatus includes a finite element model creating unit that creates a finite element model of the wire structure, a setting unit that sets physical properties, restriction conditions...
7418679 Method of enabling timing verification of a circuit design  
The various embodiments of the present invention relate to circuit verification. According to one embodiment of the invention, a method of enabling timing verification of a circuit design comprises...
7418678 Managing formal verification complexity of designs with counters  
A counter abstraction tool generates an abstraction model for one or more counters in a circuit design for use with a formal verification system. The tool detects the presence of a counter in a...
7415684 Facilitating structural coverage of a design during design verification  
One embodiment of the present invention provides a method and a system that facilitates structural coverage of a design during a design verification process. During operation, the system receives a...
7415681 Optimal mapping of LUT based FPGA  
A method and system for improved optimal mapping of LUT based FPGA's. The invention comprises performing a topological sort on the network to be mapped, whereby the network is represented in form...
7415685 Method of verifying the power off effect of a design entity at register transfer level and method of modeling the power off effect  
A method of verifying the power off effect of a design entity of a digital system includes a device model, a test input signal model, and a test output signal model specified in a hardware design...
7415680 Power managers for an integrated circuit  
A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for...
7412675 Hierarchical feature extraction for electrical interaction  
A method of calculating electrical interactions of circuit elements in an integrated circuit layout without flattening the entire database that describes the layout. In one embodiment, a...
7412674 System and method for measuring progress for formal verification of a design using analysis region  
A method and apparatus for measuring the progress of a formal verification process using an analysis region, and measures the effectiveness of the current set of properties/requirements in...
7412678 Method and computer program for management of synchronous and asynchronous clock domain crossing in integrated circuit design  
A method and computer program are disclosed for managing synchronous and asynchronous clock domain crossings that include steps of: (a) receiving as input an integrated circuit design; (b)...
7412677 Detecting reducible registers  
Reducible registers are determined to optimize a sequential circuit. A screening method tests one or more sets of registers where the registers of each set are assumed to satisfy a logic condition....
7412676 Integrated OPC verification tool  
An integrated verification and manufacturability tool provides more efficient verification of integrated device designs than verification using several different verification components. The...
7409654 Method and apparatus for performing test pattern autograding  
A method, computer program product, and data processing system for minimizing the number of test sequences needed to achieve a desired level of coverage of events in testing a semiconductor design...
7409656 Method and system for parallelizing computing operations  
Disclosed is an improved method and system for implementing parallel processing of computing operations by effectively handling dependencies between different sequences of computing operations. In...
7409655 Method of designing semiconductor integrated circuit and apparatus for designing the same  
A method of designing a semiconductor integrated circuit having a plurality of transistors calculates a leak current corresponding to a sum of a gate leak and a channel leak at each node in the...
7409659 System and method for suppressing crosstalk glitch in digital circuits  
A static latch circuit is used to suppress crosstalk glitch in a synchronous digital integrated circuit. A static latch is inserted into a selected victim net, and the net is examined if crosstalk...
7409648 Semiconductor integrated circuit, method for designing semiconductor integrated circuit and system for designing semiconductor integrated circuit  
The semiconductor integrated circuit capable of reducing an interconnection width as compared with conventional one while suppressing electromigration effectively. An input unit 101 stores...
7406671 Method for performing design rule check of integrated circuit  
The present invention provides a method for performing design rule check (DRC) of an integrated circuit. A design layout of the integrated circuit is provided. The integrated circuit includes a...
7406405 Method and system for design verification using proof-based abstraction  
A design verifier includes a bounded model checker, an abstractor and an unbounded model checker. The bounded model checker verifies a property to a depth K and either finds a counterexample, or...
7406670 Testing of an integrated circuit having an embedded processor  
Method and apparatus for generating a test program for an integrated circuit having an embedded processor. One embodiment has a system which includes an embedded microprocessor; a plurality of...
7403876 Wire harness wiring path design aiding apparatus and method, wire harness wiring path design aiding program and medium storing the program  
A wire harness wiring path design aiding apparatus and method. The apparatus includes a device for storing data of a minimum bending radius of the wire harness and a device for checking if the...
7404160 Method and system for hardware based reporting of assertion information for emulation and hardware acceleration  
A method and system for hardware based reporting of assertion information for emulation and hardware acceleration is disclosed. In one embodiment, a method of performing assertion-based...
7404163 Static timing slacks analysis and modification  
A method, system and computer program product for analyzing and modifying a static timing slack of a timing path in a static timing analysis of a design of an integrated circuit (IC) with a...
7404161 Fullchip functional equivalency and physical verification  
A method for maintaining equivalency between the reference Register Transfer Logic (RTL) and the physical layout design of an integrated circuit by way of maintaining a reference netlist derived...
7403885 Voltage supply noise analysis  
Systems and methods for implementing voltage supply noise analysis for electronic circuits are disclosed. In an exemplary embodiment a computer program product executes a computer process. The...
7404154 Basic cell architecture for structured application-specific integrated circuits  
A basic cell circuit architecture having plurality of cells with fixed transistors configurable for the formation of logic devices and/or single/dual port memory devices within a structured ASIC is...
7401304 Method and apparatus for thermal modeling and analysis of semiconductor chip designs  
A method and apparatus for modeling and thermal analysis of semiconductor chip designs is provided. One embodiment of a novel method for performing thermal testing of a semiconductor chip design...
7401309 Integrated circuit hierarchical design system, integrated circuit hierarchical design program and integrated circuit hierarchical design method  
An integrated circuit hierarchical design system for optimizing a circuit locating between flip-flops included in a lower layer through a higher layer among layers forming an integrated circuit,...
7401305 Adaptive application of SAT solving techniques  
A computer-implemented method for solving a satisfiability (SAT) problem includes defining a formula, including variables, which refers to properties of a target system. Using a chosen search...
7401306 Apparatus and method for verification support, and computer product  
A verification support apparatus verifies an object. The object includes a plurality of clock domains and each clock domain includes a plurality of registers. The verification support apparatus...
7401301 Circuit design support method, device thereof, and circuit design support program  
To enable automatic calculation of a circuit element value and a waveform by a computer. In a circuit design support for calculating a circuit element value of an analog electronic circuit to be...
7398445 Method and system for debug and test using replicated logic  
A method and system for debug and test using replicated logic is described. A representation of a circuit is compiled. The circuit includes a replicated portion and delay logic to delay inputs into...
7398492 Rules and directives for validating correct data used in the design of semiconductor products  
A method to validate data used in a design of a semiconductor product. The method includes (a) reading resources of an application set defining the semiconductor product in a partially fabricated...
7398482 Modular design method and apparatus  
Disclosed is a procedure or design approach for functional modules that may be used in connection with a multiprocessor integrated circuit chip. The approach includes keeping the dimensions of each...
7398494 Method for performing verification of logic circuits  
The present invention relates to a method for verifying the proper operation of a digital logic circuit. In order to add a useful alternative in the field of functional, exhaustive simulation and...
7398424 False path detection program  
A false path detection program whereby passing points of signal lines constituting false paths are directly detected, thereby shortening the processing time necessary for the false path detection...
7398493 Isolated pwell tank verification using node breakers  
A technique for checking a layout design of an integrated circuit is disclosed. The technique has application to converting the design of a circuit from schematic to layout form. Instances where...
7398489 Advanced standard cell power connection  
A method for establishing standard cell power connections is disclosed. The method generally includes the steps of (A) calculating a power consumption of a plurality of logic cells receiving power...
7398490 Digital circuit layout techniques using binary decision diagram for identification of input equivalence  
A technique for analyzing digital circuits to identify pin swaps is provided for circuit layout and similar tasks in which the circuit is first decomposed into regions. Logic functions of the...
7398504 Program, method and apparatus for analyzing transmission signals  
From design information on a circuit board a wiring designation unit designates a wiring model for signal analysis. A first analysis unit generates, through a 3-D electromagnetic analysis, a first...
7398483 Design verification method for programmable logic design  
A technique for checking a logic design for compliance with a set of design rules in a computer-aided logic design system. An initial logic design is provided in computer-readable form in a logic...
7398491 Method for fast incremental calculation of an impact of coupled noise on timing  
A method for incrementally calculating the impact of coupling noise on the timing of an integrated circuit (IC) having a plurality of logic stages by performing an initial timing analysis on the IC...
7395519 Electronic-circuit analysis program, method, and apparatus for waveform analysis  
A design-change-target-circuit detecting unit inputs circuit information including an element model describing an electronic circuit to detect an electronic circuit using a changed element model. A...
7395197 Verification method and system for logic circuit  
A shared register row is provided between a program-based circuit simulator and a device-based circuit simulator. The shared register row includes a plurality of shared registers each corresponding...
7392492 Multi-format consistency checking tool  
A method and system for performing consistency checking of one or more design representations having different design types. A translator for each design type obtains information from each design...
Matches 401 - 450 out of 2116 < 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 >