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7073161 |
Methods of forming patterned reticles
The invention includes methods of forming patterned reticles. Design features can be introduced into a layout for a reticle prior to optical proximity correction, and then removed prior to taping a...
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7073162 |
Site control for OPC
A method for processing objects to be created via photolithography. Each object to be created is defined as a polygon that is fragmented into a number of edge segments that extend around the...
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7073163 |
Method of simulating patterns, computer program therefor, medium storing the computer program and pattern-simulating apparatus
A pattern simulation method includes reticle data and exposure data. The reticle data contain reticle patterns for regions into which an entire pattern is divided. The exposure data are composed of...
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7069533 |
System, apparatus and method for automated tapeout support
A system, apparatus and method for changing/modifying a customer specific reticle set design to a reticle set design that meets a user's process standard. An example embodiment of a method of...
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7069534 |
Mask creation with hierarchy management using cover cells
A method and apparatus for translating a hierarchical IC layout file into a format that can be used by a mask writer that accepts files having a limited hierarchy. Cover cells of the original IC...
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7069104 |
Management system, management apparatus, management method, and device manufacturing method
A management system including an acquisition device for acquiring actual processing results obtained by operating an industrial device with a set parameter value and another parameter value, and an...
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7069535 |
Optical proximity correction method using weighted priorities
A method of silicon design reproducibility enhancement using priority assignments prior to performing a conventional optical proximity correction process on a device. The present invention seeks to...
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7065737 |
Multi-layer overlay measurement and correction technique for IC manufacturing
A system facilitating measurement and correction of overlay between multiple layers of a wafer is disclosed. The system comprises an overlay target that represents overlay between three or more...
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7063920 |
Method for the generation of variable pitch nested lines and/or contact holes using fixed size pixels for direct-write lithographic systems
Provided is a method and system for developing a lithographic mask layout. The lithographic mask layout is adapted for configuring an array of micro-mirrors in a maskless lithography system. The...
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7065738 |
Method of verifying an optical proximity correction (OPC) model
A method verifying an optical proximity correction (OPC) model is disclosed. The method can include correcting a test pattern having a plurality of structures and extracting critical dimension (CD)...
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7065736 |
System for generating two-dimensional masks from a three-dimensional model using topological analysis
A method of generating two-dimensional masks from a three-dimensional model comprises providing a three-dimensional model representing a micro-electro-mechanical structure for manufacture and a...
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7065739 |
Pattern correction method of semiconductor device
A pattern correction method executed by a computer includes a first correction and a second correction. The first correction is executed by calculating a correction value, in consideration for an...
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7062346 |
Method for manufacturing multi-kind and small quantity semiconductor products in a mass-production line and system thereof
A method for manufacturing multi-kind and small-quantity semiconductor products in a mass-production line and a system thereof are provided. In the method for manufacturing a semiconductor device...
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7062747 |
Method and apparatus for prepareing patterns used for manufacture of semiconductor device
A method of preparing layout data of patterns formed in a scribe area. First, library data on which a plurality of patterns and arrangement limiting conditions of each pattern and arrangement...
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7055127 |
Mask data preparation
The manufacturing of integrated circuits relies on the use of optical proximity correction (OPC) to correct the printing of the features on the wafer. The data is subsequently fractured to...
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7051314 |
Method of computer-assisted design of integrated circuit chips, and library of delay time values for computer-assisted design of such chips
A method of placing integrated circuit chips on a wafer uses a library of average delay time values of logic gates. Exposure-dependent delay time values of the logic gates, which result from...
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7047516 |
Proximity effect correction apparatus, proximity effect correction method, storage medium, and computer program product
Light intensity values only of the vicinity of a specified portion, that is, for example, based on a prescribed value, an area where the distance between edges of an object to be corrected is equal...
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7039889 |
Apparatus, method, and program for designing a mask and method for fabricating semiconductor devices
An apparatus for designing a mask that enables quick mask design. A generation unit generates data regarding a mask pattern formed on a mask from design data regarding an exposure pattern...
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7039896 |
Gradient method of mask edge correction
The present invention is directed to a method and apparatus for making mask edge corrections using a gradient method for high density chip designs. The present invention uses a newly defined cost...
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7039895 |
***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Adjustment of masks for integrated circuit fabrication
A pattern-dependent model is used to predict characteristics of an integrated circuit that is to be fabricated in accordance with a design by a process. The process includes (a) a fabrication...
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7036109 |
Imaging integrated circuits with focused ion beam
Methods and apparatus for integrated circuit diagnosis, characterization or modification using a focused ion beam. A method for editing an integrated circuit includes acquiring an image of...
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7035446 |
Quality measurement of an aerial image
A method of measuring the quality of a simulated aerial image includes receiving as input a mask pattern for a chip design, simulating an aerial image of the mask pattern, calculating an error area...
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7036108 |
Full sized scattering bar alt-PSM technique for IC manufacturing in sub-resolution era
A process is described for shrinking gate lengths and poly interconnects simultaneously during the fabrication of an integrated circuit. A positive tone photoresist is coated on a substrate and is...
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7032209 |
Mask pattern and method for forming resist pattern using mask pattern thereof
A mask pattern for multiple exposure for forming a resist pattern with an unvarying pattern pitch on a semiconductor wafer, which is utilized as in case where a mask pattern under a design having...
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7028285 |
Standard cell design incorporating phase information
Phase information is incorporated into a cell-based design methodology. Standard cells have four edges: top, bottom, left, and right. The top and bottom edges have fixed phase shifters placed, e.g....
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7026082 |
Method for determining parameters for lithographic projection, a computer system and computer program therefor, a method of manufacturing a device and a device manufactured thereby
The method involves selecting features of a pattern to be imaged, notionally dividing the source into a plurality of source elements, for each source element, calculating the process window for...
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7024655 |
Mixed-mode optical proximity correction
A mask is prepared by processing design data with various combinations of rule-based and model-based optical proximity correction. In one embodiment, the design data is first processed with a set...
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7022439 |
Fracturing polygons used in a lithography process for fabricating an integrated circuit
A system is provided for fracturing a polygon on a mask layout used in a lithographic process for manufacturing an integrated circuit. The system receives mask layouts that include polygons that...
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7024638 |
Method for creating patterns for producing integrated circuits
To increase the writing speed of masks, context information can be used to distinguish the attributes of portions of the mask that are critical from attributes, and portions, that are less...
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7024641 |
Integrated circuit having a programmable gate array and a field programmable gate array and methods of designing and manufacturing the same using testing IC before configuring FPGA
The present invention provides an integrated circuit (IC). In one embodiment, the IC includes a substrate and a plurality of gate array blocks located on the substrate. Each of the blocks includes...
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7018746 |
Method of verifying the placement of sub-resolution assist features in a photomask layout
A method of verifying the placement of sub-resolution assist features (SRAFs) in a photomask layout is described. SRAFs are added to the photomask layout to enhance the process window for...
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7020866 |
Mask data processor
Provided is a mask data processor capable of expanding a design data throughout the entire area of a mask. A storage device (MR) inputs a design data of sub-chips (D 1 ) and mask data creation...
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7014955 |
System and method for indentifying dummy features on a mask layer
Automated techniques for identifying dummy/main features on a mask layer are provided. In a multiple mask layer technique, the definition of a dummy/main feature can be based on connectivity...
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7017141 |
Integrated verification and manufacturability tool
An integrated verification and manufacturability tool provides more efficient verification of integrated device designs than verification using several different verification tools. The integrated...
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7010380 |
Management system, management method and apparatus, and management apparatus control method
A system which manages a plurality of semiconductor exposure apparatuses holds TIS information representing the characteristics of the respective semiconductor exposure apparatuses. In a...
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7010775 |
Method for creating mask pattern for circuit fabrication and method for verifying mask pattern for circuit fabrication
A method for creating mask pattern data for fabricating a circuit includes the steps of dividing original mask pattern data into a plurality of regions having a first size; performing OPC on the...
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7007265 |
Method for generating mask data, masks, recording media, and method for manufacturing semiconductor devices
A method for generating mask data that is used for a method of manufacturing semiconductor devices is provided. The semiconductor device includes wiring layers disposed in a specified pattern on a...
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7003755 |
User interface for a networked-based mask defect printability analysis system
Mask simulation tools are typically extremely complicated to learn and to use effectively. Therefore, providing access to a mask simulation tool over a wide area network (WAN) to multiple on-line...
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7003756 |
Method and apparatus for controlling rippling during optical proximity correction
One embodiment of the present invention provides a system that controls rippling caused by optical proximity correction during an optical lithography process for manufacturing an integrated...
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7002665 |
Lithography simulation method, mask pattern correction method, and substrate topography correction method
An aspect of the present invention provides simulation that includes dividing a surface of a substrate onto which light that is focused at an aperture angle by a projection lens is shone into a...
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7003758 |
System and method for lithography simulation
There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a technique of, and system for simulating, verifying, inspecting, characterizing,...
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7003757 |
Dissection of edges with projection points in a fabrication layout for correcting proximity effects
Techniques for fabricating a device include forming a fabrication layout, such as a mask layout, for a physical design layer, such as a design for an integrated circuit, and identifying evaluation...
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7000207 |
Method of using a Manhattan layout to realize non-Manhattan shaped optical structures
A system and method for providing the layout of non-Manhattan shaped integrated circuit elements using a Manhattan layout system utilizes a plurality of minimal sized polygons (e.g., rectangles) to...
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7000208 |
Repetition recognition using segments
Processing a chip layout (e.g. optical proximity correction (OPC) or verification) can be time consuming and require the use of expensive tools. Organizing the original layout using segments can...
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7000215 |
Method of and computer program product for designing patterns, and method of manufacturing semiconductor device
A method of designing patterns has preparing a mask pattern used in a lithography process for transferring a circuit pattern intersecting with a step pattern on a substrate which has the step...
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6996797 |
Method for verification of resolution enhancement techniques and optical proximity correction in lithography
A method for model-based verification of resolution enhancement techniques (RET) and optical proximity correction (OPC) in lithography includes scaling shapes of a drawn mask layout to their...
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6996790 |
System and method for generating a two-dimensional yield map for a full layout
A two-dimensional yield map for a device, such as an integrated circuit, in a fabrication facility is computed and associated with layout data for the device in a hierarchical and/or instance-based...
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6993742 |
Thermal proximity effects in lithography
A proximity correction tool receives an indication of a feature in a lithographic design. The proximity correction tool predicts a film edge placement for the feature in a resist film based at...
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6988016 |
Method for evaluating lithography process margins
Setting values of a light exposure and a focus position are set in an exposure process for forming a pattern on a substrate. Pseudo measured dimensions of the pattern are calculated with respect to...
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6988259 |
Method and apparatus for mixed-mode optical proximity correction
A semiconductor layout testing and correction system is disclosed. The system combines both rule-based optical proximity correction and model-based optical proximity correction in order to test and...
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