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7257790 Layout structure of semiconductor integrated circuit and method for forming the same  
In an exemplary layout structure of a semiconductor integrated circuit manufactured by a photolithographic process using an exposing light having a wavelength λ, a peripheral circuit region is...
7254804 Method of verifying corrected photomask-pattern results and device for the same  
A method of verifying photomask-pattern-correction results includes steps of cutting away photomask patterns of a region to be subjected to correction, forming photoresist models used for execution...
7254803 Test structures for feature fidelity improvement  
Systems and techniques for generating test structures. The test structures may conform to a set of design rules for a portion of an integrated circuit design. The test structures may include base...
7254798 Method and apparatus for designing integrated circuit layouts  
A method for modifying an upper layout for an upper layer of an IC using information of a lower layout for a lower layer of the IC, the method including 1) receiving the upper layout containing...
7252913 Method for projection of a circuit pattern, which is arranged on a mask, onto a semiconductor wafer  
A simulation is carried out of a projection based on an electronically stored circuit pattern and adjustable projection parameters and optical parameters which characterize the specific...
7250372 Method for BARC over-etch time adjust with real-time process feedback  
A method for determining the anti-reflective coating (or bottom anti-reflective coating) over-etch time adjust with real-time process feedback is presented. The critical dimension CD resist of the...
7251807 Method and apparatus for identifying a manufacturing problem area in a layout using a process-sensitivity model  
One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target...
7251806 Model-based two-dimensional interpretation filtering  
Complex layout features, especially two-dimensional (2D) features such as jogs and corners, are more susceptible to photo-resist pinching and bridging, even with the use of optical proximity...
7249343 In-plane distribution data compression method, in-plane distribution measurement method, in-plane distribution optimization method, process apparatus control method, and process control method  
After a process is performed on a substrate, the in-plane distribution over the substrate is measured. Measured data of the in-plane distribution which is obtained by the measurement is stored. A...
7247574 Method and apparatus for providing optical proximity features to a reticle pattern for deep sub-wavelength optical lithography  
A method of generating a mask design having optical proximity correction features disposed therein. The methods includes the steps of obtaining a desired target pattern having features to be imaged...
7246342 Orientation dependent shielding for use with dipole illumination techniques  
A method of printing a pattern having vertically oriented features and horizontally oriented features on a substrate utilizing dipole illumination, which includes the steps of: identifying...
7246343 Method for correcting position-dependent distortions in patterning of integrated circuits  
A method and system for reducing the computation time required to apply position-dependent corrections to lithography, usually mask, data is disclosed. Optical proximity or process corrections are...
7240307 Pattern size correcting device and pattern size correcting method  
A pattern size correcting device includes: a testing photomask ( 1 ) having a test pattern; a quantifying unit ( 2 ) that quantifies, using the testing photomask ( 1 ), size variation in the test...
7240321 Selective promotion for resolution enhancement techniques  
A tool for optimizing the layout of a microdevice adds fragmentation points to polygons in a first hierarchical database layer in a manner suitable for application of a tool to apply a resolution...
7236916 Structure and method of correcting proximity effects in a tri-tone attenuated phase-shifting mask  
A structure and method are provided for correcting the optical proximity effects on a tri-tone attenuated phase-shifting mask. An attenuated rim, formed by an opaque region and an attenuated...
7237221 Matrix optical process correction  
A method for performing a matrix-based verification technique such as optical process correction (OPC) that analyzes interactions between movement of a fragment on a mask and one or more edges to...
7234129 Calculating etch proximity-correction using object-precision techniques  
One embodiment of the present invention provides a system that calculates etch proximity-correction during an OPC (Optical Proximity Correction) process. During operation, the system receives a...
7234130 Long range corrections in integrated circuit layout designs  
A method and apparatus for compensating for flare intensity variations across an integrated circuit. A layout description for a physical layer of an integrated circuit or portion thereof is divided...
7234128 Method for improving the critical dimension uniformity of patterned features on wafers  
A method for improving the critical dimension uniformity of a patterned feature on a wafer in semiconductor and mask fabrication is provided. In one embodiment, an evaluation means for evaluating...
7231629 Feature optimization using enhanced interference mapping lithography  
Disclosed concepts include a method of, and program product for, optimizing an intensity profile of a pattern to be formed in a surface of a substrate relative to a given mask using an optical...
7228523 Method of automatically correcting mask pattern data and program for the same  
A method of automatically correcting mask pattern data includes steps (a) to (d). Here, in this method, the mask pattern data are for producing photo masks used in manufacturing processes of a...
7228193 Methods for detecting structure dependent process defects  
Semiconductor devices formed on wafers are inspected using a master wafer. A subject wafer of a semiconductor design is provided. The subject wafer has dies wherein semiconductor devices of the...
7228522 Edge-based proximity correction  
One embodiment of the present invention provides a system that calculates an edge-based proximity correction which is applied to a region in the proximity of an evaluation point. During operation...
7222327 Photo mask, method of manufacturing photo mask, and method of generating mask data  
A photo mask includes a mask pattern formed by using a mask exposure pattern to exposure a mask substrate, the mask exposure pattern being formed by adding a proximity effect correction pattern to...
7222326 Automatic process and design method, system and program product  
A method, system and program product for generating a process aid on a wafer are disclosed. A “process aid” can be any device provided on a wafer that assists in some process step, but does not...
7222328 Semiconductor integrated circuit design tool, computer implemented method for designing semiconductor integrated circuit, and method for manufacturing semiconductor integrated circuit  
A semiconductor integrated circuit design tool includes a reference data defining module configured to define design data of one of a plurality of transistors implementing the semiconductor...
7216331 Resolving phase-shift conflicts in layouts using weighted links between phase shifters  
A method of assigning phases to shifters on a layout is provided. The method includes creating a link between any two shifters within a predetermined distance from each other. In one embodiment,...
7211815 Method of achieving CD linearity control for full-chip CPL manufacturing  
A method of generating masks for printing a pattern including a plurality of features having varying critical dimensions. The method includes the steps of: (1) obtaining data representing the...
7211369 VLSI-based system for durable high-density information storage  
The invention relates to using VLSI techniques to store information on a substrate. One embodiment of a die with text deposited upon the die uses semiconductor processing techniques during...
7213226 Pattern dimension correction method and verification method using OPC, mask and semiconductor device fabricated by using the correction method, and system and software product for executing the correction method  
A method of correcting a finish pattern dimension by using OPC when a design pattern is formed on a wafer, including selecting and determining a first design pattern included in the design pattern;...
7209584 Pattern inspection apparatus  
A pattern inspection apparatus determines a difference of the measured dislocation of respective alignment marks of an opaque pattern and a phase shifting pattern (measurement difference), in...
7207030 Method for improving a simulation model of photolithographic projection  
A method is provided for improving a photolithographic simulation model of the photolithographic simulation of a pattern formed on a photomask. Proceeding from a two-dimensional simulation model...
7207029 Calculating etch proximity-correction using image-precision techniques  
One embodiment of the present invention provides a system that calculates etch proximity-correction during an OPC (Optical Proximity Correction) process. During operation, the system receives a...
7205078 Method for generating backscattering intensity on the basis of lower layer structure in charged particle beam exposure, and method for fabricating semiconductor device utilizing this method  
A method for generating backscattering intensity with which charged particles are backscattered to a resist layer when charged particle beam is irradiated onto the resist layer which is formed on...
7200835 Method of locating sub-resolution assist feature(s)  
A method of operating a computing system to determine reticle data. The reticle data is for completing a reticle for use in projecting an image to a semiconductor wafer. The method receives circuit...
7200834 Exposure pattern forming method and exposure pattern  
Disclosed is an exposure pattern forming method of forming an exposure pattern by correcting each pattern portion constituting a design pattern by a correction amount, which amount is previously...
7200833 Calculating method, verification method, verification program and verification system for edge deviation quantity, and semiconductor device manufacturing method  
A method in which a desired pattern is compared with a finish pattern to be formed on a wafer, which is predicted from a design pattern, based on a calculation of a light beam intensity, and a...
7197722 Optimization of sample plan for overlay  
The present invention describes a method including: determining field-clustering scheme; selecting initial sample plan; establishing initial model of overlay, the initial model of overlay...
7194709 Automatic alignment of integrated circuit and design layout of integrated circuit to more accurately assess the impact of anomalies  
A method, computer program product and system for assessing the impact of anomalies in a physical device. An anomaly may be detected in an integrated circuit. Upon detecting an anomaly, an image of...
7194712 Method and apparatus for identifying line-end features for lithography verification  
One embodiment of the invention provides a system that facilitates identifying line-end features in a layout for an integrated circuit. The system operates by first receiving the layout for the...
7194704 Design layout preparing method  
There is disclosed a method of producing a design layout by optimizing at least one of design rule, process proximity correction parameter and process parameter, including calculating a processed...
7191428 Centerline-based pinch/bridge detection  
A method for performing layout verification involves identifying feature centerlines in a mask layout, and then performing lithography simulation along the centerlines to generate a set of...
7188322 Circuit layout methodology using a shape processing application  
A circuit layout methology is provided for eliminating the extra processing time and file-space requirements associated with the optical proximity correction (OPC) of a VLSI design. The methodology...
7185310 System and method for charge-balanced, continuous-write mask and wafer process for improved colinearity  
A charge-balanced, continuous-write mask and wafer process changes the magneto resistive photo-definition step to a two-mask step operation. Critical images are written on one mask layer at a very...
7185311 Mask evaluating method, mask evaluating system, method of manufacturing mask and computer program product  
A photomask evaluating method comprises calculating a killer defect rate function with respect to a simulative defect pattern including a pattern of photomask and a plurality of defects, the killer...
7181722 Method of dividing circuit pattern, method of manufacturing stencil mask, stencil mask and method of exposure  
A method of dividing a circuit pattern for creating complementary stencil masks corresponding to complementary patterns, the method comprising a step of dividing a circuit pattern into a plurality...
7181721 Short edge management in rule based OPC  
The invention discloses a method and apparatus for modifying, as appropriate, the geometries of a polygon. Based on various attributes associated with the polygon and its surroundings, modification...
7175941 Phase shift assignments for alternate PSM  
Prior art methods for forming alt. PSMs require a relatively large number of phase assignments to avoid phase conflicts in complex arrays. This has been improved by adding dummy elements at the...
7175942 Method of conflict avoidance in fabrication of gate-shrink alternating phase shifting masks  
A method of designing a layout of an alternating phase shifting mask for projecting an image of an integrated circuit design having a plurality of features to be projected using alternating phase...
7178128 Alternating phase shift mask design conflict resolution  
Methods and apparatuses for preparing layouts and masks that use phase shifting to enable production of subwavelength features on an integrated circuit in close (optical) proximity to other...
Matches 301 - 350 out of 876 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >