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7318214 System and method for reducing patterning variability in integrated circuit manufacturing through mask layout corrections  
The present invention provides a system and method of modifying the mask layout shapes of an integrated circuit layout design to compensate for reticle field location-specific systematic CD...
7315999 Method and apparatus for identifying assist feature placement problems  
One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems due to a missing or an improperly placed assist...
7313769 Optimizing an integrated circuit layout by taking into consideration layout interactions as well as extra manufacturability margin  
A method of producing a layout representation corresponding to an integrated circuit (IC) device design can include generating an initial layout representation in accordance with a predetermined...
7313781 Image data correction method, lithography simulation method, image data correction system, program, mask and method of manufacturing a semiconductor device  
An image data correction method includes preparing correction data for correcting a distortion of an image obtained by an image acquiring section, acquiring outline data of a desired pattern...
7313508 Process window compliant corrections of design layout  
The invention provides a method of performing process window compliant corrections of a design layout. The invention includes an operator performing the following steps: (1) simulating Develop...
7310789 Use of overlay diagnostics for enhanced automatic process control  
Disclosed are apparatus and methods for obtaining and analyzing various unique metrics or “target diagnostics” from one or more semiconductor overlay targets. In one embodiment, an overlay...
7310797 Method and system for printing lithographic images with multiple exposures  
System and method is disclosed for breaking an integrated circuit design to be printed into two or more exposures by lithographic equipment, each of the two or more exposures has at least the...
7310796 System and method for simulating an aerial image  
Simulated aerial images for an optical system are made by forming a reference aerial image of a first mask used in connection with the optical system, and then capturing and processing the...
7308673 Method and apparatus for correcting 3D mask effects  
One embodiment of the present invention provides a system that improves lithography performance by correcting for 3D mask effects. During operation the system receives a mask layout that contains...
7303845 Method and system for efficiently verifying optical proximity correction  
A method of verifying optical proximity correction includes the steps of generating first mask pattern data from design data under first condition, generating first corrected pattern data by...
7305334 Methodology for image fidelity verification  
A method for predicting functionality of an integrated circuit segment to be lithographically printed on a wafer. Initially there is provided a two-dimensional design of an integrated circuit,...
7302672 Method and system for context-specific mask writing  
A method for generating lithography masks includes generating integrated circuit design data and using context information from the integrated circuit design data to write a mask.
7302673 Method and system for performing shapes correction of a multi-cell reticle photomask design  
A method for reticle design correction and electrical parameter extraction of a multi-cell reticle design. The method including: selecting a subset of cell designs of a multi-cell reticle design,...
7301161 Method of producing electron beam writing data, program of producing electron beam writing data, and electron beam writing apparatus  
A method of producing electron beam writing data in which a figure cell contained in the cell-based device pattern in electron beam lithography of character projection scheme is extracted as a...
7302651 Technology migration for integrated circuits with radical design restrictions  
A method, system and program product for migrating an integrated circuit (IC) design from a source technology without radical design restrictions (RDR) to a target technology with RDR, are...
7295885 Multi-exposure drawing method and apparatus thereof for dividing an exposing area into exposed zones and un-exposed zones based on odd-numbered and even-numbered vector-graphic data  
In a drawing method, all information on a pattern to be drawn on a drawing surface, represented by first vector-graphic data of a drawing-coordinate-system, is transmitted to an exposure drawing...
7290242 Pattern generation on a semiconductor surface  
A method of forming a pattern of elements is shown. In one embodiment, the method is used to create a reticle. In another embodiment, the method is used to further form a number of elements on a...
7287240 Designing method and device for phase shift mask  
A planar pattern ( 11 ), having a plurality of apertures of the same size (Wx×Wy), is determined by a two-dimensional layout determination tool ( 10 ), and a three-dimensional structure, having a...
7287239 Performance in model-based OPC engine utilizing efficient polygon pinning method  
Methods, and a program storage device for executing such methods, for performing model-based optical proximity correction by providing a mask matrix having a region of interest (ROI) and locating a...
7284213 Defect analysis using a yield vehicle  
A system and method for collecting and analyzing optical inspection results obtained during the manufacturing process and comparing those results to actual functional results of a specially...
7284231 Layout modification using multilayer-based constraints  
A method for improving manufacturability of a design includes performing space or enclosure checks on multiple interacting layers of a layout design and then using the resulting space or enclosure...
7280945 Apparatus and methods for detection of systematic defects  
Disclosed are mechanisms are provided for determining whether a particular integrated circuit (IC) pattern is susceptible to systematic failure, e.g., due to process fluctuations. In one...
7281222 System and method for automatic generation of optical proximity correction (OPC) rule sets  
A method of automatically creating and/or optimizing an optical proximity correction (OPC) rule set can include providing an initial OPC rule set and applying the initial OPC rule set to a layout...
7279259 Method for correcting pattern data and method for manufacturing semiconductor device using same  
A method for correcting pattern data is provided which is capable of making a proper correction to data of a pattern having a complicated layout. A correction is made to pattern data affected by a...
7278125 Semiconductor integrated circuit pattern verification method, photomask manufacturing method, semiconductor integrated circuit device manufacturing method, and program for implementing semiconductor integrated circuit pattern verification method  
A semiconductor integrated circuit pattern verification method includes executing simulation to obtain a simulation pattern to be formed on a substrate on the basis of a semiconductor integrated...
7275225 Correcting design data for manufacture  
A method of correction for design data includes the steps of sequentially applying a plurality of corrections to a plurality of features based on a plurality of feature tolerances to design data in...
7269818 Circuit element function matching despite auto-generated dummy shapes  
Methods, systems, program products are disclosed that control placement of dummy shapes about sensitive circuit elements such that the dummy shapes are at least substantially similar for each...
7269804 System and method for integrated circuit device design and manufacture using optical rule checking to screen resolution enhancement techniques  
A method of selecting a plurality of lithography process parameters for patterning a layout on a wafer includes simulating how the layout will print on the wafer for a plurality of resolution...
7269816 Driven inspection or measurement  
Design driven inspection/metrology methods and apparatus are provided. A recipe is a set of instructions including wafer processing parameters, inspection parameters, or control parameters for...
7269819 Method and apparatus for generating exposure data  
An exposure data generation method for generating exposure data that can enhance exposure throughput by making the number of shots in each of unit areas where a plurality of charged particle beams...
7269817 Lithographic process window optimization under complex constraints on edge placement  
A method and system for layout optimization relative to lithographic process windows which facilitates lithographic constraints to be non-localized in order to impart a capability of printing a...
7266803 Layout generation and optimization to improve photolithographic performance  
Disclosed are a system and method for designing a mask layout. In one example, the method includes representing the mask layout using a plurality of pixels, each having a mask transmittance...
7266800 Method and system for designing manufacturable patterns that account for the pattern- and position-dependent nature of patterning processes  
Computational models of a patterning process are described. Any one of these computational models can be implemented as computer-readable program code embodied in computer-readable media. The...
7266802 Drawing apparatus and drawing method  
A drawing apparatus, for forming a desired drawing pattern by drawing the pattern directly on a drawing target surface using a drawing engine equipped with a plurality of drawing devices arranged...
7266801 Design pattern correction method and mask pattern producing method  
There is disclosed a method of correcting a design pattern considering a process margin between layers of a semiconductor integrated circuit, including calculating a first pattern shape...
7263684 Correcting a mask pattern by selectively updating the positions of specific segments  
Correcting a mask pattern includes accessing the mask pattern segmented into segments. An attribute value is established for each segment, where the attribute value for a segment describes an...
7263683 Simplified optical proximity correction based on 1-dimension versus 2-dimension pattern shape classification  
A system that facilitates optical proximity correction comprises a layout that is desirably transferred to a silicon wafer, and an optical proximity correction component that alters the layout...
7260812 Method and apparatus for expediting convergence in model-based OPC  
One embodiment of the invention provides a system that expedites or stabilizes convergence in a model-based optical proximity correction (OPC) process. During operation, the system receives a...
7260803 Incremental dummy metal insertions  
A method and system for performing dummy metal insertion in design data for an integrated circuit is disclosed, wherein the design data includes dummy metal objects inserted by a dummy fill tool....
7260813 Method and apparatus for photomask image registration  
One embodiment of the present invention provides a system that computes translational differentials between a database-image and a scanned-image of a photomask. During operation, the system...
7260814 OPC edge correction based on a smoothed mask design  
A method and system is provided for performing edge correction on a mask design. Aspects of the invention include initially fragmenting boundaries of the mask design for optical proximity...
7257790 Layout structure of semiconductor integrated circuit and method for forming the same  
In an exemplary layout structure of a semiconductor integrated circuit manufactured by a photolithographic process using an exposing light having a wavelength λ, a peripheral circuit region is...
7254804 Method of verifying corrected photomask-pattern results and device for the same  
A method of verifying photomask-pattern-correction results includes steps of cutting away photomask patterns of a region to be subjected to correction, forming photoresist models used for execution...
7254803 Test structures for feature fidelity improvement  
Systems and techniques for generating test structures. The test structures may conform to a set of design rules for a portion of an integrated circuit design. The test structures may include base...
7254798 Method and apparatus for designing integrated circuit layouts  
A method for modifying an upper layout for an upper layer of an IC using information of a lower layout for a lower layer of the IC, the method including 1) receiving the upper layout containing...
7252913 Method for projection of a circuit pattern, which is arranged on a mask, onto a semiconductor wafer  
A simulation is carried out of a projection based on an electronically stored circuit pattern and adjustable projection parameters and optical parameters which characterize the specific...
7250372 Method for BARC over-etch time adjust with real-time process feedback  
A method for determining the anti-reflective coating (or bottom anti-reflective coating) over-etch time adjust with real-time process feedback is presented. The critical dimension CD resist of the...
7251807 Method and apparatus for identifying a manufacturing problem area in a layout using a process-sensitivity model  
One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target...
7251806 Model-based two-dimensional interpretation filtering  
Complex layout features, especially two-dimensional (2D) features such as jogs and corners, are more susceptible to photo-resist pinching and bridging, even with the use of optical proximity...
7249343 In-plane distribution data compression method, in-plane distribution measurement method, in-plane distribution optimization method, process apparatus control method, and process control method  
After a process is performed on a substrate, the in-plane distribution over the substrate is measured. Measured data of the in-plane distribution which is obtained by the measurement is stored. A...
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