|
Match
|
Document |
Document Title |
|
|
7617477 |
Method for selecting and optimizing exposure tool using an individual mask error model
Methods are disclosed for selecting and optimizing an exposure tool using an individual mask error model. In one embodiment, a method includes selecting a model of a lithography process including...
|
|
|
7617475 |
Method of manufacturing photomask and method of repairing optical proximity correction
A method of manufacturing a photomask is described. The graphic data of the photomask are provided, and than an optical proximity correction is performed to the graphic data. A process rule check...
|
|
|
7617474 |
System and method for providing defect printability analysis of photolithographic masks with job-based automation
Serious defects on a mask can compromise the functionality of the integrated circuits formed on the wafer. Nuisance defects, which do not affect the functionality, waste expensive resources. A...
|
|
|
7617473 |
Differential alternating phase shift mask optimization
A method of designing a mask for projecting an image of an integrated circuit design in lithographic processing, wherein the integrated circuit layout has a plurality of segments of critical width....
|
|
|
7615319 |
Quick and accurate modeling of transmitted field
Systems and techniques to quickly and accurately model a transmitted electromagnetic field through a mask, to design a mask, and to create a library of corrections including edge corrections,...
|
|
|
7615318 |
Printing of design features using alternating PSM technology with double mask exposure strategy
For cases where one edge of a design feature is to be printed through a shifter mask and another one is to be printed through a binary trim mask, and where no upsizing can be performed due to the...
|
|
|
7614033 |
Mask data preparation
The manufacturing of integrated circuits relies on the use of optical proximity correction (OPC) to correct the printing of the features on the wafer. The data is subsequently fractured to...
|
|
|
7614032 |
Method for correcting a mask design layout
A method for performing a mask design layout resolution enhancement includes determining a level of correction for the design layout for a predetermined parametric yield with a minimum total...
|
|
|
7614031 |
Drawing apparatus with drawing data correction function
A data correcting apparatus is for correcting drawing data representing a drawing pattern included in a quadrangular drawing area of a drawing subject. The correction process is based on an ideal...
|
|
|
7614030 |
Scattering bar OPC application method for mask ESD prevention
A method for reducing ESD on scattering bars in forming a mask containing a target pattern is provided. In one embodiment, the target pattern comprising features to be imaged onto a substrate is...
|
|
|
7614026 |
Pattern forming method, computer program thereof, and semiconductor device manufacturing method using the computer program
A pattern of a desired size is formed on a semiconductor substrate by the following procedure. A property, including at least one of an aberration of an exposure device, a property of an...
|
|
|
7610574 |
Method and apparatus for designing fine pattern
Provided are a method and apparatus for designing a fine pattern that can be entirely transferred onto an object. The method includes reading the original data of a fine pattern for exposure. The...
|
|
|
7607114 |
Designer's intent tolerance bands for proximity correction and checking
A method of conveying the designer's intended electrical characteristics for a semiconductor design is provided by forming tolerance bands for a design layer of interest that take into...
|
|
|
7603648 |
Mask design using library of corrections
Systems, techniques, and approaches to quickly generate mask patterns, synthesize near-fields, and design masks. In one aspect, a mask may be designed by modeling the transmitted field using a...
|
|
|
7600213 |
Pattern data verification method, pattern data creation method, exposure mask manufacturing method, semiconductor device manufacturing method, and computer program product
A pattern data verification method includes preparing exposure data related to a circuit pattern to be formed on a substrate, calculating a characteristic of an image of an exposure pattern on a...
|
|
|
7600212 |
Method of compensating photomask data for the effects of etch and lithography processes
A method for synthesizing a photomask data set from a given target layout, including the following steps: (a) providing a set of target polygons for the target layout; (b) fitting a smooth curve to...
|
|
|
7600207 |
Stress-managed revision of integrated circuit layouts
Roughly described, methods and systems for improving integrated circuit layouts and fabrication processes in order to better account for stress effects. Dummy features can be added to a layout...
|
|
|
7598006 |
Method and apparatus for embedded encoding of overlay data ordering in an in-situ interferometer
A method and apparatus for embedded encoding of overlay data ordering in an in-situ interferometer is described. An in-situ interferometer is encoded, or augmented, with special or missing...
|
|
|
7598005 |
Photomask and manufacturing method of the same, and pattern forming method
Data (pattern data) ( 21 ) of a mask data ( 2 ) to form a mask pattern is made into an octagon. An electron-beam lithography system has a high resolution, and it requires a polygonal pattern data...
|
|
|
7594213 |
Method and apparatus for computing dummy feature density for chemical-mechanical polishing
One embodiment of the present invention provides a system that computes dummy feature density for a CMP (Chemical-Mechanical Polishing) process. Note that the dummy feature density is used to add...
|
|
|
7592611 |
Creation method and conversion method of charged particle beam writing data, and writing method of charged particle beam
A creation method of charged particle beam writing data for writing a pattern using a charged particle beam based on design data of circuits includes creating, based on the design data, a location...
|
|
|
7590966 |
Data path for high performance pattern generator
A method and system for a high-speed datapath for a high-performance pattern generator such as an analog SLM for generating the image is disclosed. The data path has provisions for completely...
|
|
|
7589819 |
Method for the generation of variable pitch nested lines and/or contact holes using fixed size pixels for direct-write lithographic systems
Provided is a method and system for developing a lithographic mask layout. The lithographic mask layout is adapted for configuring an array of micro-mirrors in a maskless lithography system. The...
|
|
|
7587704 |
System and method for mask verification using an individual mask error model
Methods and systems are disclosed to inspect a manufactured lithographic mask, to extract physical mask data from mask inspection data, to determine systematic mask error data based on differences...
|
|
|
7587703 |
Layout determination method, method of manufacturing semiconductor devices, and computer readable program
A layout determination method determines a layout of semiconductor devices that are to be created on a substrate by carrying out an exposure process. The layout determination method determines a...
|
|
|
7587702 |
Step-walk relaxation method for global optimization of masks
A set of candidate global optima is identified, one of which is a global solution for making a mask for printing a lithographic pattern. A solution space is formed from dominant joint eigenvectors...
|
|
|
7587700 |
Process monitoring system and method for processing a large number of sub-micron measurement targets
The invention provides a method that includes the stages of: (i) receiving design information representative of a portion of an object that includes sub micron measurement targets, (ii) processing...
|
|
|
7587696 |
Semiconductor device, layout method and apparatus and program
A semiconductor device, a layout device and a layout method in which, if the size of a via interconnecting a first conductor provided in an interconnect layer and a second conductor which is...
|
|
|
7585601 |
Method to optimize grating test pattern for lithography monitoring and control
A method of making a process monitor grating pattern for use in a lithographic imaging system comprises determining minimum resolvable pitch of a plurality of spaced, adjacent line elements, and...
|
|
|
7585600 |
Method and apparatus for performing target-image-based optical proximity correction
A system that performs target-image-based optical proximity correction on masks that are used to generate an integrated circuit is presented. The system operates by first receiving a plurality of...
|
|
|
7584450 |
Method and apparatus for using a database to quickly identify and correct a manufacturing problem area in a layout
One embodiment provides a system for using a database to quickly identify a manufacturing problem area in a layout. During operation, the system receives a first check-figure which identifies a...
|
|
|
7584077 |
Physical design characterization system
A system, method and media for locating and defining process sensitive sites isolated to specific geometries or shape configurations within chip design data. Once a systemic process sensitive site...
|
|
|
7579606 |
Method and system for logic design for cell projection particle beam lithography
A method for particle beam lithography, such as electron beam (EB) lithography, includes predefining a stencil design having a plurality of cell patterns with information from a cell library,...
|
|
|
7577556 |
Method and equipment for simulation
The simulation equipment has division unit for dividing a layout of a photo mask (mask layout) into a plurality of areas, average light intensity value calculation unit for calculating an average...
|
|
|
7571424 |
Diffused aerial image model semiconductor device fabrication
A lithography method has a simulation method for mathematically approximating a photoresist film pattern with a Diffused Aerial Image Model (“DAIM”) for semiconductor device fabrication. The...
|
|
|
7571423 |
Optimized photomasks for photolithography
Photomask patterns are represented using contours defined by level-set functions. Given target pattern, contours are optimized such that defined photomask, when used in photolithographic process,...
|
|
|
7571422 |
Method for generating a design rule map having spatially varying overlay budget
The invention is a method for generating a design rule map having a spatially varying overlay error budget. Additionally, the spatially varying overlay error budget can be employed to determine if...
|
|
|
7571421 |
System, method, and computer-readable medium for performing data preparation for a mask design
A method, computer-readable medium, and system for performing data preparation are provided. An integrated circuit design is received, and a plurality of pre-optical proximity correction processes...
|
|
|
7571420 |
Dynamic sampling with efficient model for overlay
The present invention describes a method including: determining field-clustering scheme; selecting initial sample plan; establishing initial model of overlay, the initial model of overlay...
|
|
|
7571419 |
Methods and systems for performing design checking using a template
A design application improves design checking by utilizing a template. During the checking process, the design application divides the design layout into regions. To further improve processing...
|
|
|
7571418 |
Simulation site placement for lithographic process models
A method and system for performing the method are provided for designing a mask layout that includes selecting simulation sites for optical proximity correction (OPC) or mask verification, prior to...
|
|
|
7571417 |
Method and system for correcting a mask pattern design
A pattern verification method includes preparing a desired pattern and a mask pattern forming the desired pattern on a substrate, defining at least one evaluation point on an edge of the desired...
|
|
|
7568180 |
Generalization of the photo process window and its application to OPC test pattern design
A method comprises the steps of: (a) simulating on a processor a fabrication of a plurality of layout patterns by a lithographic process; (b) determining sensitivities of the layout patterns to a...
|
|
|
7568179 |
Layout printability optimization method and system
A layout printability optimization method and system is presented that may be used for enhancing the manufacturability and yield of integrated circuits. The method is based on a mathematical...
|
|
|
7568174 |
Method for checking printability of a lithography target
A technique for determining, without having to perform optical proximity correction, when the result of optical proximity correction will fail to meet the design requirements for printability. A...
|
|
|
7565639 |
Integrated assist features for epitaxial growth bulk tiles with compensation
A method for making a semiconductor device is provided which comprises (a) creating a first data set ( 301 ) which defines a first set of tiles ( 303 ) for a trench chemical mechanical polishing...
|
|
|
7565633 |
Verifying mask layout printability using simulation with adjustable accuracy
A method, system and computer program product for verifying printability of a mask layout for a photolithographic process are disclosed. A simulation of the photolithographic process for the...
|
|
|
7562336 |
Contrast based resolution enhancement for photolithographic processing
A contrast-based resolution enhancing technology (RET) determines a distribution of contrast values for edge fragments in a design layout or portion thereof. Resolution enhancement is applied to...
|
|
|
7562335 |
Semiconductor device and method of testing the same
An object is to provide a semiconductor device in which it is possible to determine whether or not a minute delay time given by a delay circuit is within a specified value or not, and a method of...
|
|
|
7562334 |
Method for manufacturing a photomask
A method for manufacturing a photomask based on design data includes the steps of forming a figure element group including a figure element in a layout pattern on the photomask and a figure element...
|