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7287239 |
Performance in model-based OPC engine utilizing efficient polygon pinning method
Methods, and a program storage device for executing such methods, for performing model-based optical proximity correction by providing a mask matrix having a region of interest (ROI) and locating a...
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7284213 |
Defect analysis using a yield vehicle
A system and method for collecting and analyzing optical inspection results obtained during the manufacturing process and comparing those results to actual functional results of a specially...
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7284231 |
Layout modification using multilayer-based constraints
A method for improving manufacturability of a design includes performing space or enclosure checks on multiple interacting layers of a layout design and then using the resulting space or enclosure...
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7281226 |
Incrementally resolved phase-shift conflicts in layouts for phase-shifted features
Phase shifting allows generating very narrow features in a printed features layer. Thus, forming a fabrication layout for a physical design layout having critical features typically includes...
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7281234 |
Short edge smoothing for enhanced scatter bar placement
An edge-smoothing process identifies a target edge fragment among a number of edge fragments that form a feature in a photolithographic design. Each of the edge fragments has a length and a...
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7281222 |
System and method for automatic generation of optical proximity correction (OPC) rule sets
A method of automatically creating and/or optimizing an optical proximity correction (OPC) rule set can include providing an initial OPC rule set and applying the initial OPC rule set to a layout...
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7279259 |
Method for correcting pattern data and method for manufacturing semiconductor device using same
A method for correcting pattern data is provided which is capable of making a proper correction to data of a pattern having a complicated layout. A correction is made to pattern data affected by a...
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7276315 |
Methods for generating or designing sidelobe inhibitors for radiation patterning tools
Design methods and a computer-readable medium having computer-executable instructions thereon for sidelobe suppression in a radiation-patterning tool or mask. Sidelobe artifacts are mitigated by...
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7278118 |
Method and process for design of integrated circuits using regular geometry patterns to obtain geometrically consistent component features
The invention provides a method and process for designing an integrated circuit based on using the results from both 1) a specific set of silicon test structure characterizations and 2) the...
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7278125 |
Semiconductor integrated circuit pattern verification method, photomask manufacturing method, semiconductor integrated circuit device manufacturing method, and program for implementing semiconductor integrated circuit pattern verification method
A semiconductor integrated circuit pattern verification method includes executing simulation to obtain a simulation pattern to be formed on a substrate on the basis of a semiconductor integrated...
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7278129 |
Healing algorithm
An aspect of the present invention includes a method for reshaping sub-objects in at least one object in pattern design data to be presented to a mask writer or a direct writer for producing a...
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7275226 |
Method of performing latch up check on an integrated circuit design
A method of performing latch up check on an integrated circuit (IC) design that comprises rasterizing a conductor region shape and contact shapes and iteratively expanding the contact shapes within...
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7275225 |
Correcting design data for manufacture
A method of correction for design data includes the steps of sequentially applying a plurality of corrections to a plurality of features based on a plurality of feature tolerances to design data in...
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7269818 |
Circuit element function matching despite auto-generated dummy shapes
Methods, systems, program products are disclosed that control placement of dummy shapes about sensitive circuit elements such that the dummy shapes are at least substantially similar for each...
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7269804 |
System and method for integrated circuit device design and manufacture using optical rule checking to screen resolution enhancement techniques
A method of selecting a plurality of lithography process parameters for patterning a layout on a wafer includes simulating how the layout will print on the wafer for a plurality of resolution...
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7269816 |
Driven inspection or measurement
Design driven inspection/metrology methods and apparatus are provided. A recipe is a set of instructions including wafer processing parameters, inspection parameters, or control parameters for...
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7269803 |
System and method for mapping logical components to physical locations in an integrated circuit design environment
A system and method for mapping Intellectual Property (IP) components onto a pre-fabricated chip slice allows a user to select a target location for placement of an IP component onto a slice. A...
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7269817 |
Lithographic process window optimization under complex constraints on edge placement
A method and system for layout optimization relative to lithographic process windows which facilitates lithographic constraints to be non-localized in order to impart a capability of printing a...
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7266480 |
Rapid scattering simulation of objects in imaging using edge domain decomposition
A complex two-dimensional layout of a photomask or other three-dimensional object is systematically decomposed into a finite number of elementary two-dimensional objects with the ability to cause...
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7266803 |
Layout generation and optimization to improve photolithographic performance
Disclosed are a system and method for designing a mask layout. In one example, the method includes representing the mask layout using a plurality of pixels, each having a mask transmittance...
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7266800 |
Method and system for designing manufacturable patterns that account for the pattern- and position-dependent nature of patterning processes
Computational models of a patterning process are described. Any one of these computational models can be implemented as computer-readable program code embodied in computer-readable media. The...
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7263684 |
Correcting a mask pattern by selectively updating the positions of specific segments
Correcting a mask pattern includes accessing the mask pattern segmented into segments. An attribute value is established for each segment, where the attribute value for a segment describes an...
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7263683 |
Simplified optical proximity correction based on 1-dimension versus 2-dimension pattern shape classification
A system that facilitates optical proximity correction comprises a layout that is desirably transferred to a silicon wafer, and an optical proximity correction component that alters the layout...
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7260807 |
Method and apparatus for designing an integrated circuit using a mask-programmable fabric
One embodiment of the invention provides a system that facilitates designing an integrated circuit using a mask-programmable fabric, which contains both mask-programmable logic and a...
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7260813 |
Method and apparatus for photomask image registration
One embodiment of the present invention provides a system that computes translational differentials between a database-image and a scanned-image of a photomask. During operation, the system...
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7257790 |
Layout structure of semiconductor integrated circuit and method for forming the same
In an exemplary layout structure of a semiconductor integrated circuit manufactured by a photolithographic process using an exposing light having a wavelength λ, a peripheral circuit region is...
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7254803 |
Test structures for feature fidelity improvement
Systems and techniques for generating test structures. The test structures may conform to a set of design rules for a portion of an integrated circuit design. The test structures may include base...
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7254798 |
Method and apparatus for designing integrated circuit layouts
A method for modifying an upper layout for an upper layer of an IC using information of a lower layout for a lower layer of the IC, the method including 1) receiving the upper layout containing...
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7252913 |
Method for projection of a circuit pattern, which is arranged on a mask, onto a semiconductor wafer
A simulation is carried out of a projection based on an electronically stored circuit pattern and adjustable projection parameters and optical parameters which characterize the specific...
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7251807 |
Method and apparatus for identifying a manufacturing problem area in a layout using a process-sensitivity model
One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target...
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7246342 |
Orientation dependent shielding for use with dipole illumination techniques
A method of printing a pattern having vertically oriented features and horizontally oriented features on a substrate utilizing dipole illumination, which includes the steps of: identifying...
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7246343 |
Method for correcting position-dependent distortions in patterning of integrated circuits
A method and system for reducing the computation time required to apply position-dependent corrections to lithography, usually mask, data is disclosed. Optical proximity or process corrections are...
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7243316 |
Test masks for lithographic and etch processes
A mask design is generated for patterning a test wafer using a lithographic or etch process, the process is characterized based on the patterned test wafer, and a pattern-dependent model is used...
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7241542 |
Process for controlling the proximity effect correction
A process for controlling the proximity effect correction in an electron beam lithography system. The exposure is controlled in order to obtain resulting pattern after processing which is conform...
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7243331 |
Method and system for controlling the quality of a reticle
A method and system are presented for use in controlling the quality of a reticle. The method includes processing and analyzing reference data and test data, and generating output data indicative...
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7240313 |
Method for analyzing material density variations on a multi-layer printed circuit board
A method for determining material density variations and prediction of defects on a multi-layer printed circuit board (PCB), in the X, Y, and Z axis, includes a virtual grid creation system and a...
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7240307 |
Pattern size correcting device and pattern size correcting method
A pattern size correcting device includes: a testing photomask ( 1 ) having a test pattern; a quantifying unit ( 2 ) that quantifies, using the testing photomask ( 1 ), size variation in the test...
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7240305 |
OPC conflict identification and edge priority system
An integrated circuit verification system provides an indication of conflicts between an OPC suggested correction and a manufacturing rule. The indication specifies which edges segments are in...
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7240321 |
Selective promotion for resolution enhancement techniques
A tool for optimizing the layout of a microdevice adds fragmentation points to polygons in a first hierarchical database layer in a manner suitable for application of a tool to apply a resolution...
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7236916 |
Structure and method of correcting proximity effects in a tri-tone attenuated phase-shifting mask
A structure and method are provided for correcting the optical proximity effects on a tri-tone attenuated phase-shifting mask. An attenuated rim, formed by an opaque region and an attenuated...
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7237221 |
Matrix optical process correction
A method for performing a matrix-based verification technique such as optical process correction (OPC) that analyzes interactions between movement of a fragment on a mask and one or more edges to...
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7234130 |
Long range corrections in integrated circuit layout designs
A method and apparatus for compensating for flare intensity variations across an integrated circuit. A layout description for a physical layer of an integrated circuit or portion thereof is divided...
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7232630 |
Method for printability enhancement of complementary masks
When substantially all features in a layout for a layer of material in an integrated circuit (IC) are defined using a phase shifting mask, the related complementary mask that is normally used to...
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7233887 |
Method of photomask correction and its optimization using localized frequency analysis
A method of level assist feature OPC layout is described using frequency model-based approach. Through low-pass spatial frequency filtering of a mask function, the local influence of zero...
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7234128 |
Method for improving the critical dimension uniformity of patterned features on wafers
A method for improving the critical dimension uniformity of a patterned feature on a wafer in semiconductor and mask fabrication is provided. In one embodiment, an evaluation means for evaluating...
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7231629 |
Feature optimization using enhanced interference mapping lithography
Disclosed concepts include a method of, and program product for, optimizing an intensity profile of a pattern to be formed in a surface of a substrate relative to a given mask using an optical...
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7228523 |
Method of automatically correcting mask pattern data and program for the same
A method of automatically correcting mask pattern data includes steps (a) to (d). Here, in this method, the mask pattern data are for producing photo masks used in manufacturing processes of a...
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7228511 |
Method and apparatus for designing printed circuit boards to meet leakage current requirements
A method and apparatus used for designing printed circuit boards to meet current leakage requirement by determining an approximate model of electric fields based on a structure between two...
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7228193 |
Methods for detecting structure dependent process defects
Semiconductor devices formed on wafers are inspected using a master wafer. A subject wafer of a semiconductor design is provided. The subject wafer has dies wherein semiconductor devices of the...
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7228522 |
Edge-based proximity correction
One embodiment of the present invention provides a system that calculates an edge-based proximity correction which is applied to a region in the proximity of an evaluation point. During operation...
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