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7350176 |
Techniques for mapping to a shared lookup table mask
Techniques for combining lookup tables on a programmable integrated circuit are provided. Lookup tables (LUTS) in a design for a programmable circuit can be combined into one mask if they implement...
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7350183 |
Method for improving optical proximity correction
A method for performing model based optical proximity correction (MBOPC) and a system for performing MBOPC is described, wherein the process model is decomposed into a constant process model term...
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7350182 |
Methods of forming patterned reticles
The invention includes methods of forming patterned reticles. Design features can be introduced into a layout for a reticle prior to optical proximity correction, and then removed prior to taping a...
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7349066 |
Apparatus, method and computer program product for performing a model based optical proximity correction factoring neighbor influence
Model Based Optical Proximity Correction (MOPC) biasing techniques may be utilized for optimizing a mask pattern. However, conventional MOPC techniques do not account for influence from neighboring...
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7350181 |
Set of masks, method of generating mask data and method for forming a pattern
A method of generating mask data, for a set of masks used to transfer a pattern for delineating a circuit pattern of a semiconductor integrated circuit, includes preparing design data having a...
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7346883 |
System and method for integrated data transfer, archiving and purging of semiconductor wafer data
A system for the integrated archiving, restoring, purging, importing and exporting of semiconductor wafer data, the system including a data acquisition system for acquiring scan data from differing...
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7346884 |
Integrated circuit (IC) having IC floorplan silhouette-like power supply net, and sea of supply (SoS) electronic design automation (EDA) tool for designing same
An integrated circuit (IC) having an IC floorplan silhouette-like power supply net, and a computer executable Sea of Supply (SoS) Electronic Design Automation (EDA) tool for automatically designing...
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7346885 |
Method for producing a mask layout avoiding imaging errors for a mask
A final mask layout ( 20 ′) is produced by producing a provisional auxiliary mask layout in accordance with a predefined electrical circuit diagram and converting it into the final mask layout (...
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7346886 |
Method and apparatus for determining chip arrangement position on substrate
In determining a relative position between a chip lattice including rectangular cells, each of which has a size of a chip to be formed on a substrate and an effective area on the substrate, one...
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7346882 |
Pattern forming method, mask manufacturing method, and LSI manufacturing method
A pattern forming method includes the steps of checking a wide range size change characteristic for each device in a case of using a device group used for forming a pattern; dividing a design...
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7346887 |
Method for fabricating integrated circuit features
The present invention is directed to a method for conversion of an integrated circuit design into a set of masks for fabrication of an integrated circuit that optimizes use of an edge based image...
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7343583 |
System and method for searching for patterns of semiconductor wafer features in semiconductor wafer data
A system for the integrated archiving, restoring, purging, importing and exporting of semiconductor wafer data, the system including a data acquisition system for acquiring scan data from differing...
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7343582 |
Optical proximity correction using progressively smoothed mask shapes
A method, program product and system is disclosed for performing optical proximity correction (OPC) wherein mask shapes are fragmented based on the effective image processing influence of...
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7340706 |
Method and system for analyzing the quality of an OPC mask
The present invention provides a method and system for analyzing the quality of an OPC mask. The method includes receiving a target layer from a target design, receiving an OPC mask layer from the...
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7340697 |
Integrated computer-aided circuit design kit facilitating verification of designs across different process technologies
Methods and apparatus are described that allow an integrated circuit designer to design integrated circuits for more than one process technology using a single master design environment. The master...
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7337423 |
Mask pattern generating method and mask pattern generating apparatus
Established is a mask pattern correcting technique for reducing the load to a mask CAD process and for ensuring the minimum dimension defined in an OPC process. A method comprises the steps of:...
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7337424 |
Flexible shape identification for optical proximity correction in semiconductor fabrication
Transient edges are used to define shapes in an integrated circuit layout for optical proximity correction. A first variation of the shape includes a first edge, a second edge satisfying an edge...
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7334212 |
Method for interlayer and yield based optical proximity correction
An optical proximity correction method is provided using a modified merit function based upon yield. Known failure mechanisms related to layout geometries are used to derive yield functions based...
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7332251 |
Pattern decomposition and optical proximity correction method for double exposure when forming photomasks
A pattern decomposition and optical proximity correction method for double exposure comprises defining second exposure patterns by performing a logical operation on target patterns and first...
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7332252 |
Method of forming a mask layout and layout formed by the same
A mask layout forming method includes designing an original layout in which a diagonal pattern of a first polygon is repeatedly arranged in a diagonal direction relative to a vertical-axis...
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7334211 |
Method for designing a CMOS sensor using parameters
An improved CMOS sensor integrated circuit is disclosed, along with methods of making the circuit and computer readable descriptions of the circuit.
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7331033 |
Simulation of aerial images
A method for generating a simulated aerial image of a mask projected by an optical system includes determining a coherence characteristic of the optical system. A coherent decomposition of the...
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7328418 |
Iso/nested control for soft mask processing
This method includes a method for etch processing that allows the bias between isolated and nested structures/features to be adjusted, correcting for a process wherein the isolated...
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7328424 |
Method for determining a matrix of transmission cross coefficients in an optical proximity correction of mask layouts
The present invention relates to a method for determining a matrix of transmission cross coefficients w for an optical modeling in an optical proximity correction of mask layouts. In a first step,...
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7325225 |
Method and apparatus for reducing OPC model errors
It is important to assess and reduce errors that arise in mask correction techniques such as optical proximity correction. A preliminary mask is obtained using an OPC model. An etched wafer is...
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7325223 |
Modification of pixelated photolithography masks based on electric fields
Faster synthesis of photolithography mask modifications is described. In one embodiment, the invention includes synthesizing a first binary photolithography mask, developing perturbations to an...
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7324930 |
Method and apparatus for performing OPC using model curvature
A method of preparing a file that stores layout of devices to be created with photolithography for optical and process correction (OPC). Polygons that define structures to be created are initially...
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7325222 |
Method and apparatus for verifying the post-optical proximity corrected mask wafer image sensitivity to reticle manufacturing errors
A method for verifying reticle enhancement technique latent image sensitivity to mask manufacturing errors. The method includes the steps of revising a polygon based on mask CD distributions to...
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7325224 |
Method and system for increasing product yield by controlling lithography on the basis of electrical speed data
The electrical performance of sub-devices is detected and the corresponding measurement data is used to control a lithography process so as to compensate for any type of process variations during a...
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7323278 |
Method of adding fabrication monitors to integrated circuit chips
An integrated circuit, a method and a system for designing and a method fabricating the integrated circuit. The method including: (a) generating a photomask level design of an integrated circuit...
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7324863 |
Automatically selecting wafers for review
In one embodiment, the present invention includes a method for receiving a set of inspection files each corresponding to an inspection performed on a wafer of a set of wafers, automatically...
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7319944 |
Method for a predicting a pattern shape by using an actual measured dissolution rate of a photosensitive resist
A computer implemented method for development profile simulation in accordance with an embodiment of the present invention includes calculating optical intensities in a photosensitive resist,...
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7320119 |
Method and apparatus for identifying a problem edge in a mask layout using an edge-detecting process-sensitivity model
One embodiment of the present invention provides a system that identifies a problem edge in a mask layout which is likely to have manufacturing problems. During operation, the system creates an...
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7313780 |
System and method for designing semiconductor photomasks
A trial semiconductor photomask design having discontinuity points is provided, and each of the discontinuity points is treated as simulated light sources. Simulated light from each of the...
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7313774 |
Method and apparatus for associating an error in a layout with a cell
One embodiment of the present invention provides a system that associates an error in a layout with a cell. During operation, the system receives a layout which is designed to create a target...
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7313781 |
Image data correction method, lithography simulation method, image data correction system, program, mask and method of manufacturing a semiconductor device
An image data correction method includes preparing correction data for correcting a distortion of an image obtained by an image acquiring section, acquiring outline data of a desired pattern...
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7313456 |
Method and apparatus for capturing and using design intent in an integrated circuit fabrication process
A method and apparatus for capturing and using design intent within an IC fabrication process. The design intent information is produced along with the design release by a design company. The...
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7310789 |
Use of overlay diagnostics for enhanced automatic process control
Disclosed are apparatus and methods for obtaining and analyzing various unique metrics or “target diagnostics” from one or more semiconductor overlay targets. In one embodiment, an overlay...
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7310797 |
Method and system for printing lithographic images with multiple exposures
System and method is disclosed for breaking an integrated circuit design to be printed into two or more exposures by lithographic equipment, each of the two or more exposures has at least the...
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7310796 |
System and method for simulating an aerial image
Simulated aerial images for an optical system are made by forming a reference aerial image of a first mask used in connection with the optical system, and then capturing and processing the...
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7308673 |
Method and apparatus for correcting 3D mask effects
One embodiment of the present invention provides a system that improves lithography performance by correcting for 3D mask effects. During operation the system receives a mask layout that contains...
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7303845 |
Method and system for efficiently verifying optical proximity correction
A method of verifying optical proximity correction includes the steps of generating first mask pattern data from design data under first condition, generating first corrected pattern data by...
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7305638 |
Method and system for ROM coding to improve yield
A method for improving yield of a process for fabricating a read-only memory (ROM) includes evaluating a yield of a ROM fabrication process associated with a first ROM design. At least two...
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7304001 |
Fabrication methods of semiconductor integrated circuit device and photomask
Under the condition that a semiconductor maker and a photomask maker are separated but these are mutually connected with a communication line, the semiconductor maker gives a photomask fabrication...
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7305651 |
Mask CD correction based on global pattern density
The present disclosure provides a method of forming a photomask layout. In one example, the method comprises selecting a pattern feature on the photomask layout, defining a global area centered at...
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7305334 |
Methodology for image fidelity verification
A method for predicting functionality of an integrated circuit segment to be lithographically printed on a wafer. Initially there is provided a two-dimensional design of an integrated circuit,...
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7302672 |
Method and system for context-specific mask writing
A method for generating lithography masks includes generating integrated circuit design data and using context information from the integrated circuit design data to write a mask.
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7302671 |
Integrated circuit logic with self compensating shapes
An integrated circuit (IC) including at least one combinational logic path. The features in the combinational logic path are self compensating for out-of-focus effects. In particular, field effect...
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7302673 |
Method and system for performing shapes correction of a multi-cell reticle photomask design
A method for reticle design correction and electrical parameter extraction of a multi-cell reticle design. The method including: selecting a subset of cell designs of a multi-cell reticle design,...
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7301161 |
Method of producing electron beam writing data, program of producing electron beam writing data, and electron beam writing apparatus
A method of producing electron beam writing data in which a figure cell contained in the cell-based device pattern in electron beam lithography of character projection scheme is extracted as a...
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