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7514183 |
Method for performing transmission tuning of a mask pattern to improve process latitude
A method of generating a mask for use in a photolithography process. The method includes the steps of determining a target mask pattern having a plurality of features to be imaged and an...
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7512926 |
Phase-shifting masks with sub-wavelength diffractive optical elements
The present invention discloses a method of designing a set of two tiled masks, as well as, a mask including: a first tile, the first tile being transparent to a light, the first tile having a...
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7512928 |
Sub-resolution assist feature to improve symmetry for contact hole lithography
A method of making a mask design having optical proximity correction features is provided. The method can include obtaining a target pattern comprising a plurality of target pattern features...
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7512927 |
Printability verification by progressive modeling accuracy
A fast method of verifying a lithographic mask design is provided wherein catastrophic errors are identified by iteratively simulating and verifying images for the mask layout using progressively...
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7509621 |
Method and apparatus for placing assist features by identifying locations of constructive and destructive interference
One embodiment of the present invention provides a system that determines a location in a layout to place an assist feature. During operation, the system receives a layout of an integrated circuit....
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7509623 |
Manufacturing method of semiconductor device
A pattern correction method executed by a computer includes a first correction and a second correction. The first correction is executed by calculating a correction value, in consideration for an...
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7509620 |
Dual phase shift photolithography masks for logic patterning
A pair of phase shift photolithography masks and a process for deriving them is described. In one embodiment, the invention includes deriving a complex electric field estimate for an intended...
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7509624 |
Method and apparatus for modifying a layout to improve manufacturing robustness
One embodiment of the present invention provides a system that modifies a layout to improve manufacturing robustness. During operation, the system receives a layout. The system then selects a...
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7506301 |
Method for correcting a mask pattern, system for correcting a mask pattern, program, method for manufacturing a photomask and method for manufacturing a semiconductor device
A computer implemented method for correcting a mask pattern includes: predicting a displacement of a device pattern by using a mask pattern to form the device pattern and a variation of a process...
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7506285 |
Multi-dimensional analysis for predicting RET model accuracy
A system and method for determining whether a desired integrated circuit layout can be accurately modeled from a resist model that is calibrated from a mask test pattern. In one embodiment, a...
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7506299 |
Feature optimization using interference mapping lithography
Disclosed concepts include a method of, and program product for, optimizing an illumination profile of a pattern to be formed in a surface of a substrate relative to a given mask. Steps include...
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7506300 |
Apparatus and method for breaking up and merging polygons
A method of modifying polygons in a data set mask-less or mask based optical projection lithography includes: 1) mapping the data set to a figure-of-demerit; 2) moving individual polygon edges to...
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7503024 |
Method for hierarchical VLSI mask layout data interrogation
The present disclosure is directed to a method for hierarchical Very Large Scale Integrated (VLSI) mask layout data interrogation. The method displays a tree diagram of the layout hierarchy and...
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7501212 |
Method for generating design rules for a lithographic mask design that includes long range flare effects
A method is described for computing distance based and pattern density based design rules for the mask layout design of a VLSI chip so that the design satisfying the above design rules when...
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7503028 |
Multilayer OPC for design aware manufacturing
A method is provided for designing a mask layout for an integrated circuit that ensures proper functional interaction among circuit features by including functional inter-layer and intra-layer...
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7503029 |
Identifying layout regions susceptible to fabrication issues by using range patterns
A range pattern is matched to a block of an IC layout by slicing the layout block and the range pattern, followed by comparing a sequence of widths of layout slices to a sequence of width ranges of...
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7500218 |
Lithographic apparatus, method, and computer program product for generating a mask pattern and device manufacturing method using same
Grayscale Optical Proximity Correction device features are added to a mask pattern by convoluting the device features with a two-dimensional correction kernel or two one-dimensional correction...
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7500219 |
Exposure data generator and method thereof
A plurality of patterns placed within an target region are classified by their placement positions, a pattern adjacent to each side of each pattern is searched for by using the classification...
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7500217 |
Handling of flat data for phase processing including growing shapes within bins to identify clusters
Definition of a phase shifting layout from an original layout can be time consuming. If the original layout is divided into useful groups, i.e. clusters that can be independently processed, then...
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7496884 |
Distributed hierarchical partitioning framework for verifying a simulated wafer image
A system that verifies a simulated wafer image against an intended design. During operation, the system receives a design. Next, the system generates a skeleton from the design, wherein the...
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7496881 |
Mask validation using contours
Embodiments of mask validation using simulated resist contours are presented herein. The mask validation system disclosed utilizes simulated resist contour of a mask useable for semiconductor...
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7496880 |
Method and apparatus for assessing the quality of a process model
One embodiment of the present invention provides a system that assesses the quality of a process model. During operation, the system receives a mask layout and additionally receives a process model...
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7496885 |
Method of compensating for defective pattern generation data in a variable shaped electron beam system
The present invention comprises a system, software, and method for the treatment of mask data that produces defects in resultant images produced in the fabrication of a mask, following...
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7496883 |
Method and apparatus for identifying and correcting phase conflicts
One embodiment of the present invention provides a system that identifies a substantially minimal set of phase conflicts in a PSM-layout that when corrected renders the layout phase-assignable....
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7493589 |
Method, program product and apparatus for model based geometry decomposition for use in a multiple exposure process
A method of decomposing a target pattern having features to be imaged on a substrate so as to allow said features to be imaged in a multi-exposure process. The method includes the steps of: (a)...
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7491479 |
Compensating for effects of topography variation by using a variable intensity-threshold
One embodiment of the present invention provides a system that accurately determines a critical dimension of a feature in a layout by compensating for the effects of topography variation on the...
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7493588 |
Mixing and matching method and integration system for providing backup strategries for optical environments and method for operating the same
A mixing-and-matching method for an optical environment group is disclosed in this invention. The optical environment group has at least a primary optical environment having a first numerical...
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7493577 |
Automatic recognition of geometric points in a target IC design for OPC mask quality calculation
A method and system is provided for automatically recognizing geometric points of features in a target design for OPC mask quality calculation. For each feature in the target design, x, y points...
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7493587 |
Chromeless phase shifting mask for integrated circuits using interior region
A system for creating mask layout pattern data in order to create a number of desired features on a semiconductor wafer. Critical features and features that are adjacent to or abut critical...
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7490304 |
Determining geometrical configuration of interconnect structure
Methods are disclosed for determining a geometrical configuration of an interconnect structure of a test structure without cross-sectioning or optical measurements. In one embodiment, the method...
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7487474 |
Designing an integrated circuit to improve yield using a variant design element
An integrated circuit is designed to improve yield when manufacturing the integrated circuit, by obtaining a design element from a set of design elements used in designing integrated circuits. A...
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7487489 |
Calculation system for inverse masks
A system for calculating mask data to create a desired layout pattern on a wafer reads all or a portion of a desired layout pattern. Mask data having pixels with transmission characteristics is...
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7487491 |
Pattern inspection system using image correction scheme with object-sensitive automatic mode switchability
An image correction device for use in a pattern inspection apparatus is disclosed, which has automatic adaptability to variations in density of a pattern image of a workpiece being tested. The...
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7487490 |
System for simplifying layout processing
A system and method for integrated circuit design are disclosed to enhance manufacturability of circuit layouts by applying layout processing to handle imperfections such as jogs in integrated...
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7484198 |
Managing integrated circuit stress using dummy diffusion regions
Roughly described, methods and systems for improving integrated circuit layouts and fabrication processes in order to better account for stress effects. Dummy features can be added to a layout...
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7483155 |
Structure inspection method, pattern formation method, process condition determination method and resist pattern evaluation apparatus
Wavelength dispersion of intensity of light reflected from an evaluation object is measured. A complex refractive index of a substance forming the evaluation object and the environment are...
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7480892 |
Overlay mark
An overlay mark formed on a photomask, comprising a first rectangular region, a second rectangular region, a third rectangular region, and a fourth rectangular region, each rectangular region...
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7480891 |
Method and apparatus of model-based photomask synthesis
An apparatus and method for improving image quality in a photolithographic process includes calculating a figure-of-demerit for a photolithographic mask function and then adjusting said...
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7480888 |
Design structure for facilitating engineering changes in integrated circuits
A design structure embodied in a machine-readable medium is disclosed in one embodiment of the invention as including a flexible logic block to facilitate engineering changes at selected locations...
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7480539 |
Automated manufacturing system and method for processing photomasks
The present invention relates generally to an automated manufacturing system and method for manufacturing photomasks wherein information provided by a customer at a remote location is interfaced,...
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7476880 |
Writing a circuit design pattern with shaped particle beam flashes
A shaped particle beam writing strategy can be used to write a pattern with a particle beam onto a substrate. The pattern comprises a circuit design that is fractured into a plurality of arbitrary...
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7478353 |
Non-uniform decoupling capacitor distribution for uniform noise reduction across chip
An embodiment of the present invention includes a method of providing a non-uniform distribution of decoupling capacitors to provide a more uniform noise level across the chip. Leads on a packaged...
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7475381 |
Shallow trench avoidance in integrated circuits
Diffusion regions in a standard cell design are bridged across cell boundaries. Shallow trench isolation is reduced and nitride passivation thickness variation is reduced.
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7475380 |
Generating mask patterns for alternating phase-shift mask lithography
A system, method and recording medium are provided for generating patterns of a paired set of a block mask and a phase shift mask from a data set defining a circuit layout to be provided on a...
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7475379 |
Methods and systems for layout and routing using alternating aperture phase shift masks
Methods for performing phase-correct layout and routing of integrated circuits using alternating aperture phase shift masks (AltPSM), including bright field AltPSM and dark field AltPSM are...
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7475382 |
Method and apparatus for determining an improved assist feature configuration in a mask layout
One embodiment of the present invention provides a system that determines the locations and dimensions of one or more assist features in an uncorrected or corrected mask layout. During operation,...
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7473495 |
Method of creating predictive model, method of managing process steps, method of manufacturing semiconductor device, method of manufacturing photo mask, and computer program product
A method of creating a predictive model of a process proximity effect comprises: preparing a predictive model of a process proximity effect including a non-determined parameter; and determining the...
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7472372 |
Fast image simulation for photolithography
A fast method simulates photolithography using conventional image processing techniques. Convolution simulates blurring due to optics; erosion and dilation correct for edge diffraction. To produce...
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7470492 |
Process window-based correction for photolithography masks
A correction for photolithography masks used in semiconductor and micro electromechanical systems is described. The correction is based on process windows. In one example, the invention includes...
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7469057 |
System and method for inspecting errors on a wafer
A method and system is disclosed for inspecting defects on a wafer. After acquiring at least one digitized image of at least one portion of a wafer, at least one design database file corresponding...
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