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7622947 |
Redundant circuit presents connections on specified I/O ports
A method and apparatus for utilizing redundant circuitry on integrated circuits (ICs) that may increase manufacturing yields, while maintaining a predetermined set of interfaces for connection with...
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7620927 |
Method and apparatus for circuit design closure using partitions
A method of implementing a circuit design can include selecting the circuit design to be implemented, wherein the circuit design comprises a plurality of partitions, and receiving a user input...
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7620926 |
Methods and structures for flexible power management in integrated circuits
Structures and methods of efficiently implementing power management in integrated circuits (ICs). An IC includes columns of logic blocks and columns of power management blocks (PMBs). The columns...
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7620925 |
Method and apparatus for performing post-placement routability optimization
A method for designing a system on a target device includes synthesizing the system. The system is placed on the target device. Optimizing placement of the system for routing is performed after...
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7620924 |
Base platforms with combined ASIC and FPGA features and process of using the same
A process is disclosed for configuring a base platform having ASIC and FPGA modules to perform a plurality of functions. A verified RTL hardware description of a circuit is mapped and annotated to...
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7620853 |
Methods for detecting resistive bridging faults at configuration random-access memory output nodes
Integrated circuits such as programmable logic device integrated circuits have configuration random-access memory elements. The configuration random-access memory elements are tested to determine...
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7617472 |
Regional signal-distribution network for an integrated circuit
Signal distribution of a regional signal is described. An integrated circuit includes a global signal distribution network, a regional signal distribution network and a regional buffer. The...
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7617470 |
Reconfigurable integrated circuit and method for increasing performance of a reconfigurable integrated circuit
Methods are disclosed to increase yielded performance of a reconfigurable integrated circuit; improve performance of an application running on a reconfigurable integrated circuit; reduce...
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7616508 |
Flash-based FPGA with secure reprogramming
A flash-based programmable integrated circuit includes programmable circuitry, a flash memory array coupled to the programmable circuitry for configuring it, flash programming circuitry for...
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7616027 |
Configurable circuits, IC's and systems
Some embodiments of the invention provide a configurable integrated circuit (IC). The configurable IC includes first and second interconnect circuits. The first interconnect circuit has a set of...
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7614029 |
Methods and systems for converting a synchronous circuit fabric into an asynchronous dataflow circuit fabric
Methods and systems for converting synchronous circuit designs to asynchronous circuit designs, and particularly programmable asynchronous circuit designs. Provide is a systematic, workable and...
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7614020 |
Structurally field-configurable semiconductor array for in-memory processing of stateful, transaction-oriented systems
A semiconductor memory device is provided. The semiconductor memory device includes a plurality of memory cells arranged in multiple column groups, each column group having, a plurality of columns...
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7613858 |
Implementing signal processing cores as application specific processors
Methods and apparatus are provided for efficiently implementing signal processing cores as application specific processors. A signal processing core, such as a Fast Fourier Transform (FFT) core or...
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7610572 |
Semiconductor integrated circuit device with independent power domains
A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an...
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7607118 |
Techniques for using edge masks to perform timing analysis
Techniques are provided for more efficient timing analysis of user designs for programmable ICs. Initially, a graph is created that represents nodes and edges in a user design. Each edge in the...
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7607117 |
Representing device layout using tree structure
Methods are described herein for using a tree structure representation for searching selected areas of a programmable device layout in order to determine the existing component configuration of a...
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7607005 |
Virtual hardware system with universal ports using FPGA
Particular implementations are particularly useful in providing a system in which the hardware is more easily upgradable and new hardware functionality may be added without adding any new physical...
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7603646 |
Method and apparatus for power optimization using don't care conditions of configuration bits in lookup tables
Various approaches for generating an implementation of an electronic circuit design are disclosed. In one approach, one or more configuration bits that have don't care conditions are identified for...
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7603599 |
Method to test routed networks
Testing of routing resources in a path between network nodes is provided using simpler nodes to replace more complex IP modules which could be programmed into an FPGA after the routing resources...
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7602212 |
Flexible high-speed serial interface architectures for programmable integrated circuit devices
An integrated circuit (e.g., a programmable integrated circuit such as a programmable microcontroller, a programmable logic device, etc.) includes high-speed serial data signal interface channels,...
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7600210 |
Method and apparatus for modular circuit design for a programmable logic device
Method, apparatus, and computer readable medium for modular circuit design for a programmable logic device (PLD) is described. In one example, a circuit design is captured. The circuit design...
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7598768 |
Method and apparatus for dynamic port provisioning within a programmable logic device
A method and apparatus to allow dynamic port provisioning of communication ports within a Programmable Logic Device (PLD). The dynamic port provisioning combines configuration of serial...
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7595655 |
Retrieving data from a configurable IC
Some embodiments provide a configurable integrated circuit (IC). The IC has configurable logic circuits for performing logical operations, configurable routing circuits for routing signals between...
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7594212 |
Automatic pin placement for integrated circuits to aid circuit board design
A computer-implemented method of placing input/output (I/O) pins of a circuit design for an integrated circuit (IC) can include selecting a bus from a plurality of buses, where the selected bus...
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7594204 |
Method and apparatus for performing layout-driven optimizations on field programmable gate arrays
A method for designing a system on a target device utilizing field programmable gate arrays (FPGAs) includes identifying a group of components associated with a critical signal in the system. A...
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7594046 |
Data processing in which concurrently executed processes communicate via a FIFO buffer
A processing circuit executes a data producing process and a data consuming process. The data producing process produces a stream of data, the data consuming process consumes the stream of data...
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7590965 |
Methods of generating a design architecture tailored to specified requirements of a PLD design
Methods of generating a PLD design implementation according to a design architecture tailored to specified requirements. A hardware description language (HDL) description for the PLD design...
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7590960 |
Placing partitioned circuit designs within iterative implementation flows
A method of placing circuit elements of a partitioned circuit design on a target programmable logic device (PLD) can include mapping circuit elements of the circuit design to corresponding...
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7590951 |
Plug-in component-based dependency management for partitions within an incremental implementation flow
A method of managing an incremental implementation flow (incremental flow) for a circuit design can include storing dependency management data for the incremental flow for the circuit design and,...
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7587698 |
Operational time extension
Some embodiments provide a reconfigurable integrated circuit (“IC”). This IC has several reconfigurable circuits, each having several configurations for several configuration cycles. The...
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7587697 |
System and method of mapping memory blocks in a configurable integrated circuit
Some embodiments provide a method of providing configurable ICs to a user. The method provides the configurable IC and a set of behavioral descriptions to the user. The behavioral descriptions...
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7587686 |
Clock gating in a structured ASIC
Circuits and methods use clock gating to reduce power consumption in select parts of a structured ASIC. A clock distribution network includes a deterministic portion, a configurable portion, and...
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7584460 |
Process and apparatus for abstracting IC design files
File paths for a plurality of IC design files in a hardware description language are abstracted by parsing description files, or a directory of description file names, to identify file paths to...
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7584448 |
Constructing a model of a programmable logic device
A processor-implemented method is provided for constructing a model of a programmable logic device (PLD) design. A netlist is input that describes the PLD design. An identification is input of...
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7584447 |
PLD architecture for flexible placement of IP function blocks
In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function...
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7584446 |
Method and apparatus for extending processing time in one pipeline stage
A single channel or multi-channel system that requires the execution time of a pipeline stage to be extended to a time longer than the time interval between two consecutive input data. Each...
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7577929 |
Early timing estimation of timing statistical properties of placement
A performance estimation module estimates the performance values of user designs in early phases of compilation and accounts for the performance variability introduced by subsequent compilation...
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7574687 |
Method and system to optimize timing margin in a system in package module
In a System-in-Package (SiP) module, a method and a system for optimizing the timing margin of source-synchronous interface clocks is provided. Clock signals generated by first device are...
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7574679 |
Generating cores using secure scripts
Methods and apparatus are provided for securely generating IP cores. A designer selects and configures parameterizable IP cores provided for implementation on a programmable chip. The IP cores are...
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7573296 |
Configurable IC with configurable routing resources that have asymmetric input and/or outputs
Some embodiments provide a configurable IC that includes several configurable tiles. The configurable tiles include several interior tiles within the interior of an arrangement of configurable...
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7571413 |
Testing circuitry for programmable logic devices with selectable power supply voltages
A programmable integrated circuit has multiple power supply voltages. Power supply voltages are distributed using power supply distribution lines. The integrated circuit has programmable power...
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7571412 |
Method and system for semiconductor device characterization pattern generation and analysis
A method for generating automatic design characterization patterns for integrated circuits (IC) is provided. The method includes selecting a routing scheme from a file containing the device...
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7571395 |
Generation of a circuit design from a command language specification of blocks in matrix form
Generation of a circuit design using a command language. The various approaches include generating in a memory arrangement respective instances of design blocks in response to user-entered commands...
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7565635 |
SiP (system in package) design systems and methods
SiP design systems and methods. The system comprises a system partitioning module, a subsystem integration module, a physical design module, and an analysis module. The system partitioning module...
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7565634 |
Massively parallel boolean satisfiability implication circuit
The application concerns prototyped custom Programmable Logic Devices (Pills) for Boolean satisfiability (SAT) problems. This approach is based on the use of clause evaluation circuits (CECs),...
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7565280 |
Solver for simulating a system in real time on a programmable hardware element
A method for performing a simulation of a system. The system includes an FPGA that is configured to implement simulation logic, such as a generic solver. For example, the FPGA device may implement...
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7562350 |
Processing system and method using recomposable software
An inspecting apparatus for inspecting a performance of a circuit baseboard. The inspecting apparatus includes a PLD having a circuit for inspecting the circuit baseboard based upon a response...
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7562332 |
Disabling unused/inactive resources in programmable logic devices for static power reduction
A method of operating a programmable logic device, including the steps of enabling resources of the programmable logic device being used in a circuit design implemented by the programmable logic...
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7562162 |
Systems and methods for distributed computing utilizing a smart memory apparatus
Provided are methods, systems and devices for distributed computing within a computing device that includes a host operating system executing within a host processor, a peripheral subsystem and a...
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7558967 |
Encryption for a stream file in an FPGA integrated circuit
A system for encrypting and decrypting data in a data stream for programming a Field Programmable Gate Array (FPGA). The system allows for an enable bit to be set for a gap in the data stream and...
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