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9038004 Automated integrated circuit design documentation  
A method of creating a datasheet includes obtaining integrated circuit data from at least one data source, creating a data structure including the integrated circuit data obtained from the at...
9032346 Method and apparatus for creating and managing waiver descriptions for design verification  
Methods are provided to facilitate automated creation and management of design rule checking or DRC waiver descriptions. Embodiments include receiving a plurality of first checksums corresponding...
9032345 Digital circuit verification monitor  
A method, a system and a computer readable medium for providing information relating to a verification of a digital circuit. The verification may be formal verification and comprise formally...
9032350 Semiconductor device  
A method for bypassing a defective through silicon via x in a group of n adjacent through silicon vias, includes receiving a plurality of relief signals to identify the defective through silicon...
9032343 Integrating multiple FPGA designs by merging configuration settings  
This disclosure relates generally to field-programmable gate arrays (FPGAs). Some implementations relate to methods and systems for transmitting and integrating an intellectual property (IP) block...
9026960 Systems and methods for lithography-aware floorplanning  
The present invention is directed towards designing integrated circuit and provides systems and methods for lithography-aware floorplanning. According to one embodiment of the invention, a method...
9026961 Race logic synthesis for ESL-based large-scale integrated circuit design  
Techniques for performing race logic synthesis on an integrated circuit (IC) are described herein. According to one aspect of the invention, ESL (electronic system level) and any HDL (hardware...
9026962 Integrated electronic design automation system  
An electronic design automation system combines features of discrete EDA/CAD systems and manufacturing systems into a monolithic system to enable a layperson to efficiently design, construct and...
9015016 System and method for three-dimensional schematic capture and result visualization of multi-physics system models  
A 3-D multi-physics design environment (“3-D design environment”) for designing and simulating multi-physics devices such as MEMS devices is discussed. The 3-D design environment is...
8990753 Circuit layout adjusting method  
A circuit layout adjusting method is provided. A data file is generated according to a circuit board engineering drawing. The dada file includes at least one parameter of the circuit board...
8984455 Methods for generating schematic diagrams and apparatuses using the same  
An embodiment of the invention introduces a method for generating schematic diagrams, executed by a processing unit of an apparatus, which comprises the following steps. A pin-editing interface...
8972924 Method for changing string arrangement, recording medium for string arrangement changing program, and information processor  
A method for changing, by using a computer, an arrangement of strings that are arranged along an inner periphery of a graphic and partially overlap one another is offered. The computer arranges...
8972916 Method and system for checking the inter-chip connectivity of a three-dimensional integrated circuit  
A method for checking the inter-chip connectivity of a three-dimensional (3D) integrated circuit (IC) generally comprises receiving a design file for each of a plurality of chips of the 3D IC and...
8972923 Method and apparatus and software code for generating a hardware stream processor design  
Embodiments of the invention provide a method of automatically generating a hardware stream processor design including plural processes and interconnect between the plural processes to provide...
8966414 Implementing a circuit using an integrated circuit including parametric analog elements  
An environment and method are provided for designing and implementing a circuit comprising an integrated circuit (IC) including a number of parametric analog elements for which operating...
8966413 System and method for a chip generator  
A chip generator according to an embodiment of the present invention codifies designer knowledge and design trade-offs into a template that can be used to create many different chips. Like...
8954909 Automated scalable verification for hardware designs at the register transfer level  
A system and methods are provided for verifying a hardware design for an electronic circuit. The method may include: providing a hardware design description for the electronic circuit; extracting...
8954903 Method of adding features to parameterized cells  
An electronic design automation (EDA) tool for adding a feature to a target parameterized cell (pcell) in an electronic circuit design includes a memory that stores the electronic circuit design,...
8949751 Methods and systems for wiring systems analysis and verification  
A method for visually verifying an implementation of a design is described. The method includes integrating logical design data, physical design data, and physical implementation data into a...
8949806 Compiling code for parallel processing architectures based on control flow  
A system comprises a plurality of computation units interconnected by an interconnection network. A method for configuring the system comprises forming subsets of instructions corresponding to...
8943448 System, method, and computer program product for providing a debugger using a common hardware database  
A hardware model database is identified which stores a graph-based common representation of a hardware design that includes hardware module nodes each representative of a unique module of the...
8930861 System, method, and computer program product for constructing a data flow and identifying a construct  
A system, method, and computer program product are provided for creating a hardware design. In use, one or more parameters are received, where at least one of the parameters corresponds to an...
8930868 Trace routing according to freeform sketches  
Methods and apparatuses for routing traces in a layout design, such as for example a layout design for an integrated circuit, are disclosed. In various implementations, a group of netlines within...
8924913 Schematic display of connectivity in an integrated circuit design  
A method of displaying a schematic diagram of an integrated circuit design is disclosed. The integrated circuit design includes a plurality of logic blocks and the schematic diagram may include a...
8924899 System and method for universal control of electronic devices  
A system and method for providing an integrated circuit that integrates with and controls a device wherein the integrated circuit design is developed based on a selection of characteristics of the...
8918748 M/A for performing automatic latency optimization on system designs for implementation on programmable hardware  
A method for performing latency optimization on a system design to be implemented on a target device includes inserting a variable latency indicator in the system design at a place where latency...
8914759 Abstract creation  
Systems and techniques for creating a circuit abstraction are described. During operation, an embodiment can identify a set of side loads based on a set of timing paths. According to one...
8910100 System and method for automatically reconfiguring chain of abutted devices in electronic circuit design  
The subject system and method are generally directed to the user-friendly insertion of at least one device, and optionally chains of devices, into at least one pre-existing chain of interconnected...
8898618 Interactive simplification of schematic diagram of integrated circuit design  
The interactive grouping tool offers the flexibility to simplify the schematic diagram of an integrated circuit (IC) design by grouping circuit elements that are not specified to be of interest...
8893069 Method of schematic driven layout creation  
A computer-implemented method is disclosed for layout pattern or layout constraint reuse by identifying sub-circuits with identical or similar schematic structure based on a topology comparison...
8893063 Area and power saving standard cell methodology  
A semiconductor integrated circuit including a circuit for adaptive power supply regulation and designed using a process that increases operating speed used for characterizing circuit operation at...
8887121 Developing programs for hardware implementation in a graphical specification and constraint language  
System and method for specifying and implementing programs. A graphical program is created in a graphical specification and constraint language that allows specification of a model of computation...
8881081 Method and apparatus for extracting delay parameter  
A delay parameter extracting apparatus includes a schematic composing unit, a layout composing unit, a verification unit, and a parameter extracting unit. The schematic composing unit is...
8881074 Device and method for refactoring hardware code  
A tool for rewriting hardware design hardware design language (HDL) code is arranged for receiving HDL code (2) expressing a hardware design of a digital circuit. The tool comprises means (4) for...
8869080 Automatically identifying resettable flops for digital designs  
An automated process identifies which components that retain their state need to be resettable in a design. The design is analyzed to identify components that retain their state and are...
8869081 Automating integrated circuit device library generation in model based metrology  
Various embodiments include computer-implemented methods, computer program products and systems for generating an integrated circuit (IC) library for use in a scatterometry analysis. In some...
8856701 Method of radio-frequency and microwave device generation  
The present disclosure relates to an apparatus and method to generate a device library, along with layout versus schematic (LVS) and parasitic extraction set-up files for connecting with official...
8843863 Apparatus, method and computer program for managing circuit optimization information  
A circuit optimization information management apparatus provides information to be used when a circuit parameter optimization program is executed to design an integrated circuit. The apparatus...
8843861 Third party component debugging for integrated circuit design  
The application is directed towards facilitating the debugging of suspected errors in a proprietary component when the proprietary component is incorporated into a larger electronic design....
8839161 Semiconductor device  
A semiconductor device includes a first semiconductor chip including a plurality of driver circuits and an output switching circuit coupled to the plurality of driver circuits. The device also...
8839163 Behavioral synthesis method, behavioral synthesis program and behavioral synthesis apparatus  
A behavioral synthesis method according to the present invention includes generating a scheduled CDFG based on behavioral description information, generating a lifetime for each variable based on...
8832612 Netlisting analog/mixed-signal schematics to VAMS  
A method is provided to convert an analog mixed-signal schematic design to a digital netlist: digital blocks within the schematic design are converted to digital netlist modules; analog blocks...
8826200 Alteration for wafer inspection  
Methods and systems for binning defects on a wafer are provided. One method includes identifying areas in a design for a layer of a device being fabricated on a wafer that are not critical to...
8813006 Accelerated characterization of circuits for within-die process variations  
In one embodiment of the invention, a method for electronic circuit design is disclosed. The method includes analyzing a netlist of a subcircuit to determine one or more input pins and one or more...
8813004 Analog fault visualization system and method for circuit designs  
An apparatus and method for visualizing faults in a circuit design includes simulating faults for a circuit design in a layout and a schematic, editing the layout and schematic to include the...
8813005 Debugging using tagged flip-flops  
Approaches for testing a module of a circuit design include tagging flip-flops in a netlist of the module with respective path names of the flip-flops from a hardware description language...
8813002 Circuit board design support program, design support method, and design support apparatus  
The embodiment is a non-transitory computer readable storage medium storing a design support program which causes a computer to generate design data for a circuit board in which elements are...
8806398 System and method for design, procurement and manufacturing collaboration  
A method for designing an electronic component includes receiving a device criteria (e.g., a parametric value, procurement value, etc.) from a designer, querying a database for devices...
8806405 Producing a net topology pattern as a constraint upon routing of signal paths in an integrated circuit design  
A method is provided to produce a constraint information for use to implement a routing process used to generate routing signal lines in an integrated circuit design comprising: producing a net...
8806404 System and method for reducing reconfiguration power usage  
A system and method for reducing power consumption in a reconfigurable integrated circuit. Some embodiments provide placement and routing programs that reduce the number of bits to be...