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7386812 |
Logic basic cell and logic basic cell arrangement
Logic basic cell and logic basic cell arrangement having a plurality of logic basic cells. A logic basic cell includes at least six data signal inputs, a first logic function block and a second...
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7386811 |
Method of selecting type of electronic part and electronic parts maker server
A user provides, in purchasing a predetermined electronic part used for a predetermined electronic circuit from an electronic parts maker, specifications for the predetermined electronic circuit to...
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7386826 |
Using redundant routing to reduce susceptibility to single event upsets in PLD designs
Methods of implementing designs in programmable logic devices (PLDs) to reduce susceptibility to single-event upsets (SEUs) by taking advantage of the fact that most PLD designs leave many routing...
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7383166 |
Verification of scheduling in the presence of loops using uninterpreted symbolic simulation
A method of checking correctness of scheduling of a circuit where a schedule for the circuit is obtained from a behavioral description. The method comprising extracting loop invariants to determine...
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7383092 |
Information processing apparatus and method, and program
In an information processing apparatus for displaying models representing shapes to assist design of a device, device identifying data, function identifying data, and core part identifying data are...
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7380224 |
Method and system for non-linear state based satisfiability
A computerized method and system for solving non-linear Boolean equations is disclosed comprising at least partially solving a Boolean function; developing at least one inference regarding said...
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7380219 |
Method and apparatus for implementing a circuit design for an integrated circuit
Method and apparatus for implementing a circuit design for an integrated circuit is described. In one example, a first version of the circuit design is processed ( 408 ) with at least one design...
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7380226 |
Systems, methods, and apparatus to perform logic synthesis preserving high-level specification
A method and an apparatus to perform logic synthesis preserving high-level specification and to check that a common specification (CS) of two circuits is correct have been disclosed. In one...
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7376939 |
System for architecture and resource specification and methods to compile the specification onto hardware
Electronic design automation tool specifies an architecture at a system level and its component (which include intellectual property (IP) cores like embedded processors, arithmetic logic units...
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7376916 |
Performing a constrained optimization to determine circuit parameters
One embodiment of the present invention provides a system which performs a constrained optimization of circuit parameters. During operation, the system selects two circuit parameters associated...
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7376914 |
Method and computer program product for designing power distribution system in a circuit
A method for designing a power distribution system including: receiving a cross section file that contains the layout of a PCB including a location of one or more power sinks and sources on the...
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7373616 |
Designing apparatus, and inspection apparatus for designing an integrated circuit having reduced leakage current
A method of designing a semiconductor integrated circuit, comprises: replacing a circuit element disposed in the semiconductor integrated circuit with a transistor having a high threshold value or...
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7373615 |
Method for optimization of logic circuits for routability
Routability (or wiring congestion) in a VLSI chip is becoming increasingly important as chip complexity increases. Congestion has a significant impact on performance, yield, and chip area. The...
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7370300 |
Systems and methods of simulating signal coupling
Systems and methods for simulating signal coupling in electronic devices are disclosed. In an exemplary implementation a computer program product executes a computer process to simulate a victim...
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7370303 |
Method for determining the arrangement of contact areas on the active top side of a semiconductor chip
In the case of a method according to the invention for determining the arrangement of contact areas on the active top side of a semiconductor chip arranged in or on a housing, firstly semiconductor...
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7370291 |
Method for mapping logic design memory into physical memory devices of a programmable logic device
A method is provided for mapping logic design memory into physical memory devices of a programmable logic device. User constraints and physical constraints may be taken into account in generating...
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7370312 |
System and method for controlling simulation of hardware in a hardware development process
A system and method for simulating a digital circuit uses scheduling information for Term Rewriting System (TRS) rules to limit the computation of simulation values to only those value used by the...
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7366648 |
Electronic circuit analyzing apparatus, electronic circuit analyzing method, and electronic circuit analyzing program
The present invention provides an electronic circuit analyzing apparatus for evaluating the reliability value of an analysis result, an electronic circuit analyzing method, and an electronic...
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7366647 |
Bus performance evaluation method for algorithm description
The LSI design and development in manufacture is actualized by algorithm design, architecture design, actual hardware and software design, and verification. Herein, the architecture design contains...
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7366997 |
Methods and apparatuses for thermal analysis based circuit design
Methods and apparatuses for circuit design to reduce power usage, such as reducing temperature dependent power usage, and/or to improve timing, such as reducing temperature dependent delay or...
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7366629 |
High frequency module board device
The present invention relates to a high frequency module board device having a high frequency transmitting and receiving circuit for modulating and demodulating a high frequency signal. The high...
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7363596 |
Methods for storing and naming static library cells for lookup by logic synthesis and the like
A method is provided for creating and using a library of known logic elements for facilitating the design of equivalent FPGA, structured ASIC, or other integrated circuits. Each cell in the library...
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7363597 |
System for placing elements of semiconductor integrated circuit, method of placing elements thereon, and program for placing elements
An element placement system including a placement and routing library that stores element information about logical elements to be placed, placement information containing region information of...
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7363097 |
Automatic design apparatus, automatic design method, and automatic design program of digital circuit
An automatic digital-circuit design apparatus receives a control target model written in a design description language, generates a control target model represented by a finite state machine model,...
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7363595 |
Method and apparatus for analog compensation of driver output signal slew rate against device impedance variation
Method and apparatus for analog compensation of driver output signal slew rate against device impedance variation. The method includes a signal termination device coupled to a driver output pad. In...
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7360189 |
Method and apparatus for enabling waveform display in a system design model
A method for generating a waveform display includes retrieving signal data associated with a node in a system design model from a system level electronic design automation tool. A value change dump...
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7360196 |
Technology mapping for programming and design of a programmable logic device by equating logic expressions
A programmable logic device (“PLD”) architecture and a user logic design are modeled logically to find an efficient programming solution for the user logic design on the PLD architecture. The...
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7360177 |
Method and arrangement providing for implementation granularity using implementation sets
A design hierarchy based on an implementation set abstraction of a user design for an integrated circuit design includes a plurality of nodes and a definition for each of the nodes in the plurality...
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7360178 |
Mixed-signal functions using R-cells
A method for producing a chip is disclosed. A first step of the method may include fabricating the chip only up to and including a first metal layer such that a core region of the chip has an array...
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7360005 |
Software programmable multiple function integrated circuit module
An electrically programmable multiple selectable function integrated circuit module has a plurality of optionally selectable function circuits, which receive and manipulate a plurality of input...
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7360182 |
Method and system for reducing delay noise in an integrated circuit
A method and a system for reducing delay noise in an integrated circuit (IC) includes generating delay information for each net, and each device of the IC. Each net has a ground capacitance, a...
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7360192 |
Macrocell, integrated circuit device, and electronic instrument
A macrocell including a physical layer circuit includes a transmitter circuit and a receiver circuit connected with pads for differential signals DP and DM. The transmitter circuit includes a...
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7356782 |
Voltage reference signal circuit layout inside multi-layered substrate
A multi-layered substrate has a voltage reference signal circuit layout therein. A major change in the design of the multi-layered substrate is the moving of a reference signal trace from a signal...
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7356797 |
Logic transformation and gate placement to avoid routing congestion
A novel logic design method for avoiding wiring congestion. According to the novel logic design method, an original gate having multiple inputs coming from different directions and having multiple...
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7356794 |
System and method for designing a delayer emulation model
A system for designing a delayer emulation model ( 1 ) includes a delayer emulation model generating apparatus ( 2 ). The delay emulation model generating apparatus includes: a delay circuit...
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7356781 |
Method for modifying design data for the production of a component and corresponding units
A method is described in which design data are prescribed which stipulate a geometrical design for a component. The design is used to produce an altered geometrical design, for example through...
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7353476 |
System, method and computer program product for designing connecting terminals of semiconductor device
A system for designing connecting terminals of a semiconductor device, having a power supply cell arranging unit configured to arrange power supply cells at some of I/O slots formed in a...
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7353467 |
Method and system for facilitating electronic circuit and chip design using remotely located resources
A multi-faceted portal site acts as a server in the context of an n-tier client/server network, and connects electronic designers and design teams to design and verification tool and service...
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7353489 |
Determining hardware parameters specified when configurable IP is synthesized
An attribute of a hardware feature to be customized in a soft core is parameterized so that a value received from a user can be used to generate a description of a circuit containing the customized...
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7353468 |
Secure exchange of information in electronic design automation
Information related to electronic design automation may be exchanged in a secure manner. Information deemed sensitive and otherwise worthy of protection may be secured by methods such as...
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7350161 |
System design tools
A system design method for designing bus-based systems is described. The method includes automatically defining an allowed set of parameter values for the system components concerned.
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7350160 |
Method of displaying a guard ring within an integrated circuit
The invention displays a guard ring within an integrated circuit design by determining positions of the logic devices within the integrated circuit design, incorporating the guard ring into the...
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7350180 |
Search algorithm for inheriting clock contexts in hardware description language translation tools
A search algorithm supports inherited clock contexts within functions written in a Hardware Description Language. For each function, a parser generates a corresponding node tree. Each clock context...
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7350163 |
System and method for automatically calculating parameters of an MOSFET
A system for automatically calculating parameters of an MOSFET is disclosed. The parameter calculating system runs in a computer. The parameter calculating system is used for receiving values...
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7350162 |
Structure analytic program
A structure analytic program is used to direct a computer to perform a process of analyzing the structure of a HDL data circuit, and efficiently analyzes a design product relating to a circuit...
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7350164 |
Optimization and design method for configurable analog circuits and devices
Optimization design method for configurable analog circuits and devices resulting from same. An implementation fabric for a given application domain can be accurately pre-characterized in terms of...
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7346864 |
Logic design development tool and method
A logic design development tool including a converting unit configured to convert a plurality of different circuit design languages into a common intermediate format, and an executing unit...
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7346483 |
Dynamic FIFO for simulation
To perform a simulation, a design can be divided into “blocks” described by models. To ensure that data is efficiently transferred from an source model to a destination model, a dynamic...
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7346884 |
Integrated circuit (IC) having IC floorplan silhouette-like power supply net, and sea of supply (SoS) electronic design automation (EDA) tool for designing same
An integrated circuit (IC) having an IC floorplan silhouette-like power supply net, and a computer executable Sea of Supply (SoS) Electronic Design Automation (EDA) tool for automatically designing...
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7346866 |
Method and apparatus to generate circuit energy models with clock gating
A method, a computer program, and an apparatus are provided for generating circuit energy models for a macro using clock gating inputs. Circuit energy models are used to estimate system power...
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