Matches 51 - 100 out of 120 < 1 2 3 >
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6006349 High speed pattern generating method and high speed pattern generator using the method  
A high speed pattern generating method by which a pattern signal having a speed higher than conventional speed can be generated using a sequence control part operating at a speed equivalent to a...
5982681 Reconfigurable built-in self test circuit  
A reconfigurable built-in self test circuit for enabling the debugging of an embedded device. In one embodiment, the write data path from the built-in self test module to the embedded device...
5802073 Built-in self test functional system block for UTOPIA interface  
An apparatus and method for providing a built-in self-test functional system block (BIST FSB) for self-testing a network interface integrated circuit having a Universal Test & Operations...
5790562 Circuit with built-in test and method thereof  
A circuit with a built-in self test, comprising: a circuit to be tested; a generating circuit coupled to the circuit to be tested, wherein the generating circuit generates (i) a series of input...
5781562 Method, system and apparatus for efficiently generating binary numbers for testing storage devices  
An apparatus generates patterns useful for testing storage devices using a modified form of a shift register. A control input and two bits are added and the least significant bit of the result is...
5710780 Digital circuitry with improved parallel signature analysis capability  
Digital circuitry (11) in a data processing system (10) includes parallel signature analysis circuitry (49, 49A) having a sampling feature (51, 53, 89) which permits sampling any given signal on...
5673273 Clock controller for embedded test  
An embedded electronic system includes a clock controller embedded in the same matrix material as a subsystem under test and the measurement devices needed to test it. This embedded clock...
5668947 Microprocessor self-test apparatus and method  
A method and apparatus for testing a digital integrated circuit (IC) for faults wherein the IC includes a memory, a microprocessor, an operand register, and a random data generator which is...
5663991 Integrated circuit chip having built-in self measurement for PLL jitter and phase error  
A built-in system and method is provided that measures Phase Lock Loop (PLL) output clock error. An edge sorting circuit is utilized to measure jitter between corresponding transition edges of a...
5657330 Single-chip microprocessor with built-in self-testing function  
A single-chip microprocessor with a self-testing function for quickly detecting internal errors or defects while mounted to a circuit board without adversely affecting any external electronic...
5638382 Built-in self test function for a processor including intermediate test results  
A processor with a built in self test function that provides intermediate self test results is disclosed including at least one logic array and a test circuit for each logic array coupled to...
5619512 Integrated circuit having self-testing function  
A semiconductor device capable of inspecting itself efficiently. Output data from a circuit under test is supplied to a testing data-generating circuit and a non-periodic function transformation is...
5612963 Hybrid pattern self-testing of integrated circuits  
A hybrid random pattern self-test approach is employed in an on-chip fashion to provide desired test signals to circuits on the chip. A simplified weighting circuit is shown to be effective even...
5574732 Test pattern generator  
A test pattern generator accompanying digital integrated circuits for successively generating a plurality of test patterns for a built-in self test. A plurality of shift registers are serially...
5572669 Bus cycle signature system  
A bus cycle signature system for testing CPU based boards comprising a data shift register and a general shift register which receive test signals from the board under test, the signals received by...
5515383 Built-in self-test system and method for self test of an integrated circuit  
A built-in self-test system and method for use in testing an integrated circuit. An integrated circuit (200) includes a self-test generator (210) that produces pseudo-random test vectors, each...
5513190 Built-in self-test tri-state architecture  
A circuit architecture for driving a tri-state bus in a logic circuit that uses a built-in self-test (BIST) mechanism. The architecture includes tri-state drivers which have circuitry to inhibit...
5483175 Method for circuits connection for wafer level burning and testing of individual dies on semiconductor wafer  
Integrated circuit devices on a wafer are tested by the use of test circuit on the integrated circuit devices which is connected by means of a grid. The grid is used to enable the test circuitry,...
5469445 Transparent testing of integrated circuits  
To carry out a transparent test of integrated circuits, all of the state registers and input/output registers that determine the applications' execution context are included into circular scan...
5465053 Electronic drive circuits for active matrix devices, and a method of self-testing and programming such circuits  
A shift register or other electronic drive circuit, for an LCD or other active matrix device includes a series of circuit blocks each having redundancy in the form of parallel circuit paths. When...
5457400 Semiconductor array having built-in test circuit for wafer level testing  
A test circuit is provided for an integrated circuit device, whereby an oscillator is provided on-chip and is activated by a test circuit. The test circuit provides an ability to test the devices...
5446683 Methods and apparatus for generating pseudo-random binary patterns  
Method and apparatus for generating a pseudo-random binary pattern having a variable characteristic polynomial. The pseudo-random binary pattern is formed as a plurality of serial bit streams, with...
5442642 Test signal generator on substrate to test  
A test system is added to a substrate and a test mode of operation is added to the timing and control functions of a system on the substrate. When a multifunctional system on the substrate is...
5425035 Enhanced data analyzer for use in bist circuitry  
A data analyzer for use in BIST circuitry has been provided. The data analyzer allows both comparison analysis and signature analysis to be performed on a circuit response data stream. The data...
5331581 Artificial random-number pattern generating circuit  
An artificial random-number pattern generating circuit has a plurality of flip-flops each having a set signal input terminal and a clock signal input terminal; a plurality of selectors each of...
5309447 Space compression technique for pseudo-exhaustive self-testing of digital electronic circuits  
Compaction of the response signals produced by separate sets of sub-circuits (12 i ) within a digital circuit (10) under test is accomplished by first analyzing each response signal produced by a...
5260946 Self-testing and self-configuration in an integrated circuit  
Integration at the chip level is supported by an architecture for self-testing and self-configuration of an integrated circuit. Self-testing requires the generation of test signals based on primary...
5239262 Integrated circuit chip with built-in self-test for logic fault detection  
An integrated circuit chip with built-in self-test for logic fault detection is described which comprises a number of combinational logic circuits and a number of shift register latches. The...
5224103 Processing device and method of programming such a processing device  
A programmable processing device has a built-in a program memory (14) for storage of data including program instructions for controlling a functional unit (20) of the device. The device also...
5199035 Logic circuit for reliability and yield enhancement  
A logic circuit for testing the reliability of an ASIC includes an array circuit having a plurality of matrix arrays each having a plurality of inputs. The plurality of matrix arrays being...
5184067 Signature compression circuit  
A signature compression circuit is employed to test a logic circuit. The signature compression circuit comprises a linear feedback shift register (LFSR) that receives test data from the logic...
5173906 Built-in self test for integrated circuits  
A built-in, i.e., on-chip, self-test system for a VLSI logic or memory module. A deterministic data pattern generator is provided on the VLSI chip, and operates to test a chip module and provide a...
5150366 Reduced delay circuits for shift register latch scan strings  
Delays in critical signal paths are eliminated in circuits employing level sensitive scan design methods for implementing self-test operations. In particular, scan strings associataed with primary...
5144230 Method and system for testing integrated circuits by cycle stealing  
A system for performing a self test on a circuit without interrupting its normal function. Several embodiments of a self-test system (10, 60, 80, 100, 120) are disclosed, each of which include a...
5121393 System for testing a microprocessor  
A system for testing microprocessors is formed as an integral part of the chip. The microprocessor includes an instruction register that is converted into a counter during a test sequence. The...
5051997 Semiconductor integrated circuit with self-test function  
Apparatus is disclosed for a self-test function internal to a semiconductor integrated circuit. The invention includes an internal random number generator for generating test data for use by a...
5038349 Method for reducing masking of errors when using a grid-based, "cross-check" test structure  
Several methods for reducing the occurrence of masking of errors when using "Cross-Check" integrated circuit testing arrays and data compression devices such as multiple input shift registers are...
4991175 Signature analysis  
Digital signal processing apparatus which can be tested by signature analysis is arranged so that a predetermined number of its ROM locations have stored therein pre-selected values whereby the...
4975640 Method for operating a linear feedback shift register as a serial shift register with a crosscheck grid structure  
A method for operating a multiple input linear feedback shift register (LFSR) as a conventional shift register so that input multiplexers can be eliminated on each parallel input when associated...
4959832 Parallel pseudorandom pattern generator with varying phase shift  
Phase enhancement means are employed in conjunction with linear feedback shift registers to generate sequences of binary pattern vectors which are much more structurally independent of one another...
4945536 Method and apparatus for testing digital systems  
In methods and apparatus for testing a digital system, system terminals used for coupling input signals into the system and output signals out of the system during normal operation of the system...
4929889 Data path chip test architecture  
A system and method for testing nodes, or test points, of an integrated circuit are presented. The invention includes a test/load bus which is used to sequentially load test data and other data...
4847839 Digital registers with serial accessed mode control bit  
A reconfigurable digital register that can be serially loaded has an additional bit associated with the register which holds information indicative of a mode of operation of the register. The mode...
4817093 Method of partitioning, testing and diagnosing a VLSI multichip package and associated structure  
A self-contained method and structure for partitioning, testing and diagnosing a multi-chip packaging structure. The method comprises the steps of electronically inhibiting all chips in the...
4783747 Control device for an automatic vending machine  
Control apparatus and method is disclosed for a processor controlled vending machine. The control device includes a trigger signal generating circuit for periodically generating a trigger signal....
4764926 Integrated circuits  
An integrated circuit having a built-in self test facility, the integrated circuit being partitioned into a number of sub-circuits each of which comprises a combinatorial logic circuit and a...
4713605 Linear feedback shift register for circuit design technology validation  
An apparatus and process employing an integrated circuit device technology within a linear feedback shift register using a cyclic redundancy check code scheme for validating the device technology...
4701920 Built-in self-test system for VLSI circuit chips  
An improved built-in self-test system fabricated on an LSI circuit chip for performing dynamic tests of main logic function operation. The built-in self-test system includes a control register...
4688222 Built-in parallel testing circuit for use in a processor  
The invention concerns arrangements and methods for error testing and diagnosing processors (e.g., 9; FIG. 2), whose logic subsystems (20) are interconnected by storage elements (23, 24) which in...
4641306 Circuit arrangement for testing a digital circuit  
Circuit arrangement for dynamic real time testing of a synchronous digital circuit having a clock pulse input, a stimulus input and a circuit node at which a digital test signal is produced after a...
Matches 51 - 100 out of 120 < 1 2 3 >