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7131023 Programmable clock management component reconfiguration upon receipt of one or more control signals to be able to process one or more frequency signals  
One or more programmable clock management components of an apparatus in one example are coupled with a backplane. The one or more programmable clock management components comprise a reconfigurable...
7120738 Storage system having data format conversion function  
A storage system to be connected to a large-scale computer includes a plurality of host adaptors connected to a host device, a plurality of storage device for storing data from the host device, a...
6922342 Computer system employing redundant power distribution  
A computer system employing redundant power distribution. A computer system includes power distribution boards arranged to distribute power such that the computer system may continue to operate if...
6742137 Object oriented fault tolerance  
An electronic storage system, such as a file system, may include a storage access routine to store data objects. Data objects stored in the system have an entry in an object index that may be...
6581128 Storage system  
A storage system to be connected to a large-scale computer includes a plurality of host adaptors connected to a host device, a plurality of storage device for storing data from the host device, a...
6578100 Storage system having plural buses  
A storage system to be connected to a large-scale computer includes a plurality of first logical units connected to a host device, a plurality of second logical units connected to a storage device,...
5974565 Composite computer system  
A composite computer system which includes a plurality of processors connected to each other by a communication apparatus, an operation supervisory unit for recording operating conditions of the...
5828243 Method for detecting clock failure and switching to backup clock  
A clock failure detection circuit which monitors a clock by comparing the clock to at least one delayed version of itself is provided. The original clock and the delayed version will be offset,...
5636226 Fault sensing circuit and method  
A fault sensing circuit for detecting the state of at least one latch controlled by at least one control signal is provided. The circuit comprises an additional latch also controlled by the same...
5588111 Fault-tolerant computer system having switchable I/O bus interface modules  
A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory modules in the address space of the CPUs...
5539345 Phase detector apparatus  
A fault tolerant computer according to the invention includes a processing unit including a first processor coupled to a first system bus to provide data to a cache and a memory, and a second...
5473451 Active matrix liquid crystal displays having diodes connected between second transistors and second data buses  
An active matrix for liquid crystal displays having a plurality of picture elements, a plurality of address buses, and a plurality of data buses orthogonal to the address buses. Each picture...
5450020 Self-timed digital circuits using linking circuits  
Testing digital circuits presents problems because in operation not every "stuck at" fault is detected. The present invention provides linking circuits (12, 13, 14) and functional logic circuits...
5448720 Information processing system for obtaining status data of a simplex system by a standby system of a duplex system  
An information processing system includes a simplex system and a duplex system in which at least two data transmitting systems are provided each capable of being an act system or a standby system....
5440750 Information processing system capable of executing a single instruction for watching and waiting for writing of information for synchronization by another processor  
Each processor of a multiprocessor system which shares a main storage has a execution circuit for executing a compare and watch instruction provided for watching information for synchronization...
5387769 Local area network between an elevator system building controller, group controller and car controller, using redundant communication links  
A LAN elevator network includes (a) a pair of redundant car buses for exchanging signals with car control system elements, (b) a pair of redundant group buses for exchanging signals with the...
5382950 Device for implementing an interrupt distribution in a multi-computer system  
In an m-of-n computer system, timer signals (TA, TB, TC) are fed as interrupt requests (IA, IB, IC) to modules (BGA, BGB, BGC) allocated to the individual computers and from there to the majority...
5367668 Method and apparatus for fault-detection  
An improved method for operating a digital data processing apparatus to provide for fault-tolerant actuation of a functional unit in response to an actuation request includes the steps of:...
5357626 Processing system for providing an in circuit emulator with processor internal state  
A processing system is configured for providing an external in circuit emulator with an internal execution state resulting from the execution by a first processor of an internal instruction stored...
5357616 On-line computer system capable of safely and simply processing a message signal  
For processing an input message signal into a processed message signal, an on-line computer system comprises a saving buffer for memorizing as a memorized message signal a received message signal...
5357518 Network interface  
A network interface, in particular for motor vehicles having at least two computers and having at least two bus lines ("0") includes by a monitoring circuit (100), which cooperates with an...
5353413 Method and apparatus for christening a trainline monitor system  
A method for initializing a communication network in a train including a plurality of cars, the network comprising a train bus, a train bus master on one of the cars and a train bus slave on each...
5291489 Interprocessor switching network  
A message transport network (10) is provided for high speed switching between processing elements (72, 80). Clusters of low speed processing elements (72) may be connected to the message transport...
5287492 Method for modifying a fault-tolerant processing system  
A method for modifying a fault-tolerant processing system (FTS) including a pair of partner sets of two processors ( / ; PB1/PB2) operating in microsynchronization at a first or low processing...
5276823 Fault-tolerant computer system with redesignation of peripheral processor  
A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory modules in the address space of the CPUs...
5220668 Digital data processor with maintenance and diagnostic system  
A state machine in a digital data processor in a UNIX-type operating system environment has state managers associated with the functional units of the data processor for indicating the state of the...
5210871 Interprocessor communication for a fault-tolerant, mixed redundancy distributed information processing system  
A method for resolving access contentions by a plurality of processing sites having the same or different redundancies to a shared communications system wherein the start of the access contention...
5193175 Fault-tolerant computer with three independently clocked processors asynchronously executing identical code that are synchronized upon each voted access to two memory modules  
A computer system in a fault-tolerant configuration employs three identical CPUs executing the same instruction stream, with two identical, self-checking memory modules storing duplicates of the...
5159273 Tri-state bus driver to support reconfigurable fault tolerant logic  
A three-state driver circuit including a first gating circuit responsive to a first enable signal for selectively gating an input signal to provide a first gated signal at an internal node, a...
5151969 Self-repairing trellis networks  
A self-repairing trellis network includes a plurality of stages (11, 12 and 13) wherein a first set of N processing elements and a second set of M processing elements are situated. The N processing...
5140197 Filtered detection plus propagated timing window for stabilizing the switch from crystal to ring oscillator at power-down  
An adjunct chip, usable as a peripheral to a microprocessor, which detects power failure, and puts the microprocessor into a known state upon power down. In order to reliably and stably put the...
5072368 Immediate duplication of I/O requests on a record by record basis by a computer operating system  
A method for ensuring data integrity in a computer system having a primary logical device and one or more alternate logical devices. These logical devices have substantially identical data stored...
5029093 Dual redundant electronic postage meter  
A dual redundant electronic postage meter and associated method is provided for increasing the reliability of meter operation, comprising a first meter module including triple redundant memory...
4964126 Fault tolerant signal processing machine and method  
The machine includes a plurality of processors each performing identical linear processing operations on its input signal. At least one checksum processor is provided to perform the same linear...
4916695 Stored program controlled real time system including three substantially identical processors  
A stored program controlled real time system includes a high-speed executive processor (29) which receives real time signals coming from an equipment (2) and which coacts parallel-synchronously...
4907232 Fault-tolerant parallel processing system  
A fault tolerant processing system which includes a plurality of at least (3f+1) fault containment regions each including a plurality of processors and a network element connected to each of the...
4890224 Method and apparatus for fault tolerant communication within a computing system  
A method and apparatus for fault tolerant communication among a plurality of I/O controllers and a communication controller using an I/O bus having byte-parallel and bit-serial data lines. Each...
4885739 Interprocessor switching network  
A message transport network (10) is provided for high speed switching between processing elements (72, 80). Clusters of low speed processing elements (72) may be connected to the message transport...
4856000 Duplicated circuit arrangement for fast transmission and repairability  
Duplicated circuit arrangement comprising a main processor (30) and its P bit data bus (44), and two identical redundant devices (21:22), each device is comprised of a processing element (23;35)...
4851827 Matrix display devices with redundant driving transistor arrangement for improved fault tolerance  
In a matrix display device, such as an LCD-TV, supply of data signals to each one of an array of display elements is controlled by respective switching devices circuits in response to applied...
4827478 Data integrity checking with fault tolerance  
Fault tolerant apparatus for generating error correcting code and, simultaneous therewith, checking the correctness of the generation, for blocks of data with which the error correcting code is...
4804515 Distributed microprocessor based sensor signal processing system for a complex process  
Signals from redundant sensors located throughout a pressurized water reactor (PWR) nuclear power plant are processed in four independent channel sets each of which includes a plurality of...
4799159 Digital automatic flight control system with disparate function monitoring  
A channel of an automatic flight control system utilizes dual identical digital processors. Active task modules and monitor modules therefor are included in the processors. The active task modules...
4787041 Data control system for digital automatic flight control system channel with plural dissimilar data processing  
A direct memory access (DMA) system with a single bus architecture for controlling data transfers and storage between plural digital processors and plural Input/Output devices. Limiters are...
4783733 Fault tolerant communications controller system  
The present invention relates to a system for controlling multiple communications lines, so that a computer system can operate with a single component failure. Two processors are used to control...
4775930 Electronic key check for ensuring proper cradles insertion by respective processing board  
Keying check apparatus is provided for a control system including at least two microprocessor cradles, with each microprocessor cradle having a unique control program, and which keying check...
4774709 Symmetrization for redundant channels  
A plurality of redundant channels in a system each contain a global image of all the configuration data bases in each of the channels in the system. Each global image is updated periodically from...
4771427 Equalization in redundant channels  
A miscomparison between a channel's configuration data base and a voted system configuration data base in a redundant channel system having identically operating, frame synchronous channels...
4752904 Efficient structure for computing mixed-radix projections from residue number systems  
Apparatus for providing mixed-radix projection data from residue number systems data, while providing error detection and correction. A single array of ROMs and lacthes is provided, comprising the...
4745542 Fail-safe control circuit  
A fail-safe control circuit which requires that all control units produce control signals to operate a controlled device. The control units receive a feedback signal used for comparing with the...
Matches 1 - 50 out of 79 1 2 >