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7620884 |
Memory checking device and method for checking a memory
A memory checking device for cells arranged in memory rows and columns, wherein, in a state of integrity, the memory has parity values for two memory rows or two columns that differ from each other...
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7617432 |
Hierarchical design and layout optimizations for high throughput parallel LDPC decoders
High throughput parallel LDPC decoders are designed and implemented using hierarchical design and layout optimization. In a first level of hierarchy, the node processors are grouped on the LDPC...
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7607063 |
Decoding method and device for decoding linear code
The present invention relates to a decoding method and a decoder, a program, a recording-and-reproducing apparatus and a method, and a reproducing apparatus and a method that are suitable for...
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7565597 |
Fast parity scan of memory arrays
A novel method for scanning bit parity in a memory array, and a circuit for implementing it, are disclosed. In a memory array that has one or more rows of memory cells, the method for checking data...
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7551690 |
Transmitter and receiver
A transmitter ( 1 ) converts an input signal from a microphone ( 2 ) into a plural-bit digital signal by means of an A/D converter ( 4 ) at predetermined time intervals. An encoder ( 6 ) divides...
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7536629 |
Construction of LDPC (Low Density Parity Check) codes using GRS (Generalized Reed-Solomon) code
Construction of LDPC (Low Density Parity Check) codes using GRS (Generalized Reed-Solomon) code. A novel approach is presented by which a GRS code may be employed to generate a wide variety of...
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7523375 |
Set of irregular LDPC codes with random structure and low encoding complexity
A set of irregular LDPC (Low Density Parity Check) codes having a pseudo-random structure and low encoding complexity. A block-cyclic LDPC code has an irregular row or an irregular column weight...
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7509525 |
Technique for correcting multiple storage device failures in a storage array
A method for storing data for correction of multiple data storage failures in a storage array is presented. The storage array is organized as a plurality of sub-arrays, each sub-array including a...
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7489744 |
Turbo decoding method and apparatus for wireless communications
In a communication system 10, a method and apparatus provide for decoding a sequence of turbo encoded data symbols. The channel nodes R x , R y and R z are updated based on a received channel...
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7447948 |
ECC coding for high speed implementation
Methods and apparatus for performing error correction code (ECC) coding techniques for high-speed implementations. The ECC code word is structured to facilitate a very fast single-error-detect...
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7434138 |
Structured interleaving/de-interleaving scheme for product code encoders/decorders
A structured interleaving/de-interleaving scheme enables efficient implementation of encoding/decoding based on two-dimensional product codes (2D PC). In one embodiment, an encoder has an...
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7428693 |
Error-detecting encoding and decoding apparatus and dividing apparatus
Disclosed are an error-detecting encoding apparatus for creating parity bits by error-detecting encoding processing, appending the parity bits to an input data string and encoding the data string,...
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7426683 |
Semiconductor memory device equipped with error correction circuit
The objective of the invention is to provide a type of semiconductor memory device equipped with an error correction circuit 200 characterized by the fact that it can perform correction of errors...
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7395495 |
Method and apparatus for decoding forward error correction codes
A method for decoding information received at a network device may include a first decoding process which applies a first algorithm iteratively until a stopping criterion is reached and a second...
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7395483 |
Method and apparatus for performing error-detection and error-correction
One embodiment of the present invention provides a system that facilitates detecting and correcting errors. The system operates by receiving a data packet comprised of p words on a communication...
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7376885 |
Memory efficient LDPC decoding methods and apparatus
Methods and apparatus for implementing memory efficient LDPC decodes are described. In accordance with the invention message information is stored in a compressed state for check node processing...
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7350130 |
Decoding LDPC (low density parity check) code with new operators based on min* operator
Decoding LDPC (Low Density Parity Check) code with new operators based on min* operator. New approximate operators are provided that may be employed to assist in calculating one or a minimum value...
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7340003 |
Multi-mode iterative detector
A storage system for storing data on a storage medium includes an encoder, a linear block encoder, a write circuit, a read circuit, a channel decoder, and a soft linear block code decoder. In a...
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7334180 |
Optical encoding method
A method for generating parity codes of a data sector having data information and main data. The main data is scrambled to generating outer-code parity. The main data is scrambled to generating...
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7328305 |
Dynamic parity distribution technique
A dynamic parity distribution system and technique distributes parity across disks of an array. The dynamic parity distribution system includes a storage operating system that integrates a file...
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7266751 |
Data recording method and data recording apparatus
In a data recording method and a data recording apparatus relating to the present invention, ECC blocks using 36 product codes are recorded on 12 tracks through scanning operations performed three...
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7260763 |
Algebraic low-density parity check code design for variable block sizes and code rates
A higher code rate Low-Density Parity Check (LDPC) matrix may be designed by concatenating additional matrices to a π-rotation parity check matrix. The concatenated matrix may be selected such...
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7243296 |
Method of forward error correction
An iterative method of correcting errors in a data block. Bad bytes are first identified using information derived from an 8B/10B decoding of the data block. Within each identified bad byte,...
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7224296 |
Error-correcting binary run-length-limited product-code
A signal includes a runlength limited (RLL) encoded binary d,k channel bitstream, parameter d defining a minimum number and k defining a maximum number of zeroes between any two ones of the...
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7188281 |
Error correction coding apparatus and method
An error correction coding apparatus includes a parity check matrix generation unit which generates a parity check matrix having a number of elements having a value of 1 in each row thereof, having...
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7155634 |
Process for generating and reconstructing variable number of parity for byte streams independent of host block size
A method, system and program for generating parity in a data storage system are provided. The invention comprises organizing an incoming data block into a specified number of data stripes and...
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7143336 |
Decoding parallel concatenated parity-check code
A decoding system and method for decoding parallel concatenated parity-check code defines a parity check matrix (e.g., a sparse parity check matrix) for the parallel concatenated parity check code....
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7134066 |
Generalized parity stripe data storage array
The Hamming distance of an array of storage devices is increased by generating a parity check matrix based on column equations that are formed using an orthogonal parity code and includes a...
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7127659 |
Memory efficient LDPC decoding methods and apparatus
Methods and apparatus for implementing memory efficient LDPC decodes are described. In accordance with the invention message information is stored in a compressed state for check node processing...
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7103818 |
Transforming generalized parity check matrices for error-correcting codes
A method transforms a generalized parity check matrix representing a linear block binary code. First, an input generalized parity check matrix is defined for the linear block binary code. Auxiliary...
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7080278 |
Technique for correcting multiple storage device failures in a storage array
A technique efficiently corrects multiple storage device failures in a storage array. The storage array comprises a plurality of concatenated sub-arrays, wherein each sub-array includes a set of...
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7062699 |
Method and apparatus for recording data on recording medium and recording medium including recorded data
Provided is a method of recording data on an optical recording medium having a plurality of addressable unit areas. 62 sync frames, each having a sync code and data, can be recorded in each of the...
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7047476 |
Code error corrector
A code error corrector that enables high speed reproduction of DVD data with a high error correction capability. The data read from the DVD is stored in a DRAM. A PI correction circuit, which...
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7012974 |
High rate product code decoding for partial response channel
The present invention is directed to a detector for a high-density magnetic recording channel and other partial response channels. The present invention presents a method for decoding a high rate...
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7000168 |
Method and coding apparatus using low density parity check codes for data storage or data transmission
A method of generating low density parity check codes for encoding data includes constructing a parity check matrix H from balanced incomplete block design (BIBD) in which a plurality B-sets which...
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6938196 |
Node processors for use in parity check decoders
Techniques for implementing message passing decoders, e.g., LDPC decoders, are described. To facilitate hardware implementation messages are quantized to integer multiples of ½ ln2. Messages are...
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6857097 |
Evaluating and optimizing error-correcting codes using a renormalization group transformation
A method evaluates an error-correcting code for a data block of a finite size. An error-correcting code is defined by a parity check matrix, wherein columns represent variable bits and rows...
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6842872 |
Evaluating and optimizing error-correcting codes using projective analysis
A method evaluates and optimizes an error-correcting code to be transmitted through a noisy channel and to be decoded by an iterative message-passing decoder. The error-correcting code is...
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6789227 |
System and method for generating low density parity check codes using bit-filling
A computer-implemented system and method is for generating low-density parity check (LDPC) codes. One aspect of the invention includes a method for generating high rate LDPC codes that first...
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6697996 |
Multi-dimensional packet recovery system and method
Multi-dimensional packet recovery systems and methods that permit recovery of lost packets and packets containing transmission errors that are transmitted over a network. The packet recovery...
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6681363 |
Data receiver, data transmission system, and data transmitting method therefor
A data transmission system which allows received data to be decoded and reproduced in real time by simple decoding and which allows signal reproduction and recording by highly reliable...
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6675349 |
Error correction coding of data blocks with included parity bits
Advantage is taken of the presence of ordinary parity check bits occurring in the data flow in a computer or other information-handling system to improve error correction capability while at the...
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6671833 |
Forward error correction and framing protocol
A serializer and deserializer are disclosed that provide an efficient scheme for both forward error correction and symbol alignment and frame alignment by the deserializer. In particular, the...
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6606718 |
Product code with interleaving to enhance error detection and correction
A product code and interleaving/de-interleaving process are designed to work in combination to improve the coding gain of the product code. Such improvement of coding gain is based on an error...
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6581185 |
Apparatus and method for reconstructing data using cross-parity stripes on storage media
An apparatus and method for reconstructing missing data using cross-parity stripes on a storage medium is provided. The apparatus and method may operate on data symbols having sizes greater than a...
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6480975 |
ECC mechanism for set associative cache array
A method of checking for errors in a set associative cache array, by comparing a requested value to values loaded in the cache blocks and determining, concurrently with this comparison, whether the...
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6460162 |
Product code iterative decoding
A method of soft input to soft output decoding of a word s of a block linear code of dimension k and length n received from a transmission channel is provided, including generating a list of firm...
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6446238 |
System and method for updating microcode stored in a non-volatile memory
A method of verifying the integrity of a file transferred as a plurality of sectors. During a first pass transfer of a sectored file, first pass sector CRC codes are generated for each sector and...
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6434719 |
Error correction using reliability values for data matrix
Erroneous column(s) in the matrix of data obtained from a transmission channel are first determined on the basis of column parity violation. An error instance in the matrix is next ascertained by...
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6421799 |
Redundancy correction ROM
A ROM including an array, each cell of which is accessible by means of a column address and of a row address, includes a parity memory for storing the expected parity of each row and of each...
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