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5544180 |
Error-tolerant byte synchronization recovery scheme
An improved technique for detecting a byte synchronization field encoded on a data storage drive. The technique correctly recovers the byte synchronization even if the byte is corrupted by a single...
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5528609 |
Method and apparatus for correcting phase of frames in subscriber loop carrier system
Disclosed is a subscriber loop carrier system wherein, to synchronize the phases of frames and multiframes from a plurality of subscriber loop carriers, corrections are made on the phases of frames...
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5526486 |
Apparatus for detecting undefined states of a finite state machine (FSM) and resetting the FSM upon detection
A finite-state machine has combinatorial logic connected to a status memory which receives future state signals from the finite-state machine and sends current state signals to the finite-state...
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5524194 |
Data communication apparatus
A multi-media communication apparatus has functions of receiving/transmitting images, audio signals, code data and the like. A detection unit detects an error in an image signal received from a...
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5517510 |
Method and apparatus for indicating uncorrectable errors to a target
An uncorrectable set of input vectors (303), comprising a primary input vector (P) and a secondary set of input vectors (S), is provided at a sender (301). The secondary set of input vectors is...
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5517513 |
Sync interpolative circuit and sync state detecting circuit of a disc reproducing apparatus
A sync interpolative circuit and sync state detecting circuit for use in a disc reproducing apparatus, which reproduces data by generating an interpolative sync signal even when a sync pattern of...
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5485476 |
Method and system for error tolerant synchronization character detection in a data storage system
An error tolerant detection of multibit synchronization characters within data blocks in a data storage system. Each detected prospective multibit synchronization character is compared to an...
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5473328 |
Method and apparatus for transmitting digital data
A transmission method for transmitting data containing inhibition code data that cannot be recorded in a digital recording and/or reproducing apparatus. The method includes a step of converting the...
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5461633 |
Disk drive circuit with partial match detection for predetermined bit sequence
In a disk drive where data bits containing a bit sequence signifying a specified location of a data block are read from a disk. A reference bit sequence identical to the recovered bit sequence is...
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5430746 |
Method of and circuitry for detecting synchronism failure of two word sequences
A method of and a circuit arrangement for detecting synchronization of two word sequences between a measurement signal and a reference signal. The signals are applied to an exclusive OR-gate...
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5420874 |
Testing of electrical circuits
The invention facilitates testing of electrical circuitry which includes a circuit receiving a signal asynchronous with respect to the circuit clock. The exact clock pulse on which the asynchronous...
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5416779 |
Time division duplex telecommunication system
A communication procedure suitable for a cordless telephone system involves time division duplex radio communication between a handset 11 and a base station 3 using alternating bursts of...
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5410557 |
Method and apparatus for recognizing valid components in a digital signal
An apparatus for distinguishing a wanted signal in a binary signal sequence having both wanted signals and interference signals includes the step of generating a correction value which has a first...
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5400349 |
Fault tolerant comparator for disk drive controllers
An apparatus and method are disclosed for comparing disk data to a synchronization pattern. A preferred embodiment includes a plurality of exclusive NOR gates for exclusive NORing the disk data...
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5388126 |
Baseband signal processor for a microwave radio receiver
A baseband signal processor within a radio receiver provides a design which does not materially increase the size and weight or decrease the battery life of the host equipment. A passive analog...
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5377209 |
Telecommunications system data alignment equipment and method
Synchronization of a receiving termination of a telecommunications system with an incoming data stream is carried out from a synchronization signal carried with the data stream. It is possible that...
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5343482 |
Method and apparatus for detecting pulse density violations in T1 transmission
A method of detecting a pulse density violation in the T1 transmission of digital signals, which includes counting bits in sets of "k" successively in n serial stages generating an empty-out signal...
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5321813 |
Reconfigurable, fault tolerant, multistage interconnect network and protocol
A multistage interconnect network (MIN) capable of supporting massive parallel processing, including point-to-point and multicast communications between processor modules (PMs) which are connected...
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5321754 |
Sequence synchronization
A data sequence is transmitted from a transmitter to a receiver, being scrambled at the transmitter by adding a pseudo random sequence (PRS) thereto. At the receiver the received data is...
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5295163 |
Synchronization method for a run length-limited (1,7)-code, and circuit arrangement for said method
For word synchronization of a run length-limited (1.7)-code with a code rate of 2/3 a synchronization sequence is inserted in the bit-serial sequence of three bit-wide code words, which...
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5291500 |
Eight-sample look-ahead for coded signal processing channels
A signal processing channel and method are described for processing digital sample values corresponding to an incoming analog signal representative of coded binary data. An eight-sample look-ahead...
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5283576 |
Disparity detection circuit for a 2-bit to 4-bit coded signal decoder
A disparity detection circuit used in a signal decoder which decodes a 4-bit signal into an original 2-bit main signal and 1-bit service signal, from which the 4-bit signal is coded according to a...
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5276708 |
Coding method for reducing the D.C. component in the data stream of a digital signal
For reducing the d.c. component of a digital signal in which a good many data words are put together in data blocks each having the same number of words, a supplementary word is derived and is...
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5276691 |
Method for the control of receiver synchronization in a mobile phone
A receiver synchronization control in signalling messages in TACS/AMPS system in a mobile phone is disclosed. In order to avoid unnecessary setting of hunt mode operation, if the received...
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5274647 |
Elastic buffer with error detection using a hamming distance circuit
An elastic buffer circuit uses codes having a predetermined number of bits and a Hamming distance of 1 when adjacent memory elements are designated. The codes contain a common code in which bits...
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5267230 |
Method and apparatus for communication maintenance and termination
A communication system base site (300) receives a signal (400) representing voice information (402) and data information (404 or 404') from a communication channel. At least the data information is...
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5235603 |
System for determining loss of activity on a plurality of data lines
A system for determining the presence or absence of data on one or more data lines including a flip-flop for each data line with the output of each flip-flop connected to a NAND gate. The NAND gate...
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5228041 |
Sync signal detection system in a memory system for recording and reproducing block unit data
There is provided a signal processing system for recording and reproducing a video signal and a digital audio signal with a rotary-head VTR and, more particularly, a memory control system which...
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5210762 |
Sonet pointer interpretation system and method
A SONET pointer interpretation in system which an Alarm Indication Signal (AIS) of a first type is interpreted as a subset of Loss of Pointer (LOP) of a first type. Specific events are defined for...
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5202908 |
Shift register
A shift register includes a plurality of alternating shifting and latching sections connected in cascade. The phases of clocks (CLK, CLKB) for driving transmission gates (10, 14) of the shifting...
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5185740 |
Information transmitting device
In an information transmitting device which transmits information in a preamble portion and a plurality of data blocks as a unitary set, when a block synchronizing code in the data blocks is...
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5184302 |
Engine control apparatus including A/D converter failure detection element and method therefor
An engine control apparatus includes an operational condition detecting device for detecting the operational condition of an engine, an A/D converter for converting an analog output from the...
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5163057 |
Method of and circuit arrangement for determining a cell loss and/or a cell insertion during traversal of a cell oriented transmission device by cell structured signals
A method of and a circuit for detecting a cell loss and/or a cell insertion in cell structured signals traversing a cell oriented transmission module. A bit comparison is effected between a test...
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5163070 |
Digital data synchronizer
A digital data synchronizer, synchronizes a digital data system to an incoming serial bit stream having a segment of pseudo random bit sequence, which is a function of a predetermined primitive...
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5163069 |
Pattern synchronizing circuit and method
An input pattern is re-timed in a re-timing circuit by an input clock signal of the same frequency as that of the input pattern, and the re-timed input pattern and a reference pattern generated by...
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5146462 |
System and devices for transmitting signals consisting of data blocks
The transmission of digital signals consisting of data blocks, each delimited by one of several possible words (DDi) and enumerated in transmission by enumeration which is reconstructable upon...
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5144469 |
Method for the transmission of data between two stations by means of optical waveguides
In a system wherein a main channel of data is transmitted between two stations by means of an optical waveguide, an additional optical channel may be transmitted. Bits of the additional optical...
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5132991 |
Frame error detection system
A frame error detection system for SONET which operates in both the OC-3 and OC-12 modes. The frame detection circuit operates by examining the incoming data bit stream, which is in parallel form,...
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5117442 |
Methods and circuits for synchronizing signals in a modular redundant fault tolerant computer system
A fault tolerant circuit and method of synchronizing multiple asynchronous input signals, such as reset signals, in a modular redundant fault-tolerant computer system in which clock signals or...
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5107495 |
Frame synchronization system
A frame synchronization system includes a synchronization detector supplied with a digital signal including frame synchronizing pulses for outputting the digital signal in a frame synchronization...
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5103406 |
Image printing system
An image printing system for printing a picture image comprises a host computer for sending commands and picture image data to a printing apparatus, the printing apparatus printing a picture image...
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5090012 |
Multiplex transmission system for use in a vehicle
A multiple transmission system for use in a vehicle, in which a second node having a control function sends an command to first nodes of an ordinary type when an transmission error higher than a...
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5050187 |
Communication system equipped with an AC coupling receiver circuit
An AC coupling receiver circuit for use in a communication system comprises a comparator connected to transmission lines forming a twisted pair wire, through AC coupling capacitors, and a...
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5050171 |
Burst error correction apparatus
A burst error correction apparatus suitable for correcting burst error due to a bit slip in a self-clocking signal containing resync codes at predetermined intervals, e.g., a self-clocking signal...
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5042054 |
Method for generating a data receiving clock of paging receiver
A method for generating a clock for data receiving correctly synchronized in each bit even if received data in a paging receiver gets trembled or a duty period of the received data changes....
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5038351 |
Coded mark inversion block synchronization circuit
A CMI block synchronization circuit includes a clock deriving circuit, CMI decoding circuit, signal selection determining circuit and a selection circuit. In the clock deriving circuit, a clock CLK...
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5025458 |
Apparatus for decoding frames from a data link
An apparatus for decoding frames from a data link including a multiple entry expect/mask buffer an input for receiving multiple character frames, a comparator for comparing characters received from...
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5023612 |
Illegal sequence detection and protection circuit
A circuit for eliminating illegal data sequences from a data stream is disclosed. The circuit examines a portion of an input data stream. The previously received data sequence is then examined. If...
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5022051 |
DC-free line code for arbitrary data transmission
Means and structure for encoding binary data ensures that, on average, the encoded data provides a balanced data stream having an equal number of logical one and logical zero bits. An indicator bit...
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5020081 |
Communication link interface with different clock rate tolerance
A communication link interface having an assembly register which is loaded in response to a transmitter's clock rate and unloaded in response to a receiver's clock connected to the interface. The...
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