Matches 151 - 200 out of 348 < 1 2 3 4 5 6 7 >
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6089749 Byte synchronization system and method using an error correcting code  
A byte synchronization detection system and method in which a vector subtractor circuit determines an error vector between a current read data pattern and a synchronization bit pattern, and an...
6088828 Transmission system with improved lock detection  
In order to find the position of the boundary between transmitted codewords, in a receiver a reliability measure for two possible positions are compared. If a relative difference measure of these...
6088829 Synchronous data transfer system  
A synchronous data transfer system includes an oscillation circuit and a plurality of nodes connected to the oscillation circuit and each including at least an internal logic circuit. Each of the...
6085351 Synchronization method  
The method of synchronizing a receiver in a coded data transmission by means of an M-stage channel symbol alphabet, which includes dividing the channel symbol alphabet into a number of K not...
6069927 Digital signal link  
A digital signal transmission apparatus, wherein at the time of normal data transmission, an output circuit of a transmitter unit selects transmission data SDAT and converts it to a differential...
6049903 Digital data error detection and correction system  
A CRC coding circuit performs an operation of division of a receive polynomial Yh(x) indicating received data corresponding to input effective bits by the CCITT CRC-16 generating polynomial G(x) to...
6029208 System for generating block address by replacing second count with second valid block address whenever sync is detected or symbol count is reached in one complete block  
For serially transmitted block data that includes a sync signal, ID code, block address code, error correction code, and object data, a data receiving apparatus uses an input data reader that...
6014368 Packet multiplexing system  
A multiplexing system which detects multiplexing errors, includes PES packetizing modules that packetize elementary streams (ES) to produce packetized elementary streams (PES), and a TS/PS...
6009551 Optimum utilization of pseudorange and range rate corrections by SATPS receiver  
The partial decoding algorithm for decoding the partially damaged differential satellite positioning system (SATPS) messages is disclosed. The algorithm is based on the modified parity test. The...
6000018 System for aligning control words for identifying boundaries of headerless data sectors using automatic incrementing and discarding of data frame numbers  
A disk sequencer, which is loaded with control words from a format table and a frame number associated with the first control word loaded, automatically cycles through loaded control words and...
5963602 Synchronism detection and demodulating circuit  
A synchronism detection and demodulating circuit includes: a circuit for frequency dividing the regenerative clock in an irregular manner, a circuit for reading out the input data in a special...
5954825 Method for isolating faults on a clocked synchronous bus  
A shift register is used to latch the bus-driver-enable signal for each potential bus driver during each system clock cycle. The shift register clock will freeze upon receipt of a "check stop"...
5953385 Method and device for detecting the error on the frequency of a carrier  
In order to detect the error on the frequency of an M-PSK phase-modulated carrier, the phase ψ(n) of the samples is restored to the interval -π, +π ; φ(n)=mod(ψ(n), 2π/M) is calculated;...
5928375 Method for enhancing data transmission in parity based data processing systems  
A data transfer system providing parity uses a method and apparatus for transmitting a data clocking signal in a parity bit location along a data bus to latch an accompanying data byte at a...
5926491 Noise tolerant run-in clock recovery method and apparatus  
A hardware system is programmed with a noise tolerant vertical blanking interval (VBI) scan line run-in clock recovery function that determines the phase adjustment for reading sampling data, using...
5917870 Synchronization monitoring in a network element  
In digital transmission systems, such as synchronous transmission systems according to the SDH/SONET standard, there is a need to have information on the synchronization status of the system. A...
5907566 Continuous byte-stream encoder/decoder using frequency increase and cyclic redundancy check  
A continuous byte stream encoder/decoder process where a continuous stream of ATM data cells is received with a plurality of words, where each word has a plurality of bits in parallel. The ATM data...
5901158 Error correction encoder/decoder  
The encoder/decoder system uses encoder hardware to encode data symbols and form a data code word. To decode, the system uses the same encoder hardware to determine a residue r(x), i.e. ##EQU1##...
5887039 Data transmission system using specific pattern for synchronization  
Parallel digital data are transmitted along with a specific synchronization pattern added thereto. Each synchronization pattern adder adds the synchronization pattern at an equal timing for each...
5864572 Oscillator runaway detect and reset circuit for PLL clock generator  
An oscillator runaway detection circuit is provided with a synchronous delay line such that energy saving or sleep modes of operation are not mischaracterized as oscillator runaway. A Schmitt...
5844923 Fast framing of nude ATM by header error check  
This invention provides a fast framing device that processes a stream of bytes and generates a signal for every byte clock that indicates whether a selected Asychronous Transfer mode cell boundary...
5832002 Method for coding and decoding a digital message  
The present invention relates to a method for coding and transmitting a digital message (c(x)) comprising a first number of information bits (a(x)) and a second number of control bits (b(x)), said...
5828900 International multiple-byte character generator support in application sharing which distinguishes guest keyboard input from host key board and bypassing execution of the generator module when guest keyboard input is determined  
Host multiple-byte character generator processing of guest keyboard events is blocked during applications sharing. A guest keyboard driver generates guest keyboard events which may be processed by...
5809341 Circuit for transmitting received character when detection signal is not activated and transmitting substitute character when the detection signal is activated  
A data communication circuit of a computer system, includes transmitter and receiver circuits each having first and second data paths for respectively communicating synchronously and asynchronously...
5805076 Mobile communications system  
In a mobile communications system wherein the transmission form changes in the course of the signal, high quality transmission of change information relating to the transmission form is obtained....
5790572 Communication system with framing error detection  
When a framing error occurs in a slave unit, the cause of error is analyzed, and an interruption is inhibited or enabled depending on the cause of error thus, optimal data communication can be...
5771249 ATM cell synchronous system  
An asynchronous transfer mode (ATM) cell synchronizing method and circuit used in a digital network system in which: an 8 bit ATM cell stream of a received signal is inputted into a five-stage D...
5745510 System for detecting frame/burst synchronization and channel error using cyclic code  
A system for detecting a frame/burst synchronization and a channel error using a cyclic code (n,k). A received block of 2n-k bits is divided into a head block including first n-k bits of the...
5742623 Error detection and recovery for high rate isochronous data in MPEG-2 data streams  
Error recovery is provided for isochronous data ("isodata") obtained from a data stream. Isodata transport packets are monitored to locate isodata presentation time stamps (PTSs). The presentation...
5734422 Digital video error analyzer  
A serial digital video data analyzer combines a co-processor capable of handling the serial digital video data stream bit rate with a microprocessor operating at a slower bit rate. The co-processor...
5734722 Electronic travel pass  
A data transfer system transfers data between a smartcard and a reader by transmitting a series of binary pulses, where the absence or presence of single predetermined pulses within the series...
5715260 Method and apparatus for providing a variable reset interval in a transmission system for encoded data  
A method and apparatus for reducing the amount of corrupted data in a system for transmitting encoded data across a network, which system requires sychronization between encoding and decoding...
5715278 Standby power saving in mobile phones  
A method and system for increasing the probability of receiving a message in mobile communication systems. The invention uses a synchronization pattern to determine the location of an intended...
5701410 Method and system for detecting fault conditions on multiplexed networks  
A method for detecting fault conditions on a multiplexed network having first and second busses. The method includes sensing a start of frame delimiter (SOF) for the first bus, and determining the...
5640146 Radio tracking system and method of operation thereof  
A radio tracking and ranging system is disclosed which has at least one mobile radio frequency transmitter and a radio frequency receiver. The radio frequency receiver has a range control which...
5636208 Technique for jointly performing bit synchronization and error detection in a TDM/TDMA system  
An improved technique for simultaneously performing bit synchronization and error detection of received digital data bursts in a time division multiplexed/time division multiple access (TDM/TDMA)...
5631928 Enhanced B3ZS decoder and method for identifying true zero-substitutions  
An enhanced B3ZS decoder which substantially improves error-multiplication performance is disclosed. A string of four bits is examined to detect whether it satisfies two specific criteria. The...
5627846 Drop-out location detection circuit  
A digital data reproducing circuit for use with a magnetic or optical data storage for detecting and flagging signal level drop-outs in pulse position modulated (PPM) recorded signal levels....
5621743 CD-ROM decoder for correcting errors in header data  
A CD-ROM decoder provides error correction for header data of digital data read out from a ROM disc. Address information contained in the header data of the read out digital data is stored in an...
5615223 PPM decoder utilizing drop-out location information  
A method of and apparatus for decoding data from positive and negative pulses of an encoded pulse train, e.g. a NRZ pulse train for PPM encoding, wherein the recorded data is subject to drop-outs...
5604754 Validating the synchronization of lock step operated circuits  
Apparatus for and methods of detecting an error in multiple state lock step operated circuits. Signatures representing internal states of each circuit are conveyed in daisy chain format to connect...
5602859 Start-stop synchronous communicating method capable of correcting improper synchronization and system using the same  
A method of carrying out start-stop synchronous communications is disclosed in which, when improper synchronization takes place owing to the transmission of a recovery frame for improper...
5598423 Very low jitter clock recovery from serial audio data  
Synchronization with a signal derived from code violations in periodic data block preambles, and derived using analog circuits provides for a very low jitter clock. The method involves detecting...
5590161 Apparatus for synchronizing digital data without using overhead frame bits by using deliberately introduced errors for indicating superframe synchronization of audio signals  
A transmitter for transmitting a low probability of detection rf signal, in which digitized audio data is contained therein. Each data frame contains deliberately introduced errors to synchronize a...
5572535 Method and data processing system for verifying the correct operation of a tri-state multiplexer in a circuit design  
A method (FIGS. 12-16) and a data processing system (FIG. 4) are used to verify the correct operation of one or more tri-state multiplexers (FIG. 3) located in a circuit model (37). The tri-state...
5570382 Clock signal fault detector  
A clock signal hull detector includes a signal level monitor for detecting an extraordinary condition in which the clock signal to be monitored is stuck at either a high level or a low level and a...
5568135 Remote control method and unit for a radio unit  
A remote control method and system controlling a radio unit so as to readily specify a portion where a failure occurs, and to quickly take recovery measures against the failure includes a...
5566192 Variable-length decoder for bit-stuffed data  
A variable-length decoder variable-length-decodes a received variable-length-encoded data. The variable-length-encoded data is bit-stuffed in each data block to create data portions with a...
5553086 Multiple servo sector sets write with self-verification for disk drive  
Plural embedded servo sector sets are written as a single operation by a servo writer during manufacture of a hard disk drive. Later, the disk drive electronics performs a self scan and selects one...
5544179 Mis-synchronization detection system using a combined error correcting and cycle identifier code  
A transmitting node generates error correction symbols by encoding data using error correction code integrated with information which identifies the data cycle in which the data are to be...
Matches 151 - 200 out of 348 < 1 2 3 4 5 6 7 >