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6763078 |
Device and method for burst synchronization and error detection
This specification provides a burst synchronization and error detection device, which can generate in the synchronization module of the burst synchronization and error detection device a syndrome...
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6745337 |
Glitch detection circuit for outputting a signal indicative of a glitch on a strobe signal and initializing an edge detection circuit in response to a control signal
A glitch detection circuit is described for detecting a glitch on a strobe signal transmitted over a single strobe interface. The glitch detection circuit includes a first input terminal to receive...
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6735552 |
Method of recognizing and correcting errors
A method for error detection and error correction in the monitoring of measurement values is disclosed, in which the value to be tested is checked for plausibility in an evaluation device, for...
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6728923 |
Error correction encoding a data stream of information
An apparatus and method for error correction encoding a datastream of information into blocks of error correction encoded information. An input terminal receives the datastream. An error correction...
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6718512 |
Dynamic parity inversion for I/O interconnects
A method of detecting synchronization errors during the transfer of data in which a transmitting agent sends to the receiving agent either: (a) data parity encoded with a data parity function when...
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6711707 |
Process of controlling plural test access ports
An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and...
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6700903 |
Upstream scrambler seeding system and method in a passive optical network
A system and method for enabling an optical network unit (ONU) in a passive optical network to scramble data and send the scrambled data upstream to an optical line termination unit (OLT). In...
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6665834 |
Flexible method of error protection in communications systems
A flexible method of error coding uses at least two generating polynomials to provide different degrees of error protection and to optionally superimpose a phantom channel on a primary channel,...
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6651242 |
High performance computing system for distributed applications over a computer
A system that includes one or more priority failure detectors may be included that detect node or process failures in the distributed computer network. The system has a fault-tolerant,...
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6643815 |
Data compression over communications links which are exposed to occasional errors
Re-synchronization of sets of transmit and receive state variables in a communication system is achieved when an error is detected, without disrupting the connection. Each of first and second...
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6643820 |
Signal processing circuit with timing recovery PLL
A signal processing circuit for processing a read signal corresponding to data read from a recording medium, such as a magnetic disc. The signal processing circuit detects a preamble data signal of...
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6636979 |
System for measuring phase error between two clocks by using a plurality of phase latches with different respective delays
A phase error measurement circuit for measuring phase error between two clocks on an integrated circuit is provided. The measurement circuit includes first and second clock signal inputs, a phase...
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6637006 |
Digital data decoder with improved unreliable frame detection performance
A received frame is provided to a first decoder and a first time reverse unit. The first decoder decodes the provided frame and outputs the decoded frame. The first time reverse unit reverses bits...
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6634003 |
Decoding circuit for memories with redundancy
A system for disabling defective memory elements includes a memory array, an address decoder and a decoder element. The memory array has multiple memory elements for storing data. The address...
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6618829 |
Communication system, a synchronization circuit, a method of communicating a data signal, and methods of synchronizing with a data signal
The present invention includes bit synchronizers and methods of synchronizing and calculating error. One method of synchronizing with a data signal in accordance with the present invention includes...
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6611795 |
Apparatus and method for providing adaptive forward error correction utilizing the error vector magnitude metric
An adaptive forward error correction technique based on noise bursts and the rate at which they occur is disclosed. The forward error correction parameters are determined using statistics...
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6598187 |
Semiconductor integrated circuit device with test circuit
A semiconductor integrated circuit having a latch including a data input terminal and a timing input terminal, has a first input terminal connected to the latch data input terminal and a second...
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6591396 |
Moving image communication quality determination apparatus
A transmitter 12 and a receiver 35 are connected to a network 20 for transferring data of moving image code as a packet between the transmitter 12 and the receiver 35 . The transmitter 12...
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6587521 |
Signal estimator and program stored memory medium
A signal estimator is provided that can track a large frequency offset. A received signal distorted in a transmission path is phase-rotated by the phase rotator ( 102 ) and is then estimated by the...
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6581183 |
System and method for resynchronization of transmit and receive compression dictionaries
Broadband modems using data compression insure the physical connection between modems is solid prior to initiating error recovery procedures since its error detection runs on the compressed data....
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6578136 |
Magnetic disc control apparatus with parallel data transfer between disc control unit and encoder circuit
A disc storage apparatus includes at least one disc having at least one recording surface, at least one head associated with the at least one recording surface for recording data on the at least...
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6560745 |
Method of identifying boundary of markerless codeword
The present invention is a method of determining codeword boundary without marker bits by receiving transmission bits; determining a dual code of a code used to generate the transmission bits;...
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6532567 |
Method and apparatus of Viterbi detection for trellis-code
A method and apparatus for Viterbi detection to detect a code sequence containing a sync word, from an output sequence on a transmission path, by using a trellis detection that has a time-variant...
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6522665 |
Data sequence generator, transmitter, information data decoder, receiver, transmitter-receiver, data sequence generating method, information data decoding method, and recording medium
The probability of frame destruction is lowered while suppressing the redundancy of the transmission data. On the transmitting side, a predetermined unique word is contained in a frame n for...
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6516440 |
Printer and a control method for saving data from volatile to nonvolatile memory in the printer
A method for controlling the saving of information regarding printer operating conditions to its nonvolatile memory is provided. The method decreases the data save time to the printer's nonvolatile...
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6477171 |
Method and system for negotiation of the highest common link rate among nodes of a fibre channel arbitrated loop
A method and system for automatic negotiation of maximal shared data transmission and reception rates by fibre channel nodes in a fibre channel arbitrated loop. An auto-speed-negotiation function...
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6470203 |
MR imaging method, phase error measuring method and MRI system
The present invention aims to reduce degradation in image quality due to residual magnetization. In a pulse sequence of a high-speed spin echo process, a pre-pulse is applied before an excitation...
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6438720 |
Host port interface
A circuit for interfacing a processor with a host processor is provided that has a memory associated with the processor that is selectively accessible by either both the processors or by the host...
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6434146 |
USE OF SEQUENCING INFORMATION IN A LOCAL HEADER THAT ALLOWS PROPER SYNCHRONIZATION OF PACKETS TO SUBSIDIARY INTERFACES WITHIN THE POST-PROCESSING ENVIRONMENT OF AN MPEG-2 PACKET DEMULTIPLEXING ARCHITECTURE
A system and method for demultiplexing and distributing transport packets, such as MPEG-2 transport packets, by generating and associating a locally-generated header with each of the transport...
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6434512 |
Modular data collection and analysis system
A diagnostics/prognostics system and related method for collecting and processing data relating to a plurality of subsystems of a dynamic system includes a plurality of sensors, each sensor...
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6427221 |
Self-organizing rolling mill system importing neighbor constraint ranges
A rolling mill system uses a number of autonomous control units, each associated with one piece of equipment of the rolling mill system. The autonomious control units include data indicating not...
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6397369 |
Device for using information about the extent of errors in a signal and method
A device using information about the extent of errors in a signal is shown. The device includes an input signal containing at least one constraint and any errors introduced into the input signal...
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6385745 |
Phase independent receiver and/or decoder
A circuit comprising a receiver configured to receive a first signal having a first phase, a second signal having a second phase opposite the first phase and an output configured to present either...
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6377643 |
Apparatus for detecting a synchronization signal in a digital data record/replay device
An apparatus for detecting a sync signal in a digital data record/replay device having a parallel clock generator, a parallel data generator, and a window unit comprises: a sync signal detector for...
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6366624 |
Systems and methods for receiving a modulated signal containing encoded and unencoded bits using multi-pass demodulation
Methods and systems are provided for receiving a modulated signal including symbols representing both encoded and unencoded bits from a data (e.g., speech) frame where a received slot is first...
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6363514 |
Sound reproducing system and method capable of decoding audio data even in case of failure of detecting syncword
A sound reproducing system that decodes audio data in a frame with which detection of a syncword fails, if a syncword included in a subsequent frame is detected, if correctness of bit stream...
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6357033 |
Communication processing control apparatus and information processing system having the same
A communication processing control apparatus for controlling data transmission between an arithmetic processing control apparatus and a network includes first and second communication processing...
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6334203 |
Error detecting method and device and signal demodulating method and device
In an error detecting method and device for calculating a phase error in a PSK modulated signal having a predetermined modulation phase number, and so configured that a received phase of the...
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6321343 |
Semiconductor memory system comprising synchronous DRAM and controller thereof
A maximum flight time measuring circuit constituted by a first delay circuit for delaying a system clock and controlling its delay time in accordance with a strobe clock from DIMMs and a delayline...
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6289297 |
Method for reconstructing a video frame received from a video source over a communication channel
An adaptive region-based, multi-scale, motion compensated video compression algorithm design for transmission over hostile communication channels. The algorithm is embodied in a video encoder that...
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6266201 |
Multiple channel rewrite system
In a data recording system utilizing multiple channels and data blocks wherein the data blocks are read subsequent to being written so as to check for errors, the data blocks are rewritten...
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6249896 |
Error-tolerant sync detection for DVD optical disks using programmable sequence of sync marks
Synchronization (sync) marks on a digital-versatile disk (DVD) optical disk are initially detected and later used to adjust bit timing after jitter has occurred. Each DVD physical sector contains...
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6226768 |
Coded frame synchronizing method and circuit
A coded frame synchronization method for decoding coded information sent every frame includes the steps of: (a) receiving a coded frame having error detection or correction codes, each of which is...
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6223317 |
Bit synchronizers and methods of synchronizing and calculating error
The present invention includes bit synchronizers and methods of synchronizing and calculating error. One method of synchronizing with a data signal in accordance with the present invention includes...
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6195783 |
Process and apparatus for synchronizing the block counter in an RDS radio data receiver
A process and apparatus for synchronizing the block counter of an RDS radio data receiver is described. According to the process, the bits stored in a 26-bit shift register, are cycled at least n...
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6195784 |
Circuit for detecting reception errors in an asynchronous transmission
The present invention relates to a circuit of reception of bits transmitted on an asynchronous signal, including a circuit for providing a clock reconstructed from the asynchronous signal, this...
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6163869 |
Method of re-sending incorrectly transmitted data
A method for repeating data transmitted incorrectly (ARQ) between subscribers having in each case at least one transmit section, and at least one receive section. A data stream at the transmitting...
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6148348 |
Bridge interfacing two processing sets operating in a lockstep mode and having a posted write buffer storing write operations upon detection of a lockstep error
A bridge for a multi-processor system includes bus interfaces for connection to an I/O bus of a first processing set, an I/O bus of a second processing set and a device bus. The bridge also...
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6134698 |
Reduced pin count isochronous data bus
An isochronous bus may includes a data signal, a data valid signal, a frame synch signal and a clock signal. The bandwidth of the data signal is partitioned into a plurality of frames. The frame...
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6111924 |
Error-correction-code synchronization in a videoconferencing gateway
A de-framer (72) in a communications gateway (22) translates videoconferencing information from a circuit-switched format to a packet-switched format. A demultiplexor (78) extracts a bitstream...
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