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7627804 |
Memory device with speculative commands to memory core
In some embodiments, a chip includes a memory core, error detection circuitry, and a control unit. The error detection circuitry determines the validity of error detection signals associated with...
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7627791 |
Method and apparatus for recording a data stream on a storage medium
The resistance against recording defects of a write-once optical disk is enhanced allowing realtime recording and playback of data streams with a single speed disk drive. A data stream is recorded...
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7624333 |
Method and apparatus for N+1 packet level mesh protection
Methods and apparatus are provided for N+1 packet level mesh protection. An error correction encoding method is provided that assembles M-T data packets; appends a sequence number and a payload...
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7620878 |
Apparatuses and methods for checking integrity of transmission data
A generator may include a monitoring unit, an engine unit and/or a register. The monitoring unit may selectively extract at least a portion of data to be transmitted to, or received from, an...
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7613987 |
Method for wireless data transmission
A method for wireless data transmission between a base station and one or more, in particular passive, transponders is provided, in which electromagnetic carrier waves are emitted by the base...
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7610519 |
Vector generation for codes through symmetry
Apparatus for vector generation is described. A vector generator is associated with a discrete power series symmetric about at least one term and configured to provide vectors, such as QSvectors...
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7607068 |
Apparatus and method for generating a Galois-field syndrome
The present disclosure provides an apparatus and method for generating a Galois-field syndrome. One exemplary method may include loading a first data byte from a first storage device to a first...
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7607064 |
Serial asynchronous interface with slip coding/decoding and CRC checking in the transmission and reception paths
A transmitting/receiving unit for asynchronous data transmission has a CRC unit and a transmission FIFO in a transmission path. A coding unit for SLIP-coding of data to be transmitted can...
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7606266 |
HDLC hardware accelerator
An HDLC accelerator includes a deframer and framer to respectively accelerate the deframing and framing processes for PPP packets. The deframer includes an input interface unit, a detection unit, a...
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7606222 |
System and method for increasing the range or bandwidth of a wireless digital communication network
A system and method, associated with a receiver, for increasing the range or bandwidth of a wireless digital communication network and a receiver incorporating the system or the method. In one...
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7603365 |
System and method for capture and processing of overflow characters from user input
A system and method for preventing user-input text strings of illegal lengths from being submitted to a database where, for each character in the string, a character length is determined in...
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7600174 |
Apparatus and method for encoding and decoding a block low density parity check code
Apparatus and method for coding a block low density parity check (LDPC) code. Upon receiving an information word vector, an encoder codes the information word vector into a block LDPC code...
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7600173 |
Retransmission control method and communications device
A retransmission control method comprising: generating N parity check matrices; generating a generator matrix containing a check symbol generator matrix contained in the first parity check matrix;...
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7584401 |
Channel interleaving/deinterleaving apparatus in a communication system using low density parity check code and control method thereof
A channel interleaving method and apparatus in a communication system using a low density parity check (LDPC) code. Upon receipt of information data bits, an encoder encodes the information data...
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7581157 |
Method and apparatus of encoding and decoding data using low density parity check code in a wireless communication system
A method of encoding data using low density parity check (LDPC) code defined by a m×n parity check matrix is disclosed. More specifically, the method includes encoding input source data using the...
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7581156 |
Systems and methods for providing improved encoding and reconstruction of data
Systems and methods for constructing Reed-Solomon encoding matrices are provided that are simpler and more regular than existing techniques, and which allow for the coding to be applied to more...
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7577896 |
Apparatus and method for performing cyclic redundancy check (CRC) on partial protocol data units (PDUS)
The present invention discloses an apparatus and method for performing cyclic redundancy check (CRC) on partial protocol data units (PDUs). The disclosed apparatus is designed to off-load the CRC...
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7571372 |
Methods and algorithms for joint channel-code decoding of linear block codes
Circuits, architectures, methods and algorithms for joint channel-code decoding of linear block codes, and more particularly, for identifying and correcting one or more errors in a code word and/or...
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7571368 |
Digital content protection systems and methods
In an embodiment of the invention, an integrated circuit comprises an input module configured to receive a first data segment, an identifier module having a hard coded identifier, a processing...
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7565598 |
Error correction for disk storage media
Embodiments of the invention provide methods and systems for improving the reliability of data stored on disk media. Logical redundancy is introduced into the data, and the data within a logical...
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7562284 |
Apparatus, system, and method for mandatory end to end integrity checking in a storage system
An apparatus, system, and method are disclosed for mandatory end to end integrity checking. The apparatus includes a compatibility module configured to monitor data from a source and verify...
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7555702 |
Error correction device, error correction program and error correction method
An error correction device, an error correction program and an error correction method can reduce the processing time necessary for the process of correcting errors that involve erasure in a...
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7555701 |
Method and system for recovering from multiple drive failures
A method of calculating parity for an m-storage element failure in a networked array of storage elements. A first set of n XOR relationships is derived, each first set relationship containing n...
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7555694 |
Channel interleaving/de-interleaving apparatus in a communication system using a low density parity check code and control method thereof
In a communication system, information data bits are encoded in a preset coding scheme when the information data bits are input, and a Low Density Parity Check (LDPC) codeword is generated. The...
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7536629 |
Construction of LDPC (Low Density Parity Check) codes using GRS (Generalized Reed-Solomon) code
Construction of LDPC (Low Density Parity Check) codes using GRS (Generalized Reed-Solomon) code. A novel approach is presented by which a GRS code may be employed to generate a wide variety of...
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7533327 |
Method and system for bluetooth decoding
A system and method for Bluetooth® decoding is disclosed and may include calculating a remainder value based on a received bit sequence and a generator polynomial for a corresponding transmitted...
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7519898 |
Iterative decoding of linear block codes by adapting the parity check matrix
A method of decoding linear block code uses an iterative message passing algorithm with a binary image of a parity check matrix of the linear block code, wherein the parity check matrix is adapted...
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7506238 |
Simplified LDPC encoding for digital communications
Encoder circuitry for applying a low-density parity check (LDPC) code to information words is disclosed. The encoder circuitry takes advantage of a macro matrix arrangement of the LDPC parity check...
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7502989 |
Even-load software Reed-Solomon decoder
A software implementation of a Reed-Solomon decoder placing a constant load on the processor of a computer. A Berlekamp-Massey Algorithm is used to calculate the coefficients of the error locator...
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7502987 |
Apparatus and method for encoding and decoding block low density parity check codes with a variable coding rate
An apparatus and method for coding a block Low Density Parity Check (LDPC) code having a variable coding rate. The apparatus receives an information word and encodes the information word into a...
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7502984 |
Method and apparatus for transmitting and receiving a block of data in a communication system
A method and apparatus for transmitting and receiving data provide for efficient use communication resources by encoding data in accordance with a first code to produce a block of data, determining...
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7487429 |
Simple decoding method and apparatus
A method of decoding possibly mutilated codewords (r) of a code (C) into information words (m′) including information symbols (m′ 1 , m′ 2 , . . . , m′k), the information words (m) being...
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7480342 |
Soft value calculation for multilevel signals
A sub-optimal method is disclosed for calculating the reliability values (soft values) for the bits of a multilevel signal. The log-likelihood values are approximated using only the dominant terms,...
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7472333 |
Encoding method and apparatus for cross interleaved cyclic codes
The invention relates to an encoding method for encoding a codeword to obtain a parity code. The code is embedded in the codeword and divides the codeword to have intermediate symbol locations...
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7469374 |
Circuit for generating a cyclic code
A cyclic code is generated by a circuit including a group of logic gates that generate one multiple-bit code segment from another multiple-bit code segment. The logic gates receive B initial bits,...
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7469049 |
Data dependent scrambler with reduced overhead
A data dependent scrambler for a communications channel that receives a user data sequence including X bits that are organized as N M-bit symbols includes a seed finder that generates a scrambling...
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7467346 |
Decoding error correction codes using a modular single recursion implementation
Systems and methods are provided for performing error correction decoding. The coefficients of the error locator polynomial are iteratively determined for each codeword using a modular...
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7464323 |
Algebraic geometric code adapted to error bursts
The present invention concerns channel codes particularly well adapted to transmission in channels in which errors tend to occur in bursts. Moreover, the codes according to one embodiment of the...
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7458007 |
Error correction structures and methods
A syndrome evaluation with partitioning of a received block of symbols into subsets and interleaved partial syndrome evaluations to overcome multiplier latency. Parallel syndrome evaluations with a...
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7458006 |
Methods for computing the CRC of a message from the incremental CRCs of composite sub-messages
A method of generating a CRC for a composite sub-message based on a CRC generating polynomial having at least two factors. The composite sub-message includes sub-message data and a number, n, of...
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7447982 |
BCH forward error correction decoder
An OC-192 front-end application-specific integrated circuit (ASIC) de-interleaves an OC-192 signal to create four OC-48 signals, and decodes error-correction codes embedded in each of the four...
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7444275 |
Multi-variable polynomial modeling techniques for use in integrated circuit design
Techniques are disclosed for modeling a cell of an integrated circuit design. In one aspect of the invention, a full-space polynomial model is fit to cell information comprising measured data...
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7437658 |
Disk array device, parity data generating circuit for RAID and Galois field multiplying circuit
In this parity data generating circuit, a Galois field multiplying calculation is realized by performing data conversion by index table information generated from a Galois field multiplying table...
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7433877 |
System and method to dynamically check string length
A system and method for preventing user-input text strings of illegal lengths from being submitted to a database where, for each character in the string, a character length is determined in...
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7426676 |
Data retrieval from a storage device using a combined error correction and detection approach
One or more methods and systems of effectively retrieving data stored in a media of a storage device are presented. The one or more methods and systems are implemented by way of correcting and...
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7418648 |
System and method for generating a cyclic redundancy check
A Cyclic Redundancy Check (CRC) system comprises N+1 shift registers. N+1 logic gates having first inputs communicate with outputs of corresponding ones of said N+1 shift registers. N+1...
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7415624 |
System and method for saving power in a wireless network by reducing power to a wireless station for a time interval if a received packet fails an integrity check
A method, an apparatus and a carrier medium storing instructions to implement the method. The method is in a first wireless station of a wireless network, and includes wirelessly receiving a signal...
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7401284 |
Module for generating circuits for decoding convolutional codes, related method and circuit
The present invention relates to a module 50 for generating integrated decoding circuits for use, in particular, in turbo devices, to the method for defining the characteristics of and generating...
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7398456 |
Information encoding by shortened Reed-Solomon codes
The present invention concerns an encoding method in which encoding is performed of any information word a of length k in the form of a word ν belonging to a Reed-Solomon code C of dimension k′...
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7392460 |
Mobile communication system and signal processing method thereof
A method of mobile communication including a transmitter having multiple transmitters and a receiver having multiple receivers. The method includes adding a cyclic redundancy check (CRC) code to a...
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