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8443256 |
Method and apparatus for determining a cyclic redundancy check (CRC) for a data message
A method of creatine a CRC (Cyclic Redundancy Check) code for a data message in a data communications system includes sequentially placing portions of the data message on a bus of width W bits...
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8443254 |
Method of generating a parity check matrix for LDPC encoding and decoding
A method of encoding input data using a low density parity check (LDPC) code or decoding the encoded data is disclosed. Each index of a model matrix is expanded to an index matrix which includes...
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8443264 |
Disk array apparatus, a disk array apparatus control method and a program for a disk array apparatus
A disk array apparatus includes a plurality of magnetic disks, and a RAID controller that generates redundancy data for host data received from a host apparatus by a primitive polynomial of Galois...
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8438459 |
Apparatus and method for decoding using channel code
An encoding and decoding method and apparatus. is disclosed. The method and apparatus improves encoding and decoding performance without using a large memory capacity and also reduces the...
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8438454 |
Semiconductor memory device and controlling method
According to an embodiment, a semiconductor memory device includes a nonvolatile memory; an input/output control unit to control input/output of data to/from the nonvolatile memory; an address...
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8438460 |
Error correction scheme for non-volatile memory
Error correcting systems, methods, and devices for non-volatile memory are disclosed. In one embodiment, a non-volatile memory device comprises a data area for storing data, an error correcting...
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8433984 |
LDPC encoding and decoding of packets of variable sizes
Techniques to support low density parity check (LDPC) encoding and decoding are described. In an aspect, LDPC encoding and decoding of packets of varying sizes may be supported with a set of base...
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8433985 |
Error correction mechanisms for flash memories
Methods and apparatuses for Bose-Chaudhuri-Hocquenghem (BCH) decoding utilizing Berlekamp-Massey Algorithm (BMA) and Chien Search. The BMA may utilize one or more of a scalable semi-parallel shared...
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8429491 |
Methods and apparatus for error checking code decomposition
Methods and apparatus are provided for more efficiently implementing error checking code circuitry on a programmable chip. In one example, Cyclic Redundancy Check (CRC) exclusive OR (XOR) circuitry...
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8429510 |
Simplified parallel address-generation for interleaver
An apparatus including a first circuit and a second circuit. The first circuit may be configured to store a block of data values arranged in a first order. The first circuit may be further...
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8413019 |
Computer-implemented method for correcting transmission errors using linear programming
A computer-implemented method for correcting transmission errors. According to the method, a transmitted vector corrupted by error can be recovered solving a linear program. The method has...
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8413023 |
Error-locator-polynomial generation with erasure support
A system and method for correcting errors in an ECC block using erasure-identification data when generating an error-locator polynomial. In an embodiment, a ECC decoding method, uses “erasure” dat...
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8413024 |
Performing a cyclic redundancy checksum operation responsive to a user-level instruction
In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a...
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8407555 |
LDPC codes robust to non-stationary narrowband ingress noise
LDPC codes robust to non-stationary narrowband ingress noise. Particularly designed LDPC codes are adapted to address deleterious noise-effects incurred within LDPC coded signals that propagate via...
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8402352 |
Multi-bit error correction method and apparatus based on a BCH code and memory system
Exemplary embodiments for providing multi-bit error correction based on a BCH code are provided. In one such embodiment, the following operations are repeatedly performed, including shifting each...
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8402375 |
System and method for managing bookmark buttons on a browser toolbar
A system and method is disclosed for managing bookmark buttons on a web browser toolbar. A web browser stores the number of times it is used to navigate to a website. On navigating to a website a...
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8402345 |
Methods and apparatus for providing multilevel coset coding and probabilistic error correction
Systems and methods are provided for performing multilevel coset coding and probabilistic error correction. Multiple bit data is encoded in a memory by combining one of the bit positions of...
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8397146 |
Device for and method of identifying minimum candidate codewords for list decoder
A device and method of determining candidates to decode by receiving a message, selecting m, identifying m voltages in message near zero volts, generating binary version of message, generating...
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8397123 |
Recursive realization of polynomial permutation interleaving
Systems and methodologies are described that facilitate automatically generating interleaved addresses during turbo decoding. An efficient recursive technique can be employed in which layers of...
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8397140 |
Error correction coding for recovering multiple packets in a group view of limited bandwidth
Coded video data may be transmitted between an encoder and a decoder using multiple FEC codes and/or packets for error detection and correction. Only a subset of the FEC packets need be transmitted...
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8392793 |
Code design and implementation improvements for low density parity check codes for multiple-input multiple-output channels
Methods include configuring M parallel accumulation engines, accumulating a first information bit at a first set of specific parity bit addresses using the accumulation engines, increasing a parity...
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8386889 |
Drive replacement techniques for RAID systems
A control module includes an encoder module, which generates a first code word for multiple drives. A detector module, in response to detecting an error in a first drive subsequent to generation of...
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8386877 |
Communication system, transmitter, error correcting code retransmitting method, and communication program
Intended is to achieve, in a wide range of an SN ratio, throughput on the same order of that attained by a method based on puncturing and improve computational complexity of decoding processing at...
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8386908 |
Data transmission methods and universal serial bus host controllers utilizing the same
A data transmission method for a universal serial bus (USB) host controller is provided. First, input data is received. A cyclic redundancy check (CRC) result of the input data is calculated, and,...
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8381081 |
Data loss protection switch system and method
Systems and methods for data loss protection are presented. In one embodiment, a data loss protection switch includes a first port, a second port, an error threshold management component and a...
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8381080 |
Reducing a degree of a polynomial in a polynomial division calculation
An apparatus generally having a lookup table and a circuit is disclosed. The lookup table may be configured to store a plurality of results including remainders of divisions by a particular...
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8381079 |
Simplified LDPC encoding for digital communications
Encoder circuitry for applying a low-density parity check (LDPC) code to information words is disclosed. The encoder circuitry takes advantage of a macro matrix arrangement of the LDPC parity check...
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8381083 |
Error control coding for single error correction and double error detection
An error correction coding is provided that generates P bits of check data from K M-bit words of payload data. The P bits of check data include an address field A, a bit error indicating field E...
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8381048 |
Transmission system, method and program
A transmitting apparatus generates and transmits 3t+1 or more number of codewords for a message and multiple faulty encoded message identifying data, wherein the information regarding the message...
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8370727 |
Method and circuit for decoding an error correction code
The invention provides a method for decoding an error correction code. First, an error syndrome of the error correction code is calculated. A plurality of coefficients of an error locator...
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8370722 |
Apparatus and method for automatic configuration of lighting controllers
A lighting system controller is provided that is configured to automatically synchronize a lighting controller with a centralized configuration. In a particular example, this automatic...
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8365055 |
High performance cache directory error correction code
Defining a set of correctable error and uncorrectable error syndrome code points, generating an error correction code (ECC) syndrome decode, regarding the uncorrectable error syndrome code points...
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8365038 |
Method of determining a coordinate value with respect to patterns printed on a document
A method is disclosed of determining a coordinate value with respect to patterns printed on a document. Each pattern represents a sequence, with each sequence consisting of a repeating codeword of...
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8365043 |
Efficient redundant memory unit array
A method of storing data is disclosed. A set of data blocks, including a plurality of proper subsets of data blocks, is stored. A plurality of first-level parity blocks is generated, wherein each...
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8365052 |
Encoding device for error correction, encoding method for error correction and encoding program for error correction
The present invention aims at providing an encoding device for error correction, encoding method for error correction and encoding program for error correction wherein countermeasures against...
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8352847 |
Matrix vector multiplication for error-correction encoding and the like
In one embodiment, a matrix-vector multiplication (MVM) component generates a product vector based on (i) an input matrix and (ii) an input vector. The MVM component has a permuter, memory, and an...
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8352830 |
Extraction of values from partially-corrupted data packets
In one embodiment, a method for processing data packets having a payload and a checksum, wherein the payload has a first portion of interest. If a received data packet fails a CRC check, then it is...
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8352842 |
Determining contribution of burst noise to data errors
A method for determining a contribution of burst noise to a bit error rate in a digital system for reception of an interleaved forward error correction-enabled digital symbol stream is described....
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8347190 |
Systematic encoder with arbitrary parity positions
An encoder structure for an error correcting code with arbitrary parity positions is presented. The invention is effective for all error correcting codes whose parity check matrix is of the...
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8347186 |
Method and system for error correction in transmitting data using low complexity systematic encoder
A systematic encoder such as a systematic polar encoder for channel encoding to ameliorate the effects of noise in a transmission channel. The codeword carries a data word to be transmitted...
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8341509 |
Forward error correction (FEC) scheme for communications
Forward error correction (FEC) scheme for communications. Appropriate selection/arrangement of bits of an information bit sequence undergo one or more types of subsequent encoding to generate a...
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8335973 |
Processing module, error correction decoding circuit, and processing method for error locator polynomial
A Euclid processing module for obtaining an error locator polynomial of a binary BCH code in an error correction decoding circuit, in which error corrections of words are performed, includes...
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8332730 |
Data processing arrangements for use in data communication apparatus in connection with error correction
A processing arrangement of a data communication apparatus is arranged to derive an ordered plurality of modulo-2 summations of respective selections of data bits of a binary data set. The data...
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8332715 |
Test pattern generating method, device, and program
A test pattern generating device generates a test pattern with respect to a semiconductor circuit having first and second common circuits and a non-common circuit, wherein each of the common...
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8327237 |
Multi-layer cyclic redundancy check code in wireless communication system
A wireless communication device includes a transmitter configured to transmit a transport block with a sequence of bits wherein A is the number of bits, a first CRC coder configured to generate a...
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8327236 |
Error judging circuit and shared memory system
An error judging circuit includes a first EOR circuit tree that generates a check bit of a correction code by polynomial remainder calculation with respect to a polynomial expression of an original...
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8321768 |
Method and system for calculating CRC
In a method and system for calculating CRC, a Partial CRC is first calculated directly according to a segment of a message. Then, a First Code including the Partial CRC appended with a plurality of...
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8312355 |
Integrated circuit to encode data
An integrated circuit configurable to encode data according to a number of coding schemes and to generate cyclic redundancy codes, includes a number of identical specific hardware cells, and each...
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8312356 |
Systems, methods and computer program products including features for coding and/or recovering data
Systems and methods are disclosed for processing data. In one exemplary implementation, there is provided a method of generating H output data from W data input streams produced from input data....
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8307266 |
Chained checksum error correction mechanism to improve TCP performance over network with wireless links
Data communication, with improved error detection, of a signal having a plurality of data blocks, by: error checking a received data block in a first sequence using a first polynomial, beginning...
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