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7107508 Manufacturing test for a fault tolerant magnetoresistive solid-state storage device  
A fault-tolerant magnetoresistive solid-state storage device (MRAM) in use performs error correction coding and decoding of stored information, to tolerate physical failures. At manufacture, the...
7103826 Memory system and controller for same  
The present invention is broadly directed to a memory system comprising a a host integrated circuit component, at least two data memories, at least one parity memory for storing parity information...
7100097 Detection of bit errors in maskable content addressable memories  
Parity and mask bit(s) are stored in a random access memory (RAM) that is coupled to a CAM. This CAM may be part of a TLB. The parity and mask bits(s) are stored in conjunction with the CAM entry...
RE39253 Apparatus and method for error correction  
Apparatus for recording and/or reproducing user data recorded on a record medium. The apparatus includes record encoder for converting original user data into encoded user data of a predetermined...
7096406 Memory controller for multilevel cell memory  
A N-level cell memory controlled by the memory controller of the invention have an internal configuration in which the plurality of data input/output terminals connected to the second data bus are...
7093158 Data redundancy in a hot pluggable, large symmetric multi-processor system  
A computer system includes a plurality of field replaceable units, each having volatile memory and at least one CPU. The FRUs communicate with each other via centralized logic. A RAID data fault...
7085989 Optimized testing of bit fields  
A method for comparing bit field contents for bit fields comprising less than a full complement of the source is provided. The method includes creating a mask covering the bit field in the source,...
7080309 Multiple ECC schemes to improve bandwidth  
A method and an apparatus are used to maximize available transmission bandwidth by using multiple error correcting code (ECC) schemes. A transaction between components in a computer system may...
7076722 Semiconductor memory device  
An ECC circuit ( 103 ) is located between I/O terminals ( 104 0 –104 7 ) and page buffers ( 102 0 –102 7 ). The ECC circuit ( 103 ) includes a coder configured to generate check bits (ECC) for...
7069494 Application of special ECC matrix for solving stuck bit faults in an ECC protected mechanism  
A method of correcting an error in an ECC protected mechanism of a computer system, such as a cache or system bus, by applying data with a number of bits N to an error correction code (ECC) matrix...
7065694 Adaptive runtime repairable entry register file  
Methods and apparatus are disclosed that provide for improved addressing of a register file in a computer system. The register file has one or more redundant words. A logical address in an...
7062332 Controller to be connected to a network via an IEEE 1394 serial bus  
If it becomes necessary to add, to a past device information list (past list), a record of device information of a target removed from a network, and if the number of records in the past list is...
7058877 Method and apparatus for providing error correction within a register file of a CPU  
A system that facilitates error correction within a register file in a central processing unit (CPU). During execution of an instruction by the CPU, the system retrieves a dataword and an...
7058980 Device and method for protecting memory data against illicit access  
An electronic device for storing protected data is disclosed. The electronic device includes memory protection logic operable to interface with memory, such as non-volatile ROM for storing...
7055087 Memory device for use in high-speed block pipelined Reed-Solomon decoder, method of accessing the memory device, and Reed-Solomon decoder having the memory device  
A random access memory (RAM) device for use in a high-speed pipelined Reed-Solomon decoder, a method of accessing the memory device, and a Reed-Solomon decoder having the memory device are...
7051264 Error correcting memory and method of operating same  
A memory device that uses error correction code (ECC) circuitry to improve the reliability of the memory device in view of single-bit errors caused by hard failure or soft error. A write buffer is...
7043679 Piggybacking of ECC corrections behind loads  
An apparatus including circuitry configured to detect and correct an ECC error in a non-targeted portion of a load access to a first data in a memory. An ECC error check circuit is configured to...
7036068 Error correction coding and decoding in a solid-state storage device  
A magnetoresistive solid-state storage device (MRAM) employs error correction coding (ECC) to form ECC encoded stored data. In a read operation, parametric values are obtained from storage cells ...
7032158 System and method for recognizing and configuring devices embedded on memory modules  
A method and system for identifying and configuring device-enhanced memory modules at system startup is described. A driver is described that performs a wakeup procedure at startup to identify...
7024613 Method and apparatus for implementing infiniband transmit queue  
A method, apparatus and computer program product are provided for implementing a transmit queue. A queue pair context memory is provided for storing a set of pointers for each queue pair. The set...
7020825 Data processor with serial transfer of control program  
A data processor that reduces the chip area of a semiconductor substrate. The data processor includes a detection circuit for generating an error detection code with digital data. A correction...
7010740 Data storage system having no-operation command  
A system wherein data is read from, and store in, a memory, such data having associated therewith an address/control portion. The system includes a pair of controller sections, one of such sections...
7000171 Recorded medium reproducing device and method, data output controlling method, data outputting method, error detecting method, and data outputting reproducing method  
A reproducing method for a record medium includes the steps of performing a demodulating process for data that have been read from a record medium on which content data have been recorded,...
6990622 Method for error correction decoding in an MRAM device (historical erasures)  
A magnetoresistive solid-state storage device (MRAM) employs error correction coding (ECC) to form ECC encoded stored data. ECC encoded data is read and decoded to identify failed symbols. A...
6986000 Interleaving apparatus and deinterleaving apparatus  
A signal record reproduction device 1 of the invention comprises a microcomputer 12 and a memory 17. A series of data blocks are divided into a plurality of items of element data. The element...
6981196 Data storage method for use in a magnetoresistive solid-state storage device  
A magnetoresistive solid-state storage device (MRAM) performs error correction coding (ECC) of stored information. Since currently available MRAM devices are subject to physical failures, data...
6980427 Removable media  
A server blade may comprise a processor. The server blade may additionally comprise a removable media interface device. The server blade can be configured as a field replaceable unit.
6978405 Memory device with comparison units to check functionality of addressed memory cells  
The memory device contains comparison units with which it is possible to check whether an address applied to the memory device is associated with a memory cell which cannot be properly written to...
6976204 Circuit and method for correcting erroneous data in memory for pipelined reads  
A circuit and method for correcting erroneous data in memory for pipelined reads. A memory controller includes a control unit, a storage unit and an error detection and correction unit. The control...
6971051 System and method of recovering from soft memory errors  
Managing volatile storage of information, such as executable code within dynamic random access memory (DRAM) embedded within an application specific integrated circuit (ASIC), includes...
6968496 Optical disk with error detection code and optical disk apparatus  
An optical disk can detect reliable address data without the need of checking the validity of synchronous detection of segment numbers. The optical disk has one or more tracks, and address data is...
6961890 Dynamic variable-length error correction code  
Data storage media, such as silicon-based non-volatile memory, are configured according to a data structure containing a payload portion and a redundancy portion. A divider segregating the payload...
6961861 Globally clocked interfaces having reduced data path length  
A interface, which connects memory and an integrated circuit, having a write path and read path that allow synchronous data propagation is provided. Further, a method for synchronizing data...
6957377 Marking of and searching for initial defective blocks in semiconductor memory  
A method of marking an initial defective block in a semiconductor memory device having a memory area thereof divided into a plurality of blocks and provided with an ECC function includes the steps...
6941505 Data processing system and data processing method  
A data processing system ( 1 ) has an erasable and programmable non-volatile memory ( 5 ) and a central processing unit ( 2 ). The central processing unit allows only a specified partial storage...
6934903 Using microcode to correct ECC errors in a processor  
An apparatus may include an ECC check circuit configured to detect an ECC error in response to an access to first data in a memory and a microcode unit. The microcode unit is coupled to receive an...
6920005 Storage apparatus and read error recovery method thereof  
A storage apparatus provided with an error recovery procedure (ERP) and a read error recovery method in the storage apparatus. The read error recovery method, in which a plurality of error recovery...
6920592 System, method, and apparatus for detecting and recovering from false synchronization  
Presented herein are a system(s), method(s), and apparatus for detecting and recovering from false synchronization. False synchronization can be detected on the fly through either on an...
6915476 Redundancy semiconductor memory device with error correction code (ECC) circuits for correcting errors in recovery fuse data  
A semiconductor integrated circuit device includes a memory array having first to Nth banks, where N is an integer greater than or equal to 2. The memory array further includes a redundancy block...
6915475 Data integrity management for data storage systems  
A system and method for maintaining the integrity of data in a storage system. The method includes receiving a plurality of blocks of data having a predetermined multiple-block error detecting...
6912686 Apparatus and methods for detecting errors in data  
Mechanisms and techniques allow a data storage system to detect errors in data received for storage within the data storage system. To do so, the data storage system receives, from an originator...
6904556 Systems and methods which utilize parity sets  
A memory system and method of using same are provided. One embodiment of the system includes a semiconductor memory that is configured to include a multiplicity of memory segments. The memory...
6901551 Method and apparatus for protection of data utilizing CRC  
A dedicated hardware CRC computation engine is provided to assure the integrity of data transferred between the system memory and storage devices. The CRC computation engine provides CRC...
6891831 Data transmission method  
The invention is related to coding and decoding data, more particularly in microwave radio link systems. According to the invention, the sequence of data to be encoded at a transmitting end is...
6874116 Masking error detection/correction latency in multilevel cache transfers  
A method, and a corresponding apparatus, mask error detection and correction latency during multilevel cache transfers. The method includes the steps of transferring error protection encoded data...
6868516 Method for validating write data to a memory  
A method and system for checking the Cyclic Redundancy Cycle (CRC) of DATA, such DATA comprising a series of data words terminating in a CRC portion. The method includes: checking the CRC of the...
6859897 Range based detection of memory access  
Memory accesses in a data processing device ( 14 ) can be monitored by selecting, from among a plurality of available memory relationships ( 37, 82 ), a memory relationship relative to an address...
6854083 EEPROM memory including an error correction system  
An electrically erasable and programmable memory includes a memory array having memory cells connected to word lines and bit lines. The bit lines are arranged in columns. The memory also includes...
6851081 Semiconductor memory device having ECC type error recovery circuit  
A semiconductor memory device having an error check and correction (ECC) type error recovery circuit in which disposition of ECC cells is improved. The memory device comprises: a memory cell array...
6848071 Method and apparatus for updating an error-correcting code during a partial line store  
One embodiment of the present invention provides a system that updates an error-correcting code for a line when only a portion of the line is updated during a store operation. The system operates...
Matches 201 - 250 out of 538 < 1 2 3 4 5 6 7 8 9 10 11 >