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4646312 |
Error detection and correction system
An error detection and correction apparatus including a transmission bus for transmitting multi-bit data signals and multi-bit error correction code signals generated responsive to the multi-bit...
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4641310 |
Data processing system in which unreliable words in the memory are replaced by an unreliability indicator
A data processing system comprising a memory receives data in the form of data blocks. Such a data block contains at least one data word and check bits. On the basis of the check bits it is...
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4633471 |
Error detection and correction in an optical storage system
A self-checking shared encoder/decoder circuit for use with a Reed-Solomon coding scheme of an optical disk storage system. The optical disk system includes a drive adapted to permanently store...
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4621364 |
Circuit arrangement for recording the addresses of storage cells with erroneous content
To record the address of a storage cell that has contents that are erroneous with respect to the coding, a memory configuration, connected by means of a bus line system with a central control unit,...
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4604751 |
Error logging memory system for avoiding miscorrection of triple errors
Miscorrection of triple errors is avoided in a memory system equipped with a single bit error detection and correction/double bit error detection code by providing a double bit error logging...
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4569052 |
Coset code generator for computer memory protection
An apparatus for protecting computer memory utilizes a parity matrix to generate an n-k check bit signal of an extended linear (n,k,4) code from a k data bit signal. Exclusive-OR gates add the n-k...
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4562576 |
Data storage apparatus
Data storage apparatus consisting of an array of RAM chips, with Hamming code checking for detecting double-bit errors. Address signals are fanned-out to the chips by way of driver circuits. Each...
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4521872 |
Instruction storage
An instruction storage for storing microinstructions or macroinstructions is disclosed. Each instruction word includes error check and correction bits to enable error correction when an error is...
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4506362 |
Systematic memory error detection and correction apparatus and method
A systematic data memory error detection and correction apparatus periodically reads data from each addressable memory location, determines the presence or absence of an error in the addressed data...
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4464752 |
Multiple event hardened core memory
A computer system is provided for reconstructing a word, which is altered during cycling of the computer memory when a nuclear event occurs. The computer system includes a nuclear event detector, a...
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4455655 |
Real time fault tolerant error correction mechanism
The present invention provides a real-time fault-tolerant hardware error correction device which is typically implemented as a data transfer circuit between a disc memory and a processing unit. It...
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4410988 |
Out of cycle error correction apparatus
This relates to an apparatus and method for providing an accurate data group to the instruction buffer of a data processing system. The data group is simultaneously applied to the instruction...
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4404673 |
Error correcting network
An error correcting network adapted for encoding and decoding data transferred to and from a bubble memory has parallel linear encoder/decoder circuits. An error syndrome generated in response to a...
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4388684 |
Apparatus for deferring error detection of multibyte parity encoded data received from a plurality of input/output data sources
Apparatus is included in a main memory subsystem of a data processing system which receives multibyte data from a plurality of input/output devices connected to a common bus. During a write cycle...
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4384353 |
Method and means for internal error check in a digital memory
A semiconductor digital memory such as a charge coupled device is provided with error detection capability. Error logic responsive to a group of data on the input bus generates a first error code...
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4371949 |
Time-shared, multi-phase memory accessing system having automatically updatable error logging means
Automatically updatable error logging means incorporated in a multi-phase, bit addressable, variable field memory system. The memory system is partitioned into a plurality of individually...
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4363125 |
Memory readback check method and apparatus
A high speed readback check of data transferred to a cyclic memory before the data source is lost. The cyclic memory is organized into a number of data blocks, each interleaved with or...
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4335458 |
Memory incorporating error detection and correction
A memory in which each word location for a user word not only contains the bit locations for the actual data but also one parity bit for the parity over the entire word location and one correction...
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4282551 |
PCM Recording and reproducing apparatus
When error detection codes are added to a sampled signal word which is a digital version of audio information and a control signal which is a digital version of system control information to...
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4244049 |
Method and apparatus for enhancing I/O transfers in a named data processing system
In a named data processing system, user ownership and verfication of data records is secured by assigning an unique record name to each data record, providing error checking covering both the data...
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4225959 |
Tri-state bussing system
This relates to an apparatus and method for providing an accurate data group to the instruction buffer of a data processing system. The data group is simultaneously applied to the instruction...
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4204634 |
Storing partial words in memory
This specification describes transferring a partial block of data with first and last words that are partial words from a processor and storing it in a memory protected by an error correcting code...
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4112502 |
Conditional bypass of error correction for dual memory access time selection
A method of and an apparatus for conditionally bypassing the error correction function of a large scale integrated (LSI) semiconductor random access memory (RAM) is disclosed. A content addressable...
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3825893 |
MODULAR DISTRIBUTED ERROR DETECTION AND CORRECTION APPARATUS AND METHOD
Errors in code words fetched from memory or utilized in some other device are detected by apparatus distributed throughout the memory and then corrected. Illustratively, a 72-bit parallel code...
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3814922 |
AVAILABILITY AND DIAGNOSTIC APPARATUS FOR MEMORY MODULES
In a semiconductor memory module associated with a data processing unit, a maintenance status register and associated apparatus identity and store information relating to erros arising in the...
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3809884 |
APPARATUS AND METHOD FOR A VARIABLE MEMORY CYCLE IN A DATA PROCESSING UNIT
Apparatus and method for providing a variable memory cycle in a memory module connected to a data processing unit. The operation being performed in the memory module causes a clock to establish a...
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3742459 |
DATA PROCESSING METHOD AND APPARATUS ADAPTED TO SEQUENTIALLY PACK ERROR CORRECTING CHARACTERS INTO MEMORY LOCATIONS
A memory has a plurality of addressable locations each having a fixed number of bit storing devices. A data processor produces data units along with raw address information to point to memory...
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3701094 |
ERROR CONTROL ARRANGEMENT FOR INFORMATION COMPARISON
A data key word, encoded in a certain error correcting code, is read from a storage device, the information portions thereof are compared to a master key word, and the outcome of the comparison is...
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3700870 |
ERROR CONTROL ARRANGEMENT FOR ASSOCIATIVE INFORMATION STORAGE AND RETRIEVAL
Data key words, encoded in a certain error correcting code, are read from a storage device and compared with a similarly encoded master key word. If, for any pair of words compared, the pattern of...
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3697949 |
ERROR CORRECTION SYSTEM FOR USE WITH A ROTATIONAL SINGLE-ERROR CORRECTION, DOUBLE-ERROR DETECTION HAMMING CODE
The present invention relates to a highly-efficient system for performing single-error correction when utilized with a memory system including a memory equipped with error-detection circuitry for...
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3688265 |
ERROR-FREE DECODING FOR FAILURE-TOLERANT MEMORIES
A translator for a digital memory system which performs single error correction and double error detection (SEC/DED) upon the stored word in converting it into a parity-encoded form and in addition...
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3676851 |
INFORMATION RETRIEVAL SYSTEM AND METHOD
Information retrieval employing a search argument which is compared to a specified part of each of the stored data records that are searched. The search is conducted sequentially in the specified...
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3648239 |
SYSTEM FOR TRANSLATING TO AND FROM SINGLE ERROR CORRECTION-DOUBLE ERROR DETECTION HAMMING CODE AND BYTE PARITY CODE
An SEC/DED error detection and data translation mechanism is described. By the use of unique circuit design features, the same logical circuitry is capable of automatically taking Hamming encoded...
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3156897 |
Data processing system with look ahead feature
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3560942 |
Title is not available
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3562709 |
Title is not available
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3560924 |
Title is not available
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