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5428628 |
Modular implementation for a parallelized key equation solver for linear algebraic codes
Apparatus and method for implementing a parallelized algorithm for solving the key equation for the decoding of a linear algebraic code. Circuitry implements two computation sequences. One of these...
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5428629 |
Error check code recomputation method time independent of message length
In a data packet communications network capable of transmitting a digitally coded data packet message including an error-check code from a source node to a destination node over a selected...
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5426426 |
Tokens for use in data communications systems
A system for generating and substituting tokens for frequently used phrases within the information portion of messages comprises a central control terminal (140) and a selective call receiver...
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5414720 |
Device and method using second error correction code for data in a recording medium
A data reproduction device for reproducing a data recorded in a recording medium having a data area and an error correction area including only error correction code data. The areas are formed in...
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5325374 |
Predictive decoding device for correcting code errors
A decoding device used in a predictive coding method includes a replacement circuit for replacing a decoded value corresponding to an encoded code having an uncorrectable error with the decoded...
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5325372 |
Implementation of the HDLC CRC calculation
In accordance with the present invention, a multi-bit CRC character is created by generating a most significant bit (MSB) portion and a least significant bit (LSB) portion in parallel and then...
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5323402 |
Programmable systolic BCH decoder
A programmable decoder that provides both error and erasure decoding for all Reed-Solomon, primitive BCH, non-primitive BCH, and binary BCH codes of any rate over any field is disclosed. The user...
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5313474 |
Method and apparatus to determine the log of an element in GF(2.sup.m) with the help of a small adjustable size table
A system for determining the log of an element in Galois field GF(2 m ) using a small, selectable size table, a finite field multiplier, and a counter. The system allows for a flexible trade-off...
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5311547 |
Partial-response-channel precoding
Digital data is transmitted over partial-response channels using a precoding technique which allows for the use of a wide variety of transmit constellations. A sequence of signal points is selected...
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5307377 |
System for modulating/demodulating digital signals transmitted with encoded modulation
Encoding and decoding devices (5, 105) influencing digital signals transmitted with encoded modulation. For the encoding a channel encoder (12) performs a code concatenation to distribute the...
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5278866 |
Radio communication apparatus with stored coding/decoding procedures
A radio communication apparatus for transmitting and receiving a digital signal using a radio line which includes a memory means for storing a plurality of signal procedures in which each procedure...
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5265104 |
Data storage system including redundant storage devices
A data storage system including k data drives and n-k redundant drives performs a write operation to a designated sector on a data drive by (i) retrieving from each of the other data drives the...
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5259003 |
Method of encoding two digital data signals
A method to encode two digital data signals is disclosed. Each of the digital signals is characterized by a bit stream. An N bit block from the first signal is mapped to a unique M bit third signal...
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5255288 |
Arrangement for converting binary input signal into corresponding in-phase and quadrature phase signals
In order to effectively reduce a memory size of each of two memories provided in an arrangement for converting a binary input data into the corresponding inphase and quadrature signals, a memory...
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5233629 |
Method and apparatus for communicating digital data using trellis coded QAM
Coded modulation schemes based on codes for QPSK modulation are directly incorporated into QAM based modulation systems, forming trellis coded QAM for communicating information. Concatenated coding...
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5222077 |
Radix mapping with variable number of symbols in mapping period
The present invention is directed toward a method and apparatus in a communications device for mapping a selected group of data bits into a predetermined number of two-dimensional symbols selected...
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5216676 |
BCH code decoder and method for decoding a BCH code
In a BCH code decoder for correcting a natural number N of error bits occurring in a code sequence composed of bits encoded by a BCH encoding method, and a method therefor, first to N-th syndromes...
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5212695 |
Error check or erro correction code coding device
An error check or correction code coding device is disclosed. In this device, when a main information code is transmitted after an error check or correction code is added thereto, a control code is...
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5200961 |
Error detection and/or correction device
N symbols of a code word inputted from a transmission line and constituting an error detection and/or correction code are divided into i symbol groups, i coefficient groups are generated by...
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5177746 |
Error correction circuit using a design based on a neural network model
An error correction circuit is provided which uses NMOS and PMOS synapses to form neural network type responses to a coded multi-bit input. Use of MOS technology logic in error correction circuits...
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5155734 |
Error correcting device
There is provided an error correcting device for correcting errors of a received message in accordance with a processing program including a plurality of error correcting processes for correcting...
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RE34088 |
On-the-fly error correction
On-the-fly error correction is provided by using the remainder from division of the encoded codeword by its generator polynomial to look up error values and locations in a memory. Alternatively,...
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5131011 |
Receiver for data transmission system with nonlinearities
Non-linear intersymbol interference and noise in a received data signal are corrected through use of a Viterbi detector which estimates the most likely sequence of transmitted data symbols by...
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5115453 |
Technique for designing a multidimensional signaling scheme
In a system where a signal constellation is used for data communications, signal points in the signal constellation are selected to represent incoming data. The signal points, thus selected, are...
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5040179 |
High data rate BCH encoder
An encoder for selected linear error correcting codes, such as a BCH code, uses relatively low-speed circuitry to generate parities for correcting the code. A parity matrix derived from the BCH...
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5031181 |
Error correction processing apparatus
An error correcting apparatus including a circuit for detecting error correcting modes of incoming digital information, a generator for generating a first set of syndromes for a first error...
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5010554 |
Error correction method and apparatus
For forward error correction, the least significant bit of each multibit symbol is encoded before transmission according to a block code that has an over-all parity bit. Since even syndromes can be...
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4958349 |
High data rate BCH decoder
A decoder for selected linear error correcting codes, such as a BCH code, uses relatively low-speed circuitry to determine syndromes and corresponding error locations for correcting the code. In a...
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4914660 |
Method and apparatus for decoding error correcting code
A received signal train V(X) having a code length of 19 bits, in which an error correcting code is added on the basis of a generator polynominal G(X) of degree 11, is converted into a signal train...
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4901318 |
Address generating circuit
An address generating circuit (13) generates a reading address for reading a buffer memory (16) so that so-called P and Q codes for a CD-ROM which have parameters i and j can be decoded. The...
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4899340 |
Error correcting code and error correcting circuit using the same
An improved error correcting circuit that is adapted for correcting errors in data to be transmitted over communication links which require a minimum density of 1's to preserve timing on the...
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4893312 |
Compact, real time tape drive system
A nine track digital tape system operating in accordance with a feedback shift register redundancy scheme, includes in both the encoding and writing section and in the reading and error correction...
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4856004 |
Microprocessor based BCH decoder
A microprocessor based system which implements BCH decoder algorithms in a sufficiently efficient manner to allow real time BCH decoding of a BCH(255,131) code is disclosed. Table lookup operations...
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4839896 |
Fast remainder decoding for a Reed-Solomon code
Apparatus and methods are disclosed for providing fast decoding of Reed-Solomon and related codes. Cases of one and two data symbol errors are decoded directly from the remainder using a large...
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4835772 |
Probabilistic fade forecasting
A block of helically interleaved codewords is received in a de-interleaving array. A succession of codewords obtained from the de-interleaving array are decoded in a process in which each error...
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4763331 |
Method for decoding error correcting block codes
A soft decision decoding method which decodes a code having redundant bits added to information data bits and transmitted as an error correcting code and in which the received code is decoded bit...
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4683571 |
Digital signal decoding system
A digital signal decoding system comprises a terminal for receiving a digital signal through a transmission path, which digital signal is encoded so that an error in one bit can be corrected in...
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4675869 |
Fast decoder and encoder for Reed-Solomon codes and recording/playback apparatus having such an encoder/decoder
A decoding device for code words which are protected against the occurrence of several symbol errors per code word by means of a Reed-Solomon code is provided with a word buffer which comprises a...
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4644543 |
Forward error correction hardware for a data adaptor
An apparatus and a method is disclosed for correcting on-line error corrections in the digital transmission of voice or data utilizing forward error correction technique which avoids on-line...
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4644545 |
Digital encoding and decoding apparatus
Digital encoding and decoding apparatus for encoding data codes to produce disk codes and decoding disk codes to produce data codes. In the encoding and decoding operations performed by the...
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4623999 |
Look-up table encoder for linear block codes
An efficient look-up table encoder for encoding k bit information words with linear error correcting block codes is provided comprising a plurality of read-only memories having 2 x s , 2 x s , . ....
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4599722 |
Apparatus for encoding and decoding digital data to permit error correction
Apparatus to permit the correction of a single bit error occurring in a sequence of data packets (e.g. bytes) comprising data bits. An encoder produces an error correction packet (e.g. byte), the...
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4567594 |
Reed-Solomon error detecting and correcting system employing pipelined processors
Apparatus and methods are disclosed for providing on-line error detection and correction of errors in an optical disk storage system using Reed-Solomon decoding techniques. An implementation is...
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4564944 |
Error correcting scheme
A method and an apparatus are disclosed for converting error syndromes of an error-correcting code to pointers which identify the positions of the erroneous bits. Each syndrome is converted by a...
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4509172 |
Double error correction - triple error detection code
A code is generated using BCH coding theory which corrects double bit failures and detects triple failures and packaging errors. The code is a shortened code in which both data and check bit...
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4473902 |
Error correcting code processing system
A high speed code processing system for error correcting code is disclosed. It uses bit parallel residue generation for cyclic codes. This minimizes the time delay for cyclic code processing....
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4468769 |
Error correcting system for correcting two or three simultaneous errors in a code
An improved two or three error correcting system for BCH code (Bose, Chaudhuri, Hocquenghem code) has been found. In case of a two error correction system, a first syndrome A 1 and a second...
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4360916 |
Method and apparatus for providing for two bits-error detection and correction
A method and apparatus for detecting errors in a data word and for correcting up to two error bits therein through using Bose-Chaudhuri-Hocquenghem (BCH) codes. A Galois field table is arranged in...
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4355391 |
Apparatus and method of error detection and/or correction in a data set
Matrix multiplication is used to generate error detection and/or correction binary code bits from a binary input word. A matrix made up of columns and rows of bits set to binary "1"s and "0"s in a...
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4271517 |
Circuit arrangement for the formation of check bits for binary data
The invention relates to a circuit arrangement for coding or decoding comprising apparatus for forming check bits with the use of a linear code. The coding should be capable of adaptation to a...
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