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8942109 Impairment simulation for network communication to enable voice quality degradation estimation  
An automated method for testing audio signal quality of cell phone transmissions provides a Mean Opinion Score (MOS) output using inexpensive test components. The test system uses a server...
8930760 Validating cache coherency protocol within a processor  
A mechanism is provided for effectively validating cache coherency within a processor. For each node in a set of nodes, responsive to a node in a set of nodes being a controlling node, at least...
8923442 Reference voltage generation in a single-ended receiver  
As single-ended signaling is implemented in higher-speed communications, accurate and consistent reading of the data signal becomes increasingly challenging. In particular, single-ended links can...
8904247 Test pattern generation apparatus, test program generation apparatus, generation method, program, and test apparatus  
A test pattern generating apparatus that generates a test pattern to be communicated with a device under test having a plurality of terminals, the test pattern generating apparatus comprising a...
8892949 Effective validation of execution units within a processor  
A mechanism is provided for effectively validating execution units within a processor. A branch test pattern is generated for execution by an execution unit that is under validation testing. An...
8850266 Effective validation of execution units within a processor  
A mechanism is provided for effectively validating execution units within a processor. A branch test pattern is generated for execution by an execution unit that is under validation testing. An...
8843797 Signature compression register instability isolation and stable signature mask generation for testing VLSI chips  
A method for detecting unstable signatures when testing a VLSI chip that includes adding to an LFSR one or more save and restore registers for storing an initial seed consisting of 0s and 1s;...
8812918 Method and apparatus for evaluating and optimizing a signaling system  
A method and apparatus for evaluating and optimizing a signaling system is described. A pattern of test information is generated in a transmit circuit of the system and is transmitted to a receive...
8812919 Method and apparatus for evaluating and optimizing a signaling system  
A method and apparatus for evaluating and optimizing a signaling system is described. A pattern of test information is generated in a transmit circuit of the system and is transmitted to a receive...
8793547 3D built-in self-test scheme for 3D assembly defect detection  
Techniques and mechanisms are provided for an improved built in self-test (BIST) mechanism for 3D assembly defect detection. According to an embodiment of the present disclosure, the described...
8782475 PRBS test memory interface considering DDR burst operation  
A method of testing an interconnect between an electronic component and an external memory comprises receiving a data word having data bits and translating the data word into multiple cycles. The...
8775881 Embedded processor  
Electronic apparatus, systems, and methods of operating and constructing the electronic apparatus and/or systems include an embedded processor disposed in a logic chip to direct, among other...
8756469 Method and apparatus for evaluating and optimizing a signaling system  
A method and apparatus for evaluating and optimizing a signaling system is described. A pattern of test information is generated in a transmit circuit of the system and is transmitted to a receive...
8743638 Method and circuit for testing a multi-chip package  
A method and circuit for testing a multi-chip package is provided. The multi-chip package includes at least a memory chip, and the memory chip includes a number of memory cells. The method...
8654790 Method of remote active testing of a device or network  
A test device includes a packet input receiver for receiving encapsulated packets from a network; a packet reader for extracting timing information from the encapsulated packets, and for...
8644434 Apparatus and methods for performing sequence detection  
An apparatus for performing sequence detection on a stream of incoming bits comprises a memory and circuitry coupled to the memory. The circuitry is operative, for each bit of the stream of...
8619589 System and method for removing test packets  
Embodiments of the invention include a system for preventing a packet of a test pattern from being communicated over a network. In one embodiment, a communications management system is disclosed...
8619599 Packet processor verification methods and systems  
Methods and systems for implementing self-testing of packet processing devices are disclosed. For example, a packet-processing device can include a plurality of ports having a receive media access...
8607103 Transmission/reception device, transmission device, reception device, and data transmission/reception method  
A transmission/reception device includes a transmission device that divides a plurality of connection lines into a plurality of groups, determines corresponding connection lines in the plurality...
8578221 Method and system for measuring bit error rate and block error rate of device under test  
A method is provided for determining a measure of error of a device under test (DUT). The method includes storing baseband data received from the DUT in a storage device, segmenting the baseband...
8565428 Network device and network connecting method for building up network connection via high definition multimedia interface  
A network device for building up a network connection via a high-definition multimedia interface, includes a scrambler, a descrambler, a comparator and a control unit. The scrambler is utilized...
8522099 Embedded processor  
Electronic apparatus, systems, and methods of operating and constructing the electronic apparatus and/or systems include an embedded processor disposed in a logic chip to direct, among other...
8489944 Disabling outbound drivers for a last memory buffer on a memory channel  
Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having a plurality of bit lanes, a memory...
8464107 Surrogate circuit for testing an interface  
A semiconductor die includes interface logic for performing a function on an external device, and a surrogate circuit in communication with the interface logic. The interface logic facilitates...
8443243 Semiconductor integrated circuit device and method for evaluating an eye-opening margin  
An eye-opening margin measurement method for a high-speed serial data reception circuit which uses a circuit for eye-opening margin measurement involving operation of a clock data recovery circuit...
8432178 Testing device and method thereof  
A testing device for testing a board managing controller (BMC) of a computer motherboard including a power supply, a BMC, and a warning unit, includes a storing module, a voltage adjusting module,...
8418004 Back channel communication  
Various embodiments are described for back channel communication. One embodiment is a method that comprises receiving data at customer premises equipment (CPE), determining at least one error in...
8413117 Systems and methods for focusing product testing based on areas of change within the product between product builds  
A computer-implemented method for focusing product testing based on areas of change within the product is described. A link between resource files of a product and test cases associated with the...
8392767 Data channel test apparatus and method thereof  
A system includes a plurality of devices that are connected in series and a controller that communicates with the devices. Each of the devices has a plurality of input ports and corresponding...
8381048 Transmission system, method and program  
A transmitting apparatus generates and transmits 3t+1 or more number of codewords for a message and multiple faulty encoded message identifying data, wherein the information regarding the message...
8370787 Testing security of mapping functions  
Methods, apparatuses and articles for testing security of a mapping function—such as a Physically Unclonable Function (PUF)—of an integrated circuit (IC) are disclosed. In various embodiments, one...
8352810 Fault detection using embedded watermarks  
Detection of faults in a transmitted signal stream occurs by recovering, from the information stream, a water mark embedded in the stream prior to transmission. The embedded watermark has data...
8351286 Test method for screening manufacturing defects in a memory array  
A method of screening manufacturing defects at a memory array may include programming a background pattern of physically inverse data along conductive lines extending in a first direction. The...
8341508 System for sending signals between modules  
A system for transmission of signals between modules wherein, for example, it is possible to transmit reliably, between modules, information relating to, for example, the actuation of safety...
8331470 Communication system  
A communication system that performs encoding and decoding for communication includes a transmitting apparatus and a receiving apparatus. The transmitting apparatus includes a turbo encoding unit...
8327196 Identifying an optimized test bit pattern for analyzing electrical communications channel topologies  
Identifying an optimized test bit pattern for analyzing electrical communications channel topologies, including: ranking according to channel quality, from worst to best, a set of channel...
8321736 Transmission system, transmission method and communication device  
A transmission method for transmitting information between a transmission device and a reception device, the method includes determining whether or not an error is detected in information from the...
8321733 Optimization of SERDES sampling parameters  
One or more modules configured to cause a network diagnostic component to perform the following: an act of selecting first specific sampling parameters at which the SERDES is to receive network...
8286039 Disabling outbound drivers for a last memory buffer on a memory channel  
Memory apparatus and methods utilizing multiple bit lanes may redirect one or more signals on the bit lanes. A memory agent may include a redrive circuit having a plurality of bit lanes, a memory...
8228385 Apparatus for determining information in order to temporally align two information signals  
An apparatus for determining information in order to temporally align first and second information signals, each including one or several information values for successive sampling times, the...
8214706 Method and apparatus for testing an electronic circuit integrated with a semiconductor device  
A semiconductor device including an electronic circuit, a memory, and an error detecting module. The electronic circuit is configured to receive an input signal having been generated by a test...
8209571 Valid-transmission verifying circuit and a semiconductor device including the same  
A valid-transmission verifying circuit and a semiconductor device including the same are provided. The valid-transmission verifying circuit provides data to an output circuit in correspondence...
8191033 In situ clock jitter measurement  
Embodiments of the present invention provide a method/apparatus to measure the jitter of a timing signal used in an integrated circuit chip. The method/apparatus is used to send data from a launch...
8184164 Method for measuring multimedia video communication quality  
A method for measuring multimedia communication quality is disclosed. The multimedia video communication quality may be objectively reflected through the embedment and extraction of digital...
8176371 Embedded processor  
Electronic apparatus, systems, and methods of operating and constructing the electronic apparatus and/or systems include an embedded processor disposed in a logic chip to direct, among other...
8171354 Communication system and method for controlling the same  
For an error rate QBER, threshold values are preset, including a threshold value Qbit for frame synchronization processing, a threshold value Qphase for phase correction processing, and a...
8145967 System and method for verifying the receive path of an input/output component  
A system and method for verifying the receive path of an input/output device such as a network interface circuit. The device's operation with various different input sources (e.g., networks) and...
8127190 Sampling a device bus  
A method for preparing tapped data for analysis. The data on a bus is sampled and latched at a certain rate to produce raw data. The raw data is then decoded by a pod that is configured for the...
8116363 Method of determining true error vector magnitude in a wireless LAN  
Systematic transmit IQ phase and amplitude imbalances in the transmit chain of a wireless local area network (WLAN) cause a corresponding systematic shift in the roots of a constellation diagram....
8095912 Testing a context-free language compiler  
Systems and methods for testing a context-free language compiler. Given a description of a context-free grammar including a set of production rules, a test component applies the grammar...

Matches 1 - 50 out of 372 1 2 3 4 5 6 7 8 >