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7631229 |
Selective bit error detection at a bus device
In one aspect, a data transmission rate of a message signal representing a bus message at a bus and a propagation delay between an occurrence of the message signal at a transmission output to the...
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7631228 |
Using bit errors from memory to alter memory command stream
A system, method, and memory controller are provided that alters a memory command stream to a hardware memory. Data is written to the hardware memory and, after the data is stored in the memory,...
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7624332 |
Method for processing noise interference in data accessing device with serial advanced technology attachment interface
A method for processing noise interference in a serial AT Attachment (SATA) interface. In the method, when a receiver does not receive a SOF primitive (start of frame primitive) but does receive an...
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7620860 |
System and method of dynamically mapping out faulty memory areas
An information handling system is disclosed and can include a processor and a memory coupled to the processor. Further, the system can include a system reserved area that is accessible to the...
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7617424 |
Error monitoring for serial links
Methods, apparatuses and systems for physical link error data capture and analysis.
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7613978 |
Method and an apparatus for a quick retransmission of signals in a communication system
A method and an apparatus for quick retransmission of signals in a communication system are disclosed. A transmitting terminal, e.g., a base station, transmits signals in a form of packets to a...
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7613974 |
Fault detection method and apparatus
This invention relates to fault detection in electrical circuits. The invention provides a method and apparatus for testing an input circuit by generating a periodic test signal having a...
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7613959 |
Data receiving apparatus of a PCI express device
A data receiving apparatus of a PCI Express system includes a receiving device, an 8B10B decoder, a forged packet removing device, and a descrambling circuit. The forged packet removing device...
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7610520 |
Digital data signal testing using arbitrary test signal
For testing a digital data signal, a value derived from the digital data signal at a sampling point is compared against a corresponding value of an arbitrary test signal. The comparison is...
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7607053 |
Method and device for calculating bit error rate of received signal
System and method of estimating radio channel bit error rate (BER) in a digital radio telecommunications system wherein the soft output of the turbo decoder is used as pointer or index to...
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7606487 |
Distortion measurement in optical communication systems
The distortion component of an optical signal received from an optical transmission system, such as an all-optical system, subject to noise and amplitude distortion components, can be evaluated by...
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7603591 |
Apparatus selectively adopting different determining criteria in erasure marking procedure when performing decoding process, and method thereof
A method and a related apparatus that decode an input signal to generate an output signal. The method includes determining burst noise locations corresponding to the input signal and generating a...
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7587662 |
Detection of noise within an operating frequency on a network
Noise is detected within an operating frequency of a communication medium. Messages are monitored on the communication medium for corrupted messages. A noise detected signal is generated when a...
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7584410 |
Frequency error detector and combiner in receiving end of mobile communication system
Disclosed is a frequency error detector and combiner at a receiving end of a mobile communication system. The frequency error detector and combiner using a diversity operation at a reception end of...
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7584389 |
Turbo decoding apparatus and method
This invention relates to a turbo decoding apparatus and method for a communication system. A high-rate memory buffer operating at the same frequency as a turbo decoder is arranged between a memory...
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7571407 |
Semiconductor integrated circuit and method of testing delay thereof
A semiconductor integrated circuit comprises: a first area, formed on a semiconductor chip, which operates at a first predetermined voltage and a first predetermined frequency; a second area,...
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7571360 |
System and method for providing a clock and data recovery circuit with a fast bit error rate self test capability
A system and method is disclosed for providing a clock and data recovery circuit with a fast bit error rate self test capability. A bit error rate test control unit is provided that causes the...
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7564380 |
Systems and methods for storing test data and accessing test data
A system and a method for storing test data are provided. The system includes a memory device and a computer operably communicating with the memory device. The computer is configured to receive...
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7555685 |
Method and apparatus for monitoring bit-error rate
A test set for evaluating network performance is described, and which may include an output device, a processor, a power supply, a memory unit, and a control terminal. The test set may be...
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7552366 |
Jitter tolerance testing apparatus, systems, and methods
Apparatus, systems, methods, and articles may operate to move an output phase of a clock phase adjustment device associated with a master clock through a plurality of phase shifts relative to a...
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7549108 |
Methods and systems for secure control of system modes and sub-modes
Systems, methods and data structures are provided for representing robust data transmitted within a control system. The data structure includes at least two data fields identifying sub-modules and...
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7549094 |
Method for receiving data by a universal asynchronous receiver transmitter
The present invention discloses a method for receiving data by a universal asynchronous receiver transmitter, which includes a receive shift register (RSR), a receiver FIFO, a receiver buffer...
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7539928 |
Method and apparatus for decoding inner and outer codes in a mobile communication system
A method and apparatus for decoding inner and/or outer codes in a mobile communication system. The inner and/or outer codes are decoded at low power and high speed. An inner decoder performs...
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7519882 |
Intelligent binning for electrically repairable semiconductor chips
The present invention relates to a system and method for testing one or more semiconductor devices (e.g., packaged chips). Test equipment performs at least tests of a first type on the...
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7519874 |
Method and apparatus for bit error rate analysis
A method and apparatus for determining a bit error rate. The method comprises the steps of acquiring a data signal by an acquisition unit of a test instrument for a predetermined period of time,...
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7516374 |
Testing circuit and related method of injecting a time jitter
A testing method includes selecting a low-pass filter by simulation, generating testing signals with the low-pass filter receiving output signals of an under-test circuit, and outputting the...
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7516373 |
Method for testing the error ratio of a device using a preliminary probability
A method for testing the (Bit) Error Ratio BER of a device against a maximal allowable (Bit) Error Ratio BER limit with an early pass and/or early fail criterion, whereby the early pass and/or...
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7509542 |
System and method for testing the upstream channel of a cable network
A system and method for testing a portion of a cable network provides a pattern generator, addresser, forward error corrector, and comparator. The system and method is particularly adapted to...
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7509541 |
Detection mechanism
A computer apparatus includes a first integrated circuit (IC) and a second IC. The second IC includes a soft error rate (SER) immune component and a SER component to detect radiation that could...
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7506223 |
Method and system for sensing a shock in optical disk device
Disclosed is a method and system enabling to remove a noise effectively by establishing types of shocks that may occur possibly and by sensing a shock using the error corresponding to the shock....
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7500167 |
BER calculation device for calculating the BER during the decoding of an input signal
In a decoder, the BER is calculated during a decode operation of the decoder. Access to decoder components for obtaining signal data for use in calculating the BER is provided during the decode...
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7498961 |
Context identification using a denoised signal
Denoising such as discrete universal denoising (DUDE) that scans a noisy signal in an attempt to characterize probabilities of finding symbol values in a particular context in a clean signal can...
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7496804 |
Communications system, receiver, and method of estimating received signal quality by using bit error rate
There is provided a receiver comprising a processing unit, a communications unit for receiving frames including training sequence symbols or pilot symbols, the processing unit being configured to...
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7493530 |
Method and apparatus for detecting an error in a bit sequence
An error detector for a pseudo-random bit sequence (PRBS). A plurality of bits of a PRBS are received in a predictor circuit. A comparator compares two of the bits to predict a next bit in the...
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7493234 |
Monitoring and reporting normalized device system performance
Methods are provided to monitor and report performance data of a device such as a data storage drive. A plurality of quantitative values are obtained from feedback and measurement mechanisms in a...
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7490278 |
PCI express physical layer built-in self test architecture
A built-in self test circuit includes a first pattern generator, an elastic buffer receiver, a command symbol detector, a second pattern generator, and a logic unit. The architecture is capable of...
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7484160 |
Systems and methods for delineating a cell in a communications network
A method of performing cell delineation in a communications network is described. The method includes providing a data cell defined based on a communications protocol. The data cell forms at least...
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7484137 |
RAID system using regional error statistics for redundancy grouping
Geometrically-dependent error rates are used to identify sectors for XORing data in a RAID system for parity purposes in such a way that the probability of failure of any particular group is...
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7484136 |
Signal-to-noise ratio (SNR) determination in the time domain
A technique for modifying communication operational parameters using fast, low complexity, accurately calculated SNR values. Techniques may improve upon prior art by calculating SNR values in a...
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7475299 |
Method and system for real-time bit error ratio determination
A method and system for real-time bit error ratio determination is disclosed. According to one embodiment, a method is provided in which an operational link error rate of a link is determined and...
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7472320 |
Autonomous self-monitoring and corrective operation of an integrated circuit
Disclosed is a method and apparatus for autonomously self-monitoring and self-adjusting the operation of an integrated circuit device throughout the integrated circuit device's useful life. The...
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7472318 |
System and method for determining on-chip bit error rate (BER) in a communication system
A method and system for evaluating performance of a device by on-chip determination of BER may include establishing and generating PRBS test packets in a closed communication path internally within...
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7469366 |
Measurement of health statistics for a high-speed interface
Health of a high-speed interface link, such as a PCI Express link, is measured. In one embodiment, counter data representing data sent and errors occurring in a high-speed interface link is read....
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7467337 |
Semiconductor memory device
Disclosed is a semiconductor memory device capable of arbitrarily setting an upper limit of the number of error corrections during a test operation. The semiconductor memory device has a counter, a...
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7467336 |
Method and apparatus to measure and display data dependent eye diagrams
A method and apparatus to draw eye diagrams of multi-valued signals that remove non-data dependent effects is disclosed. An exemplary method includes collecting event counts at variable bit...
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7461317 |
System and method for aligning a quadrature encoder and establishing a decoder processing speed
A system and method are disclosed for determining the minimum required processing speed for a quadrature decoder using measurements of encoder performance, and to assess the safety factor of a...
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7454562 |
Performance information in digital storage memory module apparatus and method
A digital storage memory module ( 200 ) comprises a housing ( 201 ) having a first memory ( 202 ) and a second memory ( 205 ) disposed therein. In one embodiment the first memory comprises, for...
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7454514 |
Processing data with uncertain arrival time
A data communications architecture employing serializers and deserializers that reduces data communications latency. In an illustrative implementation, the data communications architecture...
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7451362 |
Method and system for onboard bit error rate (BER) estimation in a port bypass controller
Certain aspects of the method may comprise receiving via a first port of the port bypass controller, a data stream comprising at least one known bit pattern. Upon locking onto at least a portion of...
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7444490 |
Apparatus, system, and method for modifying memory voltage and performance based on a measure of memory device stress
An apparatus, system, and method are disclosed for modifying memory device timing and voltage. A detection module detects a change of memory device stress. A timing modification module modifies the...
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