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7100086 |
Microcomputer, electronic equipment and debugging system
An object is to provide a microcomputer, electronic instrument and debugging system which can realize an on-chip debugging function through a reduced size of instruction code or a reduced circuit...
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7094961 |
Musical instrument capable of diagnosing electronic and mechanical components and diagnostic system used therein
An automatic player piano includes an acoustic piano and an electronic system for reenacting a performance on the acoustic piano; a self-diagnosis subroutine program runs on a microprocessor of the...
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7096385 |
Method and system for testing a microprocessor
A method and system for testing a microprocessor. The method includes executing debug application software on an external device, downloading diagnostic program instructions from the external...
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7096386 |
Semiconductor integrated circuit having functional modules each including a built-in self testing circuit
A semiconductor integrated circuit that allows a self test of an integrated circuit built into a system to be conducted through a circuit structure on a smaller scale and achieves an improvement in...
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7093176 |
Programmable test for memories
A programmable built in self test, BIST, system for testing a memory, comprises an instruction register formed in the same chip as the memory; a circuit for loading the register by successive...
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7089451 |
Computer management system
A computer management system attains, through one line, the uniform and steady system management through an agent such as monitoring of fault and power control in a computer connected by LAN as...
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7088998 |
Method and product palette for testing electronic products
A product palette for carrying an electronics product on a production line for electronics products. The product palette includes a signal interface for establishing a signal connection between the...
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7089472 |
Method and circuit for testing a chip
A circuit for testing a chip. The chip has an intellectual product circuit module, and the circuit has a multiplexer controller, several registers and a MUX finite state machine controller to...
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7085971 |
ECC based system and method for repairing failed memory elements
An ECC based system and method within an integrated circuit memory for self-repair of a failed memory element is disclosed. The method includes processing, within the integrated circuit, data and...
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7085976 |
Method and apparatus for hardware co-simulation clocking
Method and apparatus for hardware co-simulation clocking is described. More particularly, single-step clocking is used to load one or more test vectors and to output test results from such test...
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7082550 |
Method and apparatus for mirroring units within a processor
A processor responsive to a clock cycle includes a base-unit, a mirror-unit that is a duplicate instance of the base-unit, a non-duplicate-unit in signal communication with the base and mirror...
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7082557 |
High speed serial interface test
A high speed, two-way serial interface with a scrambler and de-scrambler may be tested by sending a single word repeatedly through the scrambler to create a pseudo-random sequence. The...
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7080283 |
Simultaneous real-time trace and debug for multiple processing core systems on a chip
A system for providing simultaneous, real-time trace and debug of a multiple processing core system on a chip (SoC) is described. Coupled to each processing core is a debug output bus. Each debug...
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7080289 |
Tracing multiple data access instructions
A microprocessor integrated circuit 104 is provided with a trace controller 120 that is responsive to trace initiating conditions to trigger commencement of tracing operation and generation of...
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7079490 |
Integrated circuit with trace analyzer
An integrated circuit includes a trace analyzer to sample, process and store data carried along internal or external data path of the circuit. The trace analyzer may include a multiplexer, a...
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7076711 |
Automatic testing of microprocessor bus integrity
Integrated circuit bus integrity may be verified without specialized test equipment. In a diagnostic mode, the integrated circuit may output a series of predetermined activation patterns onto the...
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7076573 |
Method, apparatus, and program for detecting sequential and distributed path errors in MPIO
An error detection mechanism is provided for detecting sequential and distributed errors in a device I/O stream. The sensitivity of the errors is user definable. The result of the error detection...
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7076707 |
Methodology of locating faults of scan chains in logic integrated circuits
For a plurality of logic integrated circuits, initial value vectors associated with flip-flops are retrieved from each of corresponding scan chain sets. The initial value vectors of the same...
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7073094 |
Method and systems for programming and testing an embedded system
An embedded system comprising an embedded core, a non-volatile memory (e.g., a Flash memory or a ROM), and a volatile memory (e.g., RAM). The embedded core performs processing tasks for the...
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7065675 |
System and method for speeding up EJTAG block data transfers
A system and method for providing efficient block transfer operations through a test access port uses a Fastdata register. The Fastdata register, in part, emulates a pending process access bit...
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7065678 |
Microcomputer, electronic equipment, and debugging system
The present invention provides a microcomputer that makes it possible to implement a real-time trace on a mass-produced chip using few terminals, acquire trace information from within a specified...
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7065692 |
IC with external register present lead connected to instruction register
An integrated circuit carries an intellectual property core. The intellectual property core includes a test access port 39 with test data input leads 15 , test data output leads 13 , control...
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7062659 |
Apparatus for protecting code ROM data in code ROM test
Disclosed is a method and apparatus of a code read only memory (ROM) data capable of protecting code ROM data is easily read and plagiarized in field in case of testing a code ROM built-in a...
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7062540 |
System and method for remotely monitoring and managing applications across multiple domains
A system ( 10 ) for enabling remote monitoring and management of one or more applications ( 42 ) within a domain ( 30 ) includes one or more computers ( 40 ) that execute one or more applications (...
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7058856 |
Semiconductor circuit with flash ROM and improved security for the contents thereof
This invention provides a micro controller in which a JTAG (Joint Test Action Group) port becomes available through a specific operation even after a security bit is set. More specifically, an...
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7056752 |
Fabricating a die with test enable circuits between embedded cores
Timely testing of die on wafer reduces the cost to manufacture ICs. This disclosure describes a die test structure and process to reduce test time by adding test pads on the top surface of the die....
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7058536 |
Method and device for performing a functionality test of a technical device
A method for carrying out the functional test of a technical unit utilizes several steps. A test program is created by the selection and storage of control commands held in a data bank. The test...
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7055006 |
System and method for blocking cache use during debugging
A system includes at least one memory operable to store a first flag identifying whether a cache is disabled and a second flag identifying whether use of the cache is blocked. The system also...
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7055069 |
Spare input/output buffer
An integrated circuit (“IC”) package includes an input/output (“I/O”), a spare I/O circuit, and a resident IC for processing data. The I/O circuit is coupled with a plurality of external...
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7053470 |
Multi-chip package having repairable embedded memories on a system chip with an EEPROM chip storing repair information
A die with embedded memory is packaged together in a same dual-chip package with an EEPROM die. Defects in the embedded memory can be repaired using redundant rows or columns. A built-in self-test...
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7051239 |
Method and apparatus for efficiently implementing trace and/or logic analysis mechanisms on a processor chip
A system is disclosed in which an on-chip logic analyzer (OCLA) is included in an integrated circuit, such as a microprocessor. During debug modes, one or more sets of an on-chip cache memory are...
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7047443 |
Microcomputer, electronic equipment and debugging system
An object is to provide a microcomputer, electronic instrument and debugging system which can realize an on-chip debugging function through a reduced size of instruction code of a reduced circuit...
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7047462 |
Method and apparatus for providing JTAG functionality in a remote server management controller
The disclosed embodiments relate to the field of remote server management. More particularly, the embodiments relate to providing an embedded JTAG master in a remote server management controller....
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7047444 |
Address selection for testing of a microprocessor
A microprocessor with built-in test, comprising: a register for retaining a test address of a test program; a next address generation logic for generating a command address of a command scheduled...
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7039831 |
Common stack system for a debugging device and method
During debugging of target system by a host system, s single stack is used for an exception by a set of applications running on the processor of the target. To achieve this, the stack is...
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7039557 |
Device and method for the early recognition and prediction of unit damage
In a method and apparatus for early detection and prediction of damage to assemblies in machine plants, including mobile machine plants, structure-borne sound of the machine system is sensed by a...
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7035753 |
Method and apparatus for placing an integrated circuit into a default mode of operation
An integrated circuit having a signal bus carrying address signals includes mode selection means. The mode selection means has a default state and a non-default state. The integrated circuit is...
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7024346 |
Automatic ATAP test bench generator
A system is provided for automatically generating ATAP test solutions. The system includes ATAP simulation circuitry, a bus, an ATAP test bench file, an output file, and a test program. The ATAP...
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7020809 |
System and method for utilizing spare bandwidth to provide data integrity over a bus
A system and method for verifying integrity of data signals communicated from a data transmit device to a receive device over a communications channel of limited bandwidth. The method comprising...
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7020813 |
On chip debugging method of microcontrollers
A microcontroller includes an external interface terminal group, a data transmit/receive section, and a DMA controller comprised of an address register for storing therein an address of a hardware...
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7020806 |
Method for testing memory units to be tested and test device
The invention provides a method for testing a memory unit ( 113 ) to be tested in a test device ( 100 ), the memory unit ( 113 ) to be tested being introduced into the test device ( 100 ), a first...
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7017081 |
Methods and systems for remotely controlling a test access port of a target device
JTAG operations are carried out remotely over a network interface. The host processor includes a JTAG interpreter and a host side JTAG driver. A target device includes a target side JTAG driver....
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7010722 |
Embedded symmetric multiprocessor system debug
A test signal multiplexer receives supplies external test signals to a selected debug master central processing unit in a symmetrical multiprocessor system and debug slave signals to debug slave...
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7010736 |
Address sequencer within BIST (Built-in-Self-Test) system
An address sequencer is fabricated on a semiconductor substrate having flash memory cells fabricated thereon for sequencing through the flash memory cells during BIST (built-in-self-test) of the...
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7007196 |
Data storage system using 3-party hand-off protocol to facilitate failure recovery
A data storage system is disclosed in which a 3-party hand-off protocol is utilized to maintain a single coherent logical image. In particular, the functionality of the data storage system is...
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7007201 |
Shared embedded trace macrocell
An apparatus generally comprising a plurality of processors, a trace circuit, and a connector circuit. The trace circuit may be configured to present information at a port for debugging software in...
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7003698 |
Method and apparatus for transport of debug events between computer system components
Debug information is delivered over a general purpose interface. The debug information is delivered in packet format. These packets are referred to as Debug Event Packets (DEP). The debug event...
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7003699 |
Generation of trace signals within a data processing apparatus
The present invention provides a data processing apparatus and method for generating trace signals. The data processing apparatus comprises a component whose behaviour is to be traced, and a trace...
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7003763 |
Data processor
A data processor having a debugging aid function capable of monitoring a plurality of kinds of internal buses from the outside and identifying each of the buses monitored is provided. A central...
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7000148 |
Program-controlled unit
A program-controlled unit is described. The program-controlled unit has a central processing unit (CPU), peripheral units that are connected to the CPU via an internal bus, and debug resources that...
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