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7168004 |
Technique for testability of semiconductor integrated circuit
A technique for testability of a semiconductor integrated circuit is disclosed. In a first step, a fault simulation is conducted based on a predetermined test pattern to discriminate detectable...
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7159145 |
Built-in self test system and method
External test equipment is used to simulate an internal BIST test, thus enabling the capture or generation of detailed test results. By simulating the BIST test sequence in real time during the...
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7159143 |
Method for evaluating delay test quality
All untestable delay faults are hardly calculated. Thus, when the fault coverage of an test sequence for a delay fault is calculated, the fault coverage is not calculated without excluding the...
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7155351 |
Method for verifying the calculator core of a microprocessor or a microcontroller
A method for checking a microprocessor for correct operation, the microprocessor having a plurality of gates, each having a plurality of transistors, in which during the intended running of a...
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7155650 |
IC with separate scan paths and shift states
Plural scan test paths ( 401 ) are provided to reduce power consumed during testing such as combinational logic ( 101 ). A state machine ( 408 ) operates according to plural shift states ( 500 ) to...
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7152186 |
Cross-triggering of processing devices
A data processing apparatus controls cross-triggering of diagnostic processes on a plurality of processing devices. The data processing apparatus comprises a routing module having a plurality of...
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7149924 |
Apparatus, method, and system having a pin to activate the self-test and repair instructions
In general, various methods, apparatuses, and systems in which a processor that contains self test and repair instructions to be executed on a memory is coupled to a first external pin. Assertion...
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7149921 |
Apparatus, method, and system to allocate redundant components with subsets of the redundant components
In general, various methods, apparatuses, and systems are described in which logic executes, in series, a plurality of repair algorithms to generate a repair signature for a memory. The memory has...
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7149926 |
Configurable real-time trace port for embedded processors
An embedded processor having a programmable trace port that selectively limits the amount of trace information passed from the processor core to an output buffer, and selectively controls the rate...
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7149925 |
Peripheral component with high error protection for stored programmable controls
The invention relates to a peripheral component with high error protection for stored programmable controls. The invention relates particularly to an analog-input circuit with at least two channels...
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7149927 |
Use of SMBus to provide JTAG support
An emulator is provided on an electronic assembly that permits external logic to communicate with test logic on the electronic assembly over an electrical interface that has fewer signals than the...
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7149936 |
Interactive multimedia for remote diagnostics and maintenance of a multifunctional peripheral
An interactive multimedia system for remote diagnostics of, maintenance of, and assistance pertaining to a multifunction peripheral preferably includes a multifunction peripheral, a remote service...
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7149943 |
System for flexible embedded Boundary Scan testing
A flexible Boundary Scan test system is disclosed. The system includes an interpreter module operable to execute a program element selected from a plurality of program elements that include at...
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7146539 |
Systems and methods for testing a device-under-test
A method for testing a device-under-test (DUT) includes examining a test data file that includes test data for testing the structure, functionality and/or performance of the DUT. The method also...
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7146538 |
Bus interface module
A bus interface module (“BIM”) connectable to a debug bus is described. In one embodiment, the BIM comprises a plurality of BIM segments connected in a ring such that an output of each BIM is...
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7143312 |
Alignment of recovered clock with data signal
A recovered clock signal is aligned (“eye centered”) with a data signal from which it is recovered by intentionally varying one of the factors or parameters that causes misalignment. For...
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7143208 |
Communication device, host apparatus, and communication method
A method and apparatus for communicating data between a device and a host apparatus through a USB interface detects and corrects USB transaction phase deviation due to erroneous recognition of...
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7139947 |
Test access port
Briefly, descriptions of embodiments in accordance with the invention, a test access port for a multi-core processor.
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7139949 |
Test apparatus to facilitate building and testing complex computer products with contract manufacturers without proprietary information
Building and testing complex electronic products especially large scale computer systems are handled with control remaining with the owner of the design while a contract manufacturer does the basic...
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7136778 |
Method for non-invasive performance monitoring and tuning
A non-invasive method, system, and computer product for monitoring I/O performance without using the RIO bus. When executing a performance benchmark run in a remote I/O drawer, the system logs into...
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7137035 |
Load testing apparatus, computer readable recording medium for recording load test program, fault diagnosis apparatus, and computer readable recording medium for recording fault diagnosis program
In a load testing apparatus, before the load test, three processor elements are combined, without overage or shortage, with a source processor element and a destination processor element as one...
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7137085 |
Wafer level global bitmap characterization in integrated circuit technology development
A system and method for wafer level global bitmap characterization include determining chip level defect data bitmaps from a semiconductor wafer, and consolidating the chip level defect data...
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7135882 |
Semiconductor integrated circuit device and control method for the semiconductor integrated circuit device
It is intended to provide a semiconductor integrated circuit device permitting reading of information specific to chips within the mounted chips while restraining the increase in the total number...
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7137037 |
Data storage system and method for testing the same
A method for testing a data storage system. The data storage system contains a buffer area, firmware and a storage area. The method including: selecting at least one product testing item,...
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7133797 |
Method, apparatus, system, program and medium for inspecting a circuit board and an apparatus incorporating the circuit board
A method, apparatus, system, computer program and medium, for inspecting a wide variety of circuit boards. A controller generates test data and reference data according to characteristic...
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7134063 |
Apparatus and method for testing on-chip ROM
An apparatus for testing an on-chip ROM and a method thereof are provided. By embedding the on-chip ROM test apparatus in a semiconductor chip and externally providing only minimal information, the...
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7131031 |
System and method for on-line diagnosing of network interface cards
A system and method for on-line diagnosing a network interface card (NIC) includes a NIC configuration test module, a NIC communication test module and a test response generator. An information...
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7131033 |
Substrate configurable JTAG ID scheme
A circuit generally comprising a core circuit and a test access port circuit. The core circuit may be configurable among a plurality of functions in response to a signal. The test access port...
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7131034 |
On-chip measurement of signal state duration
A signal duration measurement system compares a known duration, T 1, of a test data signal with the duration, T 2, of a state of a signal under test. In one embodiment, if T 2 compares favorably...
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7127640 |
On-chip testing of embedded memories using Address Space Identifier bus in SPARC architectures
A system for on-chip testing of embedded memories using Address Space Identifier (ASI) bus in Scalable Processor ARChitecture (SPARC) microprocessors. An integrated circuit includes a plurality of...
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7124325 |
Method and apparatus for internally trimming output drivers and terminations in semiconductor devices
To trim interface devices on semiconductor devices, such as trimmable output drivers and terminations, a measurement current produced in the test apparatus is impressed onto the interface device,...
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7120069 |
Electronic circuit package
An electronic apparatus which includes a wiring substrate which includes wiring conductors, and a plurality of semiconductor bare chips that are formed on the wiring substrate. The semiconductor...
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7120831 |
In-circuit emulator system with changeable clock frequency
In an in-circuit emulator system, an in-circuit emulator debugger operated on a personal computer requests operation clock frequency, and transmits data for clock frequency designated by a user to...
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7117394 |
Built-in self-test circuit
A built-in self-test (BIST) circuit is configured to divide data output bits of a RAM macro into a plurality of groups each consisting of 2 bits, and provide a 1-bit comparator of a signature...
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7114101 |
Microcomputer, electronic equipment and debugging system
An object is to provide a microcomputer, electronic instrument and debugging system which can realize an on-chip debugging function through a reduced size of instruction code or a reduced circuit...
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7114103 |
System for finding and removing errors using a serial bus for a microcontroller
The present invention relates a system adapted to localize and remove software type errors comprising a microcontroller ( 10 ) and storing means ( 11 ), said microcontroller ( 10 ) being connected...
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7111199 |
Built-in debug feature for complex VLSI chip
An apparatus comprising (i) a first circuit configured to generate one or more node signals at one or more internal nodes and (ii) a second circuit configured to present one or more of the node...
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7111198 |
Multithread auto test method
A multithread auto test method is disclosed for the test process of computer hardware. According to the exclusion relation among the unique IDs of the test items, a multithread executable logic is...
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7107502 |
Diagnostic method for detection of multiple defects in a Level Sensitive Scan Design (LSSD)
Examiner's permission under MPEP §608.01(q) and 37 CFR §1.125(b) is requested to submit a substitute specification and abstract. The substitute specification corrects typographical errors,...
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7107570 |
Method and system for user-defined triggering logic in a hardware description language
A method and system for user-defined triggering logic in a hardware description language is described. The method includes reading a file containing user-defined triggering logic described in a...
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7107490 |
IML-stream generated error insertion / FRU isolation
The present invention relates to a method and system for testing error detection programs dedicated for detecting hardware failures in a computer system, in which error case patterns comprising...
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7107489 |
Method and apparatus for debugging a data processing system
A data processing system ( 10 ) includes a CPU ( 12 ) and debug circuitry ( 16 ). CPU ( 12 ) can execute instructions which provide direct input to one or more of trigger circuitry ( 32 ),...
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7107488 |
Electronic control unit including monitoring control circuit
A microprocessor 20 a controls an electrical load group 12 responsive to content of a non-volatile program memory 25 a and operation state of an input sensor group 11. A monitoring control...
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7100033 |
Controlling the timing of test modes in a multiple processor system
A system includes a first processor, a second processor and a circuit. The first processor includes a first terminal and enters a first test mode in response to the first terminal having a first...
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7100086 |
Microcomputer, electronic equipment and debugging system
An object is to provide a microcomputer, electronic instrument and debugging system which can realize an on-chip debugging function through a reduced size of instruction code or a reduced circuit...
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7094961 |
Musical instrument capable of diagnosing electronic and mechanical components and diagnostic system used therein
An automatic player piano includes an acoustic piano and an electronic system for reenacting a performance on the acoustic piano; a self-diagnosis subroutine program runs on a microprocessor of the...
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7096385 |
Method and system for testing a microprocessor
A method and system for testing a microprocessor. The method includes executing debug application software on an external device, downloading diagnostic program instructions from the external...
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7096386 |
Semiconductor integrated circuit having functional modules each including a built-in self testing circuit
A semiconductor integrated circuit that allows a self test of an integrated circuit built into a system to be conducted through a circuit structure on a smaller scale and achieves an improvement in...
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7093176 |
Programmable test for memories
A programmable built in self test, BIST, system for testing a memory, comprises an instruction register formed in the same chip as the memory; a circuit for loading the register by successive...
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7089451 |
Computer management system
A computer management system attains, through one line, the uniform and steady system management through an agent such as monitoring of fault and power control in a computer connected by LAN as...
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