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7240257 |
Memory test circuit and test system
A memory test circuit comprises a memory which outputs stored data through n-bit data output pins, and a built-in self test (BIST) unit. The BIST unit writes test data in the memory, and by...
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7240262 |
Scan-path circuit, logic circuit including the same, and method for testing integrated circuit
A scan-path circuit is made up of cascaded flip-flops which are input/output circuits of a combinational logic circuit. In a logic circuit 21 which adopts a scan design test technique for...
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7237161 |
Remote integrated circuit testing method and apparatus
A method and system for remotely testing an integrated circuit installed in an integrated circuit system is presented. The integrated circuit is equipped with test structures for testing functional...
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7237168 |
Design for test of analog module systems
An apparatus for testing an integrated circuit that includes analog nodes is disclosed. In one aspect, an integrated circuit comprises testing circuitry and core logic circuitry. A memory in the...
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7237149 |
Method and apparatus for qualifying debug operation using source information
A data processing system ( 10 ) has a system debug module ( 19 ) coupled to a processor ( 12 ) for performing system debug functions. Located within the system, and preferably within the processor,...
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7231551 |
Distributed tap controller
A system accessible by a test access port controller via a test access port interface includes a data register. The data register is selectable based on an instruction register signal in the test...
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7231503 |
Reconfiguring logical settings in a storage system
A storage system having multiple I/O interface ports is configured to detect a failed communication condition at a port. The storage system is configured to then attempt communication using a port...
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7231552 |
Method and apparatus for independent control of devices under test connected in parallel
A JTAG-compatible device includes a unique identifier stored in dedicated non-volatile memory, a test access port (TAP) controller, a TAP instruction register, a dedicated data register, and a...
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7231562 |
Memory module, test system and method for testing one or a plurality of memory modules
The invention relates to an integrated memory module having a memory unit and a self-test circuit, the self-test circuit being embodied in such a way as to make available test data and test...
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7228262 |
Semiconductor integrated circuit verification system
An aspect of the present invention provides a semiconductor integrated circuit verification system that includes a compiler configured to receive circuit descriptions of a semiconductor integrated...
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7228440 |
Scan and boundary scan disable mechanism on secure device
A circuit generally comprising a logic module and a security module is disclosed. The logic module may be configured to set a plurality of values to a plurality of predetermined values respectively...
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7225359 |
Method and apparatus for mapping signals of a device under test to logic analyzer measurement channels
A method of mapping device pins to logic analyzer channels in preparation for a digital test includes accepting a correlation of at least one test connector to one or more logic analyzer pods and...
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7225365 |
Apparatus and method for identification of a new secondary code start point following a return from a secondary code execution
When a NEW SECONDARY CODE EXECUTION START POINT signal is generated in a target processor during a test procedure after the return from an interrupt service routine (i.e., an original secondary...
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7225358 |
Semiconductor integrated circuit device having operation test function
When an operation test is performed to a plurality of circuit blocks each having the same circuit configuration, common test pattern data is transmitted to the respective circuit blocks through...
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7225357 |
SDIO card development system
An SDIO card development supporting system for development of SDIO cards, an SDIO controller reference board, and a method for running the system are disclosed. The SDIO card development supporting...
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7225360 |
Automatic analysis apparatus and method for controlling an analysis unit
When an instruction by a person in charge is required during an analysis operation, a transmitted e-mail processing unit creates an e-mail that includes, as a message or an attached file,...
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7222261 |
Automatic test equipment for design-for-test (DFT) and built-in-self-test circuitry
An analog/mixed-signal DFT/BIST test module for use in a semiconductor tester to support DFT/BIST testing of semiconductor devices having at least one analog/mixed-signal circuit-under-test is...
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7219265 |
System and method for debugging system-on-chips
Large, complex SoCs comprise interconnections of various functional blocks. Such functional blocks contain scan chains that are used for their individual production testing. The present invention...
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7216258 |
Method and apparatus for recovering from a non-fatal fault during background operations
A method and apparatus for reinitializing firmware in the event of a fault in a storage area network comprising at least one storage controller having programmable memory and RAM, said at least one...
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7213169 |
Method and apparatus for performing imprecise bus tracing in a data processing system having a distributed memory
An apparatus for performing imprecise bus tracing in a distributed memory symmetric multiprocessor system is disclosed. The apparatus includes a bus trace macro (BTM) module that can control the...
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7213171 |
IEEE 1149.1 tap instruction scan with augmented TLM scan mode
An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and...
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7213170 |
Opportunistic CPU functional testing with hardware compare
One embodiment disclosed relates to a method of providing CPU functional testing. Operations are executed on multiple functional units of a same type in the CPU. The outputs of the multiple...
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7210064 |
Program controlled unit and method for debugging programs executed by a program controlled unit
The described program controlled unit has first supply voltage connections for applying a first supply voltage to the program controlled unit and second supply voltage connections for applying a...
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7206969 |
Opportunistic pattern-based CPU functional testing
One embodiment disclosed relates to a method of compiling a program to be executed on a target microprocessor. A cycle is identified during which a functional unit would otherwise be idle. A...
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7207019 |
Test circuit inserting method and apparatus for a semiconductor integrated circuit
A method to reduce the load of layout design and attain a high fault coverage while preventing increase in chip size in test point insertion for a semiconductor integrated circuit. Initial layout...
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7206982 |
Diagnostic mechanism for an integrated circuit
A diagnostic mechanism for an integrated circuit 2 uses a radio interface circuit 16 to provide communication between an external diagnostic device 22 and one or more diagnostic circuits 26,...
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7206966 |
Fault-tolerant multi-core microprocessing
One embodiment disclosed relates to a method of executing program code on a target microprocessor with multiple CPU cores thereon. One of the CPU cores is selected for testing, and inter-core...
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7203876 |
Method and apparatus for controlling AC power during scan operations in scannable latches
A method and apparatus are provided for implementing AC power dissipation control during scan operations in scannable latch designs. A scannable latch has a functional data output and a scan data...
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7200776 |
System and method for generating trace data in a computing system
A hardware trace unit is integrated into a computer system that has a main memory. The trace unit includes registers that contain information defining a location in main memory, and has an input...
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7197671 |
Generation of trace elements within a data processing apparatus
A trace module traces changes in a subset of architectural state of a data processing apparatus. A trace generation unit receives input signals from components of the data processing apparatus...
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7197677 |
System and method to asynchronously test RAMs
A system and method for testing the random access memory of a computer system is disclosed. A memory-testing engine is embedded in the utility bus controller of an application specific integrated...
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7194660 |
Multi-processing in a BIOS environment
A basic input/output system (BIOS) for use in a computer system having a plurality of processors is described. The BIOS is embodied in a computer readable medium as computer program instructions...
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7191265 |
JTAG and boundary scan automatic chain selection
A printed circuit board (PCB) may be used in a first mode where boundary scan techniques are used to externally program and/or test devices on the PCB, or a second mode where an internal source...
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7191090 |
Methods and systems for acoustically locating computer systems
A method for determining a physical location of a source is provided. The method includes receiving an acoustic signal from a source placed within an acoustic monitoring area. The method also...
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7188277 |
Integrated circuit
An integrated circuit (“IC”) comprising a plurality of logic modules. The IC further comprises a plurality of bus segments each associated with one of the logic modules; a debug bus...
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7188276 |
Apparatus and method for testing a computer system by utilizing FPGA and programmable memory module
An apparatus and method for testing a computer system by utilizing a Field Programmable Gate Array (FPGA) and programmable memory modules is provided. The apparatus includes a controller, a...
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7181663 |
Wireless no-touch testing of integrated circuits
A wireless integrated circuit test method and system is presented. The invention allows testing of one or more integrated circuits configured with a wireless interface and a test access mechanism...
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7181658 |
Method for testing semiconductor memory device and test circuit for semiconductor memory device
In synchronization with a PLL clock PCK having a frequency four times that of an external clock ECK, n number of internal addresses IAD including an external address EAD are generated and, in...
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7178078 |
Testing apparatus and testing method for an integrated circuit, and integrated circuit
An apparatus enables a high quality test to be carried out within a short time, without forcing a severe design limitation on the designer and without an expensive tester. The apparatus includes a...
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7177965 |
Linking addressable shadow port and protocol for serial bus networks
Linking addressable shadow port (LASP) and protocol allows addressing the LASP and configuring the connection of multiple Secondary Test Access Ports (TAPs) of the LASP using a single protocol or...
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7177986 |
Direct access mode for a cache
A cache is configured to receive direct access transactions. Each direct access transaction explicitly specifies a cache storage entry to be accessed in response to the transaction. The cache may...
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7178076 |
Architecture of an efficient at-speed programmable memory built-in self test
A method of testing an embedded memory at speed within an integrated circuit which includes providing a memory built in self test sequencer module, providing a satellite engine module coupled to...
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7174405 |
Method and system for replacing a read-modify-write operation with an atomic set-bits or clear-bits operation
A method and system for updating registers by performing an atomic read-modify-write operations initiated by a host over a host/daughtercard bus. A field in the write command determines whether...
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7174483 |
Method for operating a processor-controlled system
A method for monitoring a system controlled by a processor utilizes an integrated monitoring unit independent of the processor but integrated together with the processor in an integrated circuit,...
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7171597 |
Input/output compression test circuit
The I/O compression test circuit performs test on global I/O lines divided into groups after failure occurs, thereby improving repair efficiency. The configuration of the test circuit is simplified...
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7171587 |
Automatic test system with easily modified software
An automatic test system, such as might be used to test semiconductor devices as part of their manufacture. The test system uses instruments to generate and measure test signals. The automatic test...
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7167761 |
Methods and systems for modifying the operation of a compressor via a portable memory device
A method and system for modifying the operation a device. The method can include obtaining a first reconfiguration kit. The first reconfiguration kit can include a portable memory device. The...
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7168017 |
Memory devices with selectively enabled output circuits for test mode and method of testing the same
A memory device, such as a DDR SDRAM, may be provided in which subsets of data output circuits of the device can be selectively enabled to allow sets of data output pins to be connected in common...
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7168006 |
Method and system for saving the state of integrated circuits upon failure
Method and system for saving the state of integrated circuit chips upon failure. In one aspect of the invention, a system for saving the state of an integrated circuit includes a non-volatile...
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7168021 |
Built-in test circuit for an integrated circuit device
An integrated circuit device can be tested using a built-in test circuit, in the IC device, that tests the operation of an I/O cell. The built-in test circuit includes a pattern generator for...
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