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6457141 |
Semiconductor device with embedded memory cells
A semiconductor device with embedded memory cells is provided, wherein the device comprises a memory block, a logic block for inputting and outputting data with the memory block and performing...
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6453410 |
Computer system having a cache memory and a tracing function
A computer system operates for pipe-line processing, and includes a cache memory and a tracing circuit for tracing the operation of the pipe-line processor for developing the computer system. The...
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6449755 |
Instruction signature and primary input and primary output extraction within an IEEE 1149.1 compliance checker
A computerized method and system for automatically extracting an IEEE 1149.1 standard design from a netlist and performing compliance checking. The present invention receives the TAP (test access...
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6449576 |
Network processor probing and port mirroring
A method and system for systematically accessing and monitoring operating parameter signals within an IC device. A probe configuration logic selects a subset of signals from among a set of...
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6446221 |
Debug mechanism for data processing systems
Apparatus for processing data is provided, said apparatus comprising: a main processor 4 responsive to main processor instructions within a stream of instructions input to said main processor 4 ...
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6446164 |
Test mode accessing of an internal cache memory
A circuit and method for reading and writing to a microprocessor's internal cache memory during a test mode of operation. During write accesses, an external data bus transmits to an internal data...
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6438743 |
Method and apparatus for object cache registration and maintenance in a networked software development environment
The present invention is a method and apparatus for building a software system in a networked software development environment, utilizing existing software version control and build tools such as...
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6430705 |
Method for utilizing virtual hardware descriptions to allow for multi-processor debugging in environments using varying processor revision levels
A method and apparatus for concurrent testing of a plurality of microprocessors, each of which may have a different revision, by creating an abstract base class which specifies the names of a...
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6425102 |
Digital signal processor with halt state checking during self-test
The objective of the invention is to provide a DSP that can perform hold testing, which evaluates the halt state of the DSP core, during DSP core self-testing. DSP circuit 2 has input scheduler 8...
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6424926 |
Bus signature analyzer and behavioral functional test method
A bus signature analyzer (BSA) device and method to provide high-speed functional testing of a highly integrated circuit (IC) are provided such that existing automatic test equipment (ATE) can be...
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6415407 |
Debugging device for a system controller chip to correctly lead its signals to IC leads
A debugging device is provided for use in a system controller chip on a computer motherboard, such as a Pentium-based computer motherboard, to facilitate a debugging procedure on the system...
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6415393 |
Inspection of an integrated circuit device while being mounted on a circuit board
An integrated circuit device can be inspected in various ways while it is being installed on a circuit board. A bus control unit connects an external memory to a central processing unit in a normal...
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6415406 |
Integrated circuit having a self-test device and method for producing the integrated circuit
An integrated circuit incorporating a self-test device and a method for producing a self-testing integrated circuit. The integrated circuit has a program memory with at least one external terminal...
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6408402 |
Efficient direct replacement cell fault tolerant architecture
A data processing system containing a monolithic network of cells with sufficient redundancy provided through direct logical replacement of defective cells by spare cells to allow a large...
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6385749 |
Method and arrangement for controlling multiple test access port control modules
An arrangement controls an IC designed with multiple “core” circuits, such as multiple CPUs, with each core circuit including its own TAP controller. According to one example embodiment,...
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6385755 |
Information processing system and logic LSI, detecting a fault in the system or the LSI, by using internal data processed in each of them
An information processing system has a plurality of processor circuits, each of the processor circuits including internal circuits and an internal processing result outputting circuit, the system...
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6378094 |
Method and system for testing cluster circuits in a boundary scan environment
A method and system for testing circuit clusters in a boundary scan environment identifies the circuit clusters and corresponding neighboring boundary scan elements, and generates one or more test...
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6378095 |
Dual mode memory for IC terminals
An electronic integrated circuit includes a signal path connected between the functional logic ( 15 ) thereof and an external output terminal thereof, which signal path includes a memory circuit (...
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6374370 |
Method and system for flexible control of BIST registers based upon on-chip events
A method and structure facilitates the debugging and test coverage capabilities of a microprocessor. A microprocessor having memory arrays, a debug block, and one or more built-in-self-test (BIST)...
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6370658 |
Device for testing digital signal processor in digital video disc reproducing apparatus
A device for testing a digital signal processor in a DVD (Digital Video Disc) reproducing apparatus. The test device includes a computer for generating test data for testing the digital signal...
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6367032 |
Method and system for debugging a microprocessor core
Method and system for debugging a microprocessor core. In one embodiment, the method comprises the step of receiving as input a test program and test data for testing the microprocessor core. The...
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6363501 |
Method and apparatus for saving and loading peripheral device states of a microcontroller via a scan path
A microcontroller has many internal peripheral devices. The peripheral devices are coupled to a scan path. A memory storage device that is external to the microcontroller is also coupled to the...
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6363510 |
Electronic system for testing chips having a selectable number of pattern generators that concurrently broadcast different bit streams to selectable sets of chip driver circuits
A system for testing integrated circuit chips is comprised of a selectable number of pattern generators, each of which is coupled via a separate bus to a selectable number of chip driver circuits....
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6363504 |
Electronic system for testing a set of multiple chips concurrently or sequentially in selectable subsets under program control to limit chip power dissipation
A system for testing integrated circuit chips includes a signal generator which generates a clock signal; and a sequential control circuit having a first input which receives the clock signal, a...
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6357025 |
Testing and burn-in of IC chips using radio frequency transmission
A testing system evaluates one or more integrated circuit chips using RF communication. The system includes an interrogator unit with a radio communication range, and an IC chip adapted with RF...
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6356960 |
Microprocessor having an on-chip CPU fetching a debugging routine from a memory in an external debugging device in response to a control signal received through a debugging port
There is disclosed a computer system including a microprocessor on an integrated circuit chip comprising an on-chip CPU and a debugging port connected to a communication bus on the integrated...
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6351724 |
Apparatus and method for monitoring the performance of a microprocessor
An apparatus and method are presented for monitoring the performance of a microprocessor. The apparatus includes performance monitoring hardware incorporated within the microprocessor. The...
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6351799 |
Integrated circuit for executing software programs
The integrated circuit executes software programs. The electronic components of the integrated circuit and/or the electrical connections between them can be selectively broken and/or created. The...
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6349397 |
Signal processing apparatus having non-volatile memory and programming method of the non-volatile memory
The present invention provides a signal processing apparatus having at least a boundary scan chain for carrying out a boundary scan test, a CPU capable of being controlled by the boundary scan...
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6349392 |
Devices, systems and methods for mode driven stops
A data processing device formed in a single semiconductor chip. The data processing device includes an electronic processor, and on-chip peripheral circuitry ordinarily operative together. Further...
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6347381 |
Test mode circuitry for electronic storage devices and the like
A detection circuit and a test mode circuit incorporating the detection circuit is disclosed. The detection circuit includes an N-channel transistor having a first source, a first gate, and a first...
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6345322 |
Intelligently interpreting errors in build output log files
A method for identifying predefined error conditions in a build output log file to determine if software build is defective. An output log file is generated within a storage device of a data...
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6343358 |
Executing multiple debug instructions
Apparatus for processing data is provided, said apparatus comprising: a main processor 4 ; an instruction transfer register ITR for holding a data processing instruction and accessible via a first...
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6343365 |
Large-scale integrated circuit and method for testing a board of same
In a large-scale integrated circuit, a scan path is divided between an I/O scan path that is formed by a series connection between only flip-flops that are in a region near an I/O pin and an...
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6343161 |
Image processing device
Image data of a test pattern is transmitted to an image processor and image processing is effected by the image processor based on the test pattern. The image outputted (the results of the image...
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6334198 |
Method and arrangement for controlling multiply-activated test access port control modules
An arrangement controls an IC designed with multiple "core" circuits, such as multiple CPUs, with each core circuit including its own TAP controller and with multiple TAP controllers enabled at a...
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6330703 |
Method and circuit for determining the power consumption requirements for a semiconductor logic circuit and designing the circuit accordingly
A logic circuit determines the power consumption of a semiconductor integrated device by taking into consideration the variation of the rate of operation. A control signal (TEST) is applied to each...
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6324614 |
Tap with scannable control circuit for selecting first test data register in tap or second test data register in tap linking module for scanning data
A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).
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6320804 |
Integrated semiconductor memory with a memory unit a memory unit for storing addresses of defective memory cells
An integrated semiconductor memory which can be subjected to a memory cell test for determining operative and defective memory cells has addressable normal memory cells (MC) and redundant memory...
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6321320 |
Flexible and programmable BIST engine for on-chip memory array testing and characterization
A highly flexible and complex BIST engine provides at-speed access, testing, characterization, and monitoring of on-chip memory arrays, independent of other chip circuitry such as a CPU core. Each...
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6321349 |
Method and apparatus for developing and debugging portable computers via a peripheral interface slot
A portable computer includes a housing having an outside surface. A processor is contained within the housing and has a bus port and a debug port. A debug connector is mounted at the outside...
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6321329 |
Executing debug instructions
Apparatus for processing data is provided, said apparatus comprising: a main processor 4 driven by a main processor clock signal clk at a main processor clock frequency; debug logic 6, 12 at least...
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6317846 |
System and method for detecting faults in computer memories using a look up table
A method is provided for determining the location of faulty components in a computer memory array on a chip and for providing a software repair procedure. According to the method, the location of...
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6314530 |
Processor having a trace access instruction to access on-chip trace memory
A computer system includes a memory for storing instructions executable by a processor and an on-chip trace memory having a plurality of locations for storing trace information that indicates...
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6311292 |
Circuit, architecture and method for analyzing the operation of a digital processing system
A dual access debugging architecture. This architecture allows the microprocessor to select between external debugging, supported via the physical system interface, and internal debugging,...
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6311311 |
Multiple input shift register (MISR) signatures used on architected registers to detect interim functional errors on instruction stream test
A method for verifying all intermediate results of a set of architected registers at the end of an instruction stream, even if the final values do not depend on the values of all intermediate...
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6311302 |
Method and arrangement for hierarchical control of multiple test access port control modules
An arrangement controls an IC designed with multiple "TLM'ed core" circuits, such as multiple CPUs, with each core circuit including its own TAP controller and with multiple TAP controllers enabled...
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6298412 |
Microcomputer and method of determining completion of writing in the microcomputer
When writing of data into nonvolatile memories 8H and 8L is started, data D7 and D15 corresponding to the 128th word of a data input section 8B are inverted and outputted. When accurate writing is...
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6298453 |
Method of determining signal delay of a resource in a reconfigurable system having multiple resources
An arrangement for configuring a reconfigurable system having a plurality of resources includes a compiler that configures the resources to implement a functional system in accordance with a user...
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6289300 |
Integrated circuit with embedded emulator and emulation system for use with such an integrated circuit
A data processor is provided with an embedded debugger. The debugging function is provided by the execution of a debugging program which is stored in reserved, non-volatile memory which is internal...
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