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7627772 |
Fast data access mode in a memory device
A fast data access circuit that has both a standard clock mode and a fast data access mode. The mode is selectable through a mode/configuration register. A configuration word loaded into the...
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RE41031 |
Frequency control system that stabilizes an output through both a counter and voltage-controlled oscillator via sampling a generated clock into four states
A frequency control system includes a voltage-controlled oscillator, a sampling circuit for sampling a clock signal produced by the oscillator for two consecutive transitions of an unstable...
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7610416 |
Systems and methods for controlling rise and fall times of USB signals
Systems and methods for controlling the rise and fall times of USB signals for USB devices and peripherals are provided. The rise and fall times of USB peripherals can be controlled, or changed, in...
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7610175 |
Timestamping signal monitor device
A signal monitor device that detects a signal propagating on a signal line and that generates a timestamp when the signal is detected. The timestamp may be used in a variety of applications...
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7602744 |
Detection of a simultaneous occurrence of an event at a plurality of devices
The invention relates to a detection of a simultaneous occurrence of an event of a predetermined kind at a plurality of electronic devices. At least two devices detect the event and record at their...
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7600141 |
Data processing performance control
A data processing system is provided having a processor 46 which generates control signals for controlling further circuits, such as a clock generator 4 and voltage controller 6 , to operate...
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7599459 |
Receiving apparatus, data transmission system and receiving method
A receiving apparatus receives data sequences, each of which includes plural data blocks, from plural transmission lines, respectively. The apparatus includes plural elastic buffers and a deskew...
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7596669 |
Apparatus and method for managing memory in a network switch
The present invention is related to a method and apparatus for managing memory in a network switch, wherein the memory includes the steps of providing a memory, wherein the memory includes a...
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7594146 |
Apparatus, method, and program for correcting time of event trace data
A time correcting apparatus includes a data input section which inputs all event trace data generated for each event executed on computing devices and outputs the event trace data in order of...
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7590880 |
Circuitry and method for detecting and protecting against over-clocking attacks
The present invention is directed to circuitry for detecting and protecting against over-clocking attacks on hardware modules. The circuitry preferably comprises a test signal, a delay path for...
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7590871 |
Electronic apparatus and method of setting an operation mode of the same
An operation mode control program is a program for carrying out an operation mode changeover control. A user interface section sets time zone corresponding to each operation mode. A time acquire...
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7577254 |
Detector autocalibration in QKD systems
A method ( 300 ) of performing photon detector autocalibration in quantum key distribution (QKD) system ( 200 ) is disclosed. The method ( 300 ) includes a first act ( 302 ) of performing a...
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7571341 |
Method and system for fast frequency switch for a power throttle in an integrated device
The ability to change from a first bus ratio to a second bus ratio without draining the transaction queues of a processor.
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7571338 |
Determining a time difference between first and second clock domains
Buffer circuitry receives data to be processed by electronic circuitry using a first clock signal associated with a first clock domain. The buffered data is output using a second clock signal...
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7571266 |
Peripheral device in a computerized system and method
A computerized system is described (i) which includes an interface connected with a peripheral device and (ii) which is incapable of dynamically extending bus cycle timing if required by the...
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7570669 |
Synchronizing packet traces
A system and method for determining a common time base among nodes in a network by iteratively propagating timing constraints among the nodes, and determining a time-shift to apply to the time base...
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7568118 |
Deterministic operation of an input/output interface
In one embodiment, the present invention includes a method for receiving data from a second device in a first device, forwarding the data from an input/output (I/O) clock domain to a system clock...
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7562105 |
Methods and apparatus for generating a delay using a counter
Methods, apparatus, and articles of manufacture for generating a delay time using a counter are disclosed. In particular, the methods, apparatus, and articles of manufacture determine a number of...
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7561598 |
Add-on module for synchronizing operations of a plurality of devices
A system and method are provided which add, via an add-on module, synchronization functionality to an instrument that does not otherwise support such synchronization functionality. Various...
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7552446 |
Methods and apparatus for a timer event service infrastructure
Complex software systems often require time-based processing, such as delayed or periodic timer event handling. A timer service provides an Application Programming Interface (API) for managing...
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7552226 |
Detecting a timeout of elements in an element processing system
Provides methods, systems and apparatus for timer management of an element processing system wherein timer intervals related to elements to be processed can be handled in a time-efficient manner....
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7546481 |
Clock control circuit that generates and selects one of a divided clock signal and a multiplied clock signal as a bus clock signal
A clock control circuit including a divider unit for dividing a master clock signal at a falling timing of the same to generate a divided clock signal, a multiplier unit for multiplying the master...
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7546480 |
High speed bus with alignment, re-timing and buffer underflow/overflow detection enhancements
In a networked system in which high speed busses interconnect sources and destinations of data, systems for and methods of data alignment, data re-timing, and circular buffer underflow/overflow...
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7543173 |
Timestamp generator
A method of generating a timestamp includes measuring a time period between two events, automatically determining a precision for an indication of the time period, and storing the timestamp. The...
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7539890 |
Hybrid computer security clock
A clock object is provides, which includes a clock time and a monotonic time that are readable by the electronic device. The monotonic time is incremented every read of the monotonic time from the...
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7539803 |
Bi-directional interface for low data rate application
A bi-directional single-conductor interface is provided, comprising (1) a switching means for applying a voltage level to the interface that is outside a normal voltage operating range for the...
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7536580 |
System and method for generating timer output corresponding to timer request from plurality of processes
The present invention relates to timer generation corresponding to a plurality of timer requests, etc. necessary for task processes of a CPU and achieves efficient timer generation. The present...
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7533285 |
Synchronizing link delay measurement over serial links
Systems, methods, and other embodiments associated with synchronizing link delay is provided. In one example system, a system for synchronizing signal communication between a first electronic...
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7529961 |
Semiconductor device with clock failure detection circuitry
A semiconductor device is composed of an oscillator circuit developing a clock, and an oscillation failure detect unit. The an oscillation failure detect unit is configured to obtain at least one...
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7529960 |
Apparatus, system and method for generating self-generated strobe signal for peripheral device
A self-generated strobe signal generator generates a self-generated strobe signal for a peripheral device using a peripheral device selection signal and a clock signal, without using a conventional...
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7529956 |
Granular reduction in power consumption
Generally described, embodiments of the present invention are directed at reducing the power consumed by a CPU. In accordance with one embodiment, a method is provided that transitions the CPU into...
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7529939 |
Method of and apparatus for transferring data
A method of securely transferring data from a transmitter to a receiver which includes the steps of at the transmitter encrypting data which at least in part is based on timer information at the...
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7519847 |
System and method for information handling system clock source insitu diagnostics
A clock diagnostics module, such as a state machine, integrated into an integrated clock controller monitors clock signals associated with the integrated clock controller and reports the status of...
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7519846 |
Detection of an in-band reset
Methods and apparatuses for detecting an in-band reset using digital circuitry. A first counting circuit is coupled to receive a first clock signal and to generate output signals based on a number...
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7512829 |
Real time event stream processor to ensure up-to-date and accurate result
Identifying a transaction from a real time event stream having latency. A method of the invention receives events from the real time event stream where events define a plurality of transactions to...
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7500131 |
Training pattern based de-skew mechanism and frame alignment
Some embodiments of the invention provide a training sequence that may be used in a deskewing process or a protocol to be implemented in a training sequence deskew. Embodiments may also comprise a...
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7500130 |
Cycle-accurate real-time clocks and methods to operate the same
Cycle-accurate real-time clocks and methods to operate the same are disclosed. An example real-time clock comprises a first counter to count cycles of a selectively-operable clock, a multiplexer to...
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7496779 |
Dynamically synchronizing a processor clock with the leading edge of a bus clock
Systems and methods for detecting a leading edge of a bus clock signal are disclosed herein. One edge detecting system includes a device for providing a bus clock and a processor clock, in which...
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7493535 |
JTAG circuit transferring data between devices on TCK terminals
The present disclosure describes using the JTAG Tap's TMS and/or TCK terminals as general purpose serial Input/Output (I/O) Manchester coded communication terminals. The Tap's TMS and/or TCK...
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7490241 |
Time stamping method employing user specified time
A method for time stamping a digital document is disclosed. The document originator creates a time stamp receipt using the document and the current time. The time stamp receipt is submitted to a...
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7478255 |
Clock distribution in multi-cell computing systems
Embodiments of the invention relate to distribution of clocks to CPUs in processing cells of a multi-cell system. In an embodiment, each cell includes an interface, referred to as an agent. A...
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7475271 |
Exponential channelized timer
A multiprocessor switching device substantially implemented on a single CMOS integrated circuit is described in connection with a channelized timer for use in controlling the issuance of signals to...
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7475237 |
Timer with periodic channel service
A system and method are provided for periodically servicing a channel in a timer used for controlling events. The method services a channel in a fixed periodic cycle, and reads a first control word...
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7475002 |
Method and apparatus for emulating multiple virtual timers in a virtual computer system when the virtual timers fall behind the real time of a physical computer system
A virtual computer system includes multiple timer emulators for emulating multiple virtual timers in a virtual machine (VM). A time coordinator keeps track of an apparent time that is provided to...
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7467319 |
Ethernet media access controller embedded in a programmable logic device—clock interface
A clock interface for a media access controller in a programmable logic device is described. The media access controller includes a clock generator for providing a clock signal to configured...
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7466724 |
Apparatus and method of analyzing packetized data spanning over multiple clock cycles
A method and apparatus for processing packetized data spanning multiple clock cycles includes at least one comparator, for comparing a present clock cycle count to a reference clock cycle count,...
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7466723 |
Various methods and apparatuses for lane to lane deskewing
Various methods, apparatuses and systems are described in which a skew delay time between communication lanes is determined. A data transfer path is established which includes two or more...
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7464195 |
Method and apparatus for detecting a presence of a device
A method and apparatus are disclosed for detecting a presence of a device. Specifically, a method and a system are disclosed that may comprise providing a clock driver having a pair of differential...
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7454648 |
System and method for calibrating a time of day clock in a computing system node provided in a multi-node network
A system, method and computer program product for calibrating a Time Of Day (TOD)-clock in a computing system node provided in a multi-node network. The network comprises an infrastructure of...
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7454645 |
Circuit and method for monitoring the status of a clock signal
A circuit and method are provided herein for monitoring the status of a clock signal. In general, the method may include supplying a pair of clock signals to a clock monitor circuit, which is...
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