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7620837 |
Data transmission system and data transmission apparatus
A data transmission system including a slave device ( 30 ) and a master device ( 10 ) is disclosed. Slave device ( 30 ) may include a slave side clock signal generator section ( 32 ) for generating...
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7620836 |
Technique for synchronizing network devices in an access data network
A master clock reference signal may be provided to selected packet fiber nodes in order to synchronize the local clock reference signals generated at selected devices in a cable network. In this...
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7620788 |
Memory device sequencer and method supporting multiple memory device clock speeds
A sequence state matrix has a plurality of time slots for storing a plurality of memory device signals. The memory device signals are loaded into the matrix by a sequencer load unit, which loads...
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7619449 |
Method and apparatus for synchronous clock distribution to a plurality of destinations
Circuits, methods and systems are disclosed providing clock synchronization circuits for synchronized clock distribution for a plurality of devices in a semiconductor device. The clock...
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7617410 |
Simultaneously updating logical time of day (TOD) clocks for multiple cpus in response to detecting a carry at a pre-determined bit position of a physical clock
A system, method and computer program product for synchronizing adjustment of a time of day (TOD) clock for a computer system having multiple CPUs, each CPU having an associated physical clock...
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7617409 |
System for checking clock-signal correspondence
A data processing system is provided having a clock signal comparator comprising a reference input port for receiving a reference clock signal and at least a further input port for receiving...
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7617408 |
System and method for providing accurate time generation in a computing device of a power system
A system and method provides accurate time generation in a computing device that includes a computing device clock and a microprocessor. The method includes determining a total system latency based...
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7617339 |
Serial interface circuit for data transfer
A serial interface circuit includes a first circuit disposed in the core portion and connected to the CPU, and a second circuit disposed in the peripheral circuit and connected to the peripheral...
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7616725 |
Signal delay structure in high speed bit stream demultiplexer
A signal delay structure and method of reducing skew between clock and data signals in a high-speed serial communications interface includes making a global adjustment to the clock signal in the...
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7613859 |
Back-off timing mechanism in a digital signal processor
Systems and methods for implementing back-off timing for retries of commands sent from a master device to a slave device over a split-transaction bus. One embodiment includes a buffer having...
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7613164 |
Method and apparatus for generating and distributing an internal clock for radio network controller
A method for generating an internal clock in a radio network controller and a relevant transmission processing board. The transmission processing board comprises; a clock signal selector for...
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7610504 |
Semiconductor integrated circuit
A semiconductor integrated circuit including a first power supply region supplied with a first power supply voltage, and having a first clock distribution network, a second power supply region...
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7610503 |
Methods for generating a delayed clock signal
An apparatus and method for generating a delayed clock signal is provided. The clock signal generator includes a synchronizing circuit for generating an output clock signal from an input clock...
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7610502 |
Computer systems having apparatus for generating a delayed clock signal
An apparatus and method for generating a delayed clock signal is provided. The clock signal generator includes a synchronizing circuit for generating an output clock signal from an input clock...
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7606947 |
Removable electronic device and method thereof
A removable electronic device includes a detector for detecting a mode of operation to distinguish among a multimedia card (MMC) compatible mode, a universal serial bus (USB) compatible mode, and a...
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7606342 |
Tracking the phase of a received signal
The tracking of the phase of a received signal having a known preamble is accomplished by the steps of: initializing a phase-locked loop in accordance with estimated phase parameters, which are...
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7602815 |
Using network time protocol in voice over packet transmission
One or more methods and systems of effectively transmitting voice and voice band data from one node to another are presented. In one embodiment, the system comprises an NTP time server generating...
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7602744 |
Detection of a simultaneous occurrence of an event at a plurality of devices
The invention relates to a detection of a simultaneous occurrence of an event of a predetermined kind at a plurality of electronic devices. At least two devices detect the event and record at their...
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7600145 |
Clustered variations-aware architecture
Methods and apparatus to provide a clustered variations-aware architecture are described. In one embodiment, one or more variations within a clock domain are detected and utilized to adjust a clock...
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7600144 |
Data transmission error reduction via automatic data sampling timing adjustment
A data transmission error reduction circuit is formed including a delay circuit, a detection circuit and a control circuit. In one embodiment, the delay circuit includes n delay element and...
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7600121 |
Message security
To provide a secure, effective but simple message handling, a method is provided for transmitting an electrical message, from a first user having a first terminal to a second user having a second...
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7596710 |
Synchronization circuit and method with transparent latches
A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second...
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7594146 |
Apparatus, method, and program for correcting time of event trace data
A time correcting apparatus includes a data input section which inputs all event trace data generated for each event executed on computing devices and outputs the event trace data in order of...
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7594133 |
Method and apparatus for determining a deviation between clock pulse devices
The invention relates to a method for synchronizing clock pulse devices. According to this method, an emission unit emits at least one narrow-band distant signal; clock pulse devices of receiving...
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7590882 |
System, method and storage medium for bus calibration in a memory subsystem
A cascaded interconnect system with one or more memory modules, a memory controller and a memory bus that utilizes periodic recalibration. The memory modules and the memory controller are directly...
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7590880 |
Circuitry and method for detecting and protecting against over-clocking attacks
The present invention is directed to circuitry for detecting and protecting against over-clocking attacks on hardware modules. The circuitry preferably comprises a test signal, a delay path for...
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7590879 |
Clock edge de-skew
Circuits, methods, and apparatus for deskewing rising and falling edges of a clock signal. One embodiment of the present invention utilizes a delay element in a data path to adjust a data signal...
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7590789 |
Optimizing clock crossing and data path latency
In one embodiment, the present invention includes a method for transmitting a predetermined data pattern from a first agent to a second agent of an interface, receiving an indication of correct...
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7584317 |
Protocol conversion circuit
A protocol conversion circuit performing a protocol conversion between a preceding stage circuit and a succeeding stage circuit includes a data storing unit storing input data from the preceding...
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7584310 |
Signal processing device
A signal processing device includes a start time obtaining part that obtains a start time when a predetermined process is started in response to an interrupt request associated with a valid edge of...
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7583106 |
Clock circuitry
A circuit comprising: clock circuitry for supplying a first faster clock signal to a first circuit portion and a second slower clock signal to a second circuit portion, and varying the relative...
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7581131 |
Method and system for balancing clock trees in a multi-voltage synchronous digital environment
A method for balancing clock trees in a multi-voltage synchronous digital environment is provided that includes generating a first source clock signal in a first voltage domain based on a first...
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7580524 |
Method and apparatus for synchronizing the emitter and the receiver in an autocompensating quantum cryptography system
In a method and apparatus for synchronizing the receiver and the emitter in an autocompensating quantum cryptography system it is allowed to one of the stations (for example the emitter) to define...
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7577861 |
Duty cycle rejecting serializing multiplexer for output data drivers
A method and apparatus is described herein for serializing input data streams into an output data stream. A first and second input data stream are sampled upon rising edges of a first and second...
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7574635 |
Circuit for and method of testing a memory device
Circuit and methods for testing a memory device are disclosed. According to one aspect of the invention, a circuit for testing an asynchronous data transfer comprises a first circuit receiving a...
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7574613 |
Scaling idle detection metric for power management on computing device
A component of a computing device such as a processor is operated based on a clock signal oscillating at a frequency. Power management for the computing device is performed by adjusting the...
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7573932 |
Spread spectrum clock generator
A spread spectrum clock generator includes a non-volatile memory to store control codes corresponding to a predetermined delay. A delay circuit receives a control code having a predetermined number...
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7573914 |
Systems and methods for synchronizing time across networks
By equipping receiving devices in a network with synchronizable clocks it is possible to periodically send an “impulse” signal that is received by all of the clocks at the same (or relatively...
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7571341 |
Method and system for fast frequency switch for a power throttle in an integrated device
The ability to change from a first bus ratio to a second bus ratio without draining the transaction queues of a processor.
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7571337 |
Integrated circuits and methods with transmit-side data bus deskew
A data output circuit includes a plurality of clocked data output buffers, each of which drives a data output thereof responsive to a clock signal and an adjustable multiphase clock signal...
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7571267 |
Core clock alignment circuits that utilize clock phase learning operations to achieve accurate clocking of data derived from serial data streams having different relative skews
Core clock alignment circuits include a serial-in parallel-out (SIPO) data processing circuit, which is configured to generate a plurality of lanes of deserialized data in response to a...
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7571076 |
Performance monitor device, data collecting method and program for the same
A performance monitor device includes an input unit to input both of address information and event occurrence information, an address mask unit to determine an address area to which each piece of...
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7570669 |
Synchronizing packet traces
A system and method for determining a common time base among nodes in a network by iteratively propagating timing constraints among the nodes, and determining a time-shift to apply to the time base...
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7568118 |
Deterministic operation of an input/output interface
In one embodiment, the present invention includes a method for receiving data from a second device in a first device, forwarding the data from an input/output (I/O) clock domain to a system clock...
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7565563 |
Non-volatile memory arrangement and method in a multiprocessor device
This invention relates to multiprocessor arrangements with shared non-volatile memory and the design of the access control of this memory, in particular to such memories embedded or integrated into...
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7562246 |
Phase controllable multichannel signal generator
A signal generator can control phase relationship between output signals of the channels without stopping clocks provided to the channels to enable the circuit operation fast. First and second...
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7562244 |
Method for data signal transfer across different clock-domains
In a method for data signal transfer across different clock-domains, including synchronization of a data signal with a current clock-domain where said data signal is processed, the processing of...
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7561598 |
Add-on module for synchronizing operations of a plurality of devices
A system and method are provided which add, via an add-on module, synchronization functionality to an instrument that does not otherwise support such synchronization functionality. Various...
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7558980 |
Systems and methods for the distribution of differential clock signals to a plurality of low impedance receivers
Systems and methods to distribute clock signals using a common bus. In one embodiment, a clock signal distribution system includes: a bus; a transmitter coupled to the bus to drive a clock signal...
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7558336 |
Semiconductor device, memory device and memory module having digital interface
An object of the present invention is to reduce jitter dependent on data patterns by an interface receiver. Another object of the present invention is to provide an LSI capable of automatically...
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