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8306652 Dual-band communication of management traffic in a blade server system  
In one embodiment, a communication system for a multi-blade server system includes a multi-drop serial bus network interconnecting a management module with each of a plurality of servers in a...
8307235 Cross controller clock synchronization  
A system may include a plurality of subsystems, e.g. instrumentation units housed in separate chassis, each chassis including multiple instrumentation devices, e.g. data acquisition cards. Each...
8301930 System and apparatus for transmitting phase information from a client to a host between read and write operations  
An asymmetrical IO method and system are described. In one embodiment, a host device includes shared resources for data synchronization of the host device and a client device. The shared resources...
8300752 Method, circuit, and design structure for capturing data across a pseudo-synchronous interface  
A structure for performing cross-chip communication with mesochronous clocks. The structure includes: a data delay line; a remote clock delay line; a structure that captures at least one value of a...
8301932 Synchronising between clock domains  
An integrated circuit 2 is provided with multiple clock domains separated by a clock boundary 8. Data values are passed across the clock boundary 8 using a first-in-first-out memory (FIFO), a read...
8301933 Multi-clock asynchronous logic circuits  
Methods, systems, and circuits for implementing multi-clock designs in asynchronous logic circuits are described. A method may include associating one or more data tokens with a clock domain of a...
8301931 Time synchronization of portable devices  
A portable time transfer device is provided to transfer accurate date/time to reader devices and, thus, the reader devices do not have to be connected to a source of accurate time. A host computing...
8296598 Double data rate output circuit and method  
A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second...
8290109 Circuit, system and method for multiplexing signals with reduced jitter  
An apparatus having a plurality of power supply domains and a plurality of logic components. Each of the plurality of logic components residing within a different one of the plurality of power...
8291253 Interface device, circuit module, circuit system, device for data communications and method for calculating a circuit module  
An interface device allows data communication between a controller and a plurality of circuit units. The interface device has a first interface for a connection to the controller, a second...
8291143 Single line communication  
A system and method for communication over a single communication line. The system includes an interface logic component for sending and receiving information for a processing component. The system...
8284937 Method for synchronization in encrypted communications using shared key  
The disclosed is a method for synchronization of the running key that is generated from a shared key and that is used for encryption and decryption in communications encrypted with the shared key...
8286024 Memory device, host device, and sampling clock adjusting method  
A memory card includes a memory controller configured to perform control for sending and receiving a command signal, a response signal, a data signal, and a status signal in synchronization with a...
8286021 Flash memory devices with high data transmission rates and memory systems including such flash memory devices  
A flash memory device includes a memory cell array, a clock signal input, an input for receiving a signal designating a writing operating mode, a plurality of data input/output pads, and a data...
8285896 Data conversion system  
A data conversion system for converting data outputted from an information processor into data in a different format in real time while preventing any defect of an image such as frame missing or...
8285897 Synchronized multichannel universal serial bus  
The invention provides a method and apparatus for providing a synchronized multichannel universal serial bus, the method in one aspect comprising supplementing the signal channels in the USB...
8286025 Selection of port adapters for clock crossing boundaries  
Methods and apparatus are provided for allowing efficient clock domain crossing management in programmable chip systems. Components associated with different clock domains can be analyzed. Clock...
8285879 Communications system recovery system  
A communications system for a network of stations, is provided where stations identify themselves upon being informed of the desires of an inquisitor station. Additionally, techniques for “plug a...
8281177 Distributed control system  
There is provided a distributed control system including a plurality of field controllers which are connected through a control network. Each of the field controllers includes: a control clock that...
8281176 Buffer circuit and method  
The disclosed embodiments relate to buffer circuits and methods. One embodiment is a buffer circuit that receives a data signal, a first clock signal and a second clock signal, the buffer circuit...
8276014 Stalling synchronisation circuits in response to a late data signal  
A data processing circuitry for processing data is disclosed. The data processing circuitry comprises: a plurality of synchronization circuits for capturing and transmitting the data in response to...
8271821 Flexible RAM clock enable  
A first set of configuration logic is configurable to provide a first port input clock signal for controlling input registers of a first port of a memory block. A second set of configuration logic...
8271823 DLL phase detection using advanced phase equalization  
A system and method are disclosed to generate and terminate clock shift modes during initialization of a synchronous circuit (e.g., a delay-locked loop or DLL). Upon initialization, the DLL is...
8271825 Synchronization devices having input/output delay model tuning elements in signal paths to provide tuning capabilities to offset signal mismatch  
Apparatus for synchronizing signals. For memory devices, such as SDRAMs, implementing a synchronization device to synchronize one signal, such as an external clock signal with a second signal, such...
8271824 Memory interface and operating method of memory interface  
A memory interface circuit includes a clock signal supply buffer configured to send a system clock signal which is supplied through a reference node, to a memory through a transmission line; a data...
8271822 Interactive device with time synchronization capability  
An interactive device having time synchronization capability is provided. In one embodiment, the interactive device has a computer processor that stores an internal clock. The computer processor...
8265921 Systems and methods for concurrently emulating multiple channel impairments  
Systems and methods are provided for concurrently emulating multiple channel impairments. The systems and methods may include storing a plurality of channel impairment profiles, where each channel...
8266466 Globally synchronized timestamp value counter  
The present invention relates to a synchronized timestamp mechanism in a packet processing system. This synchronized timestamp mechanism provides a globally synchronized counter value so counters...
8266405 Memory interface configurable for asynchronous and synchronous operation and for accessing storage from any clock domain  
An improved memory interface circuit is provided for accessing a storage array in one of two available modes, including a synchronous mode and an asynchronous mode. The improved memory interface...
8261120 Clock integrated circuit  
The clock circuit of an integrated circuit operates with variations such as temperature, ground noise, and power noise. Various aspects of an improved clock integrated circuit address one or more...
8259935 Secure communication method and system  
In a secure communication system, a first communication device includes a first list of numbers and a first number selector for periodically selecting a different number in the first list. The...
8261119 Test apparatus for testing device has synchronization module which synchronizes analog test module to digital test module based on synchronization signal received from digital test module  
There is provided a test apparatus for testing a device under test, including a plurality of test modules that test the device under test, and a synchronization module that is connected to each of...
8261121 Command latency reduction and command bandwidth maintenance in a memory circuit  
A method includes operating an arbitration logic of a memory controller at a core clock frequency lower than that of a memory clock frequency. The memory controller is configured to generate a...
8255733 Clock delay and skew control systems and methods  
A method of providing a clock signal for an embodiment includes performing a calibration for a closed loop control system to determine a control signal value that provides a desired tuning of the...
8255732 Self-stabilizing byzantine-fault-tolerant clock synchronization system and method  
Systems and methods for rapid Byzantine-fault-tolerant self-stabilizing clock synchronization are provided. The systems and methods are based on a protocol comprising a state machine and a set of...
8250398 Event time management in an electric vehicle charging station without a battery-backed real time clock  
An electric vehicle charging station, which does not include a battery-backed Real Time Clock, is in a charging station network managed by a charging station network server. Upon booting, the...
8245071 Method and apparatus of processing data independently and synchronizing and outputting processed data  
Provided are a method and apparatus for controlling a plurality of data processing modules that process data independently and output the processed data. A method of controlling a first data...
8245072 Signal transmission system and control method therefore  
A signal transmission system includes a transmitting device and a receiving device. The transmitting device includes a superimposition portion that superimposes at least one synchronizing signal on...
8245073 Method and apparatus synchronizing integrated circuit clocks  
Embodiments described herein include a method and system for synchronizing clocks between coupled integrated circuits (ICs) in a computer system. According to an embodiment, a dedicated timing pin...
8245074 Clock integrated circuit  
The clock circuit of an integrated circuit operates with variations such as temperature, ground noise, and power noise. Various aspects of an improved clock integrated circuit address one or more...
8238379 Automation device  
The invention relates to an automation device, with which a multiplicity of physically distributed functional units communicate with each other by means of a common transmission protocol. The...
8234514 Method and apparatus for resolving clock management issues in emulation involving both interpreted and translated code  
Methods and systems for resolving clock management issues in emulation of a target system on a host system are disclosed. A first set of code instructions of a target program is emulated to...
8228747 Delay adjustment device, semiconductor device and delay adjustment method  
Provided is a delay adjustment device that contributes to downsizing the circuit that adjusts a flight time. The delay adjustment device is connected to a memory, and adjusts a timing to retrieve...
8225252 Systems, methods, apparatus and computer readable mediums for use in association with systems having interference  
In some embodiments, a method includes characterizing a plurality of channels, each of the plurality of channels being a channel between a location and a respective one of the plurality of...
8223106 Display device and driving method thereof  
A driving circuit for a display device includes an input signal generator generating an input signal having one of a plurality of input frequencies corresponding to a respective one of a plurality...
8223910 Method and device for frame synchronization  
A device and a method for frame synchronization, the method includes providing a high frequency clock signal over a clock line during a transmission of information over a data line connected to a...
8225127 Method and system for precise synchronization of audio and video streams during a distributed communication session with multiple participants  
Described are the architecture of such a system, algorithms for time synchronization during a multiway conferencing session, methods to fight with network imperfections such as jitter to improve...
8225128 Electronic timer system, time control and generation of timing signals  
An electronic timer system includes a counter-based time generator (10) for continuously generating raw base time, and a translator (20) for translating between raw base time and local precise time...
8219846 Circuit for and method of receiving video data  
A circuit of an integrated circuit for receiving video data having a plurality of data streams of pixel data and a pixel clock is disclosed. The circuit comprises a plurality of data recovery...
8219844 Methods and systems for emulating a synchronous clear port  
A synchronous clear emulation circuit is provided. The synchronous clear emulation circuit includes a register having an asynchronous clear port. Moreover, the synchronous clear emulation circuit...