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8504788 Memory controller, system and method for read signal timing calibration  
A memory controller includes an interface to receive a data strobe signal and corresponding read data. The data strobe signal and the read data correspond to a read command issued by the memory...
8499186 Clock generator and USB module  
A clock generator is provided. The clock generator includes a crystal oscillator, an inverter coupled to the crystal oscillator in parallel, a first circuit and a second circuit. The crystal...
8495407 Node apparatus mounted in vehicle and in-vehicle network system  
An in-vehicle network system includes plural electronic control units data-communicably connected via a network. The electronic control units include a master unit and a node apparatus composed of...
8495410 Sampling phase correcting host controller, semiconductor device and method  
One embodiment provides a host controller which performs a phase shift correction of a sampling clock when sampling a signal received, includes a phase shift judging section which judges whether or...
8495408 Synchronization method and device for real-time distributed system wherein each module sets an indicator to signal whether it is currently able to operate synchronously with other modules and resets the indicator at a unified synchronization end time  
In order to solve the technical problem that in the current real-time distributed systems such as multi-antenna MIMO system, the implementation of synchronization between distributed modules by...
8495409 Host controller, semiconductor device and method for setting sampling phase  
According to one embodiment, there is provided a host controller, which samples reception data in a VDS mode and an FDS mode, includes a VDS phase register which holds a phase shift amount in the...
RE44383 Method of self-synchronization of configurable elements of a programmable module  
A method of synchronizing and reconfiguring configurable elements in a programmable unit is provided. A unit has a two- or multi-dimensional, programmable cell architecture (e.g., DFP, DPGA, etc.),...
8490089 Guest timer facility to improve management in a virtualized processing system  
A method includes, in a virtualized processing system, generating a local value of a first counter. The local value is accessible while executing in a first mode of the virtualized processing...
8489776 Apparatus and method for synchronizing wireless devices  
An apparatus for synchronizing devices includes a central access point node configured to utilize a low latency protocol to transmit a series of synchronization messages to the devices, transmit...
8489902 Semiconductor integrated circuit  
A semiconductor integrated circuit includes: a plurality of chips configured to receive an external voltage. Each one of the chips detects a signal delay characteristic of the one of the chips to...
8484501 System for delay locked loop control that provides delay interval stabilization  
The delay locked loop (“DLL”) delay interval can be locked to stop the DLL from wasting power in unnecessarily switching to synchronize the device with the DLL is associated to the system clo...
RE44365 Method of self-synchronization of configurable elements of a programmable module  
A method of synchronizing and reconfiguring configurable elements in a programmable unit is provided. A unit has a two- or multi-dimensional, programmable cell architecture (e.g., DFP, DPGA, etc.),...
8484389 AV renderer peripheral with dual inerrupt lines for staggered interrupts  
An audio-video (AV) playback chain and rendering peripheral device 300 for generating two or more interrupts 306, 308 with a programmable delay 304 between them. Such are configured to prevent two...
8477896 Structure for window comparator circuit for clock data recovery from bipolar RZ data  
A clock-data recovery doubler circuit for digitally encoded communications signals is provided. A window comparator includes two thresholds. A clock output is created by the window comparator and...
8473770 Semiconductor device and data processing system  
There is provided a serial reception circuit that can suppress the occurrence of a bit error due to long-period jitter while suppressing the power consumption. A serial reception circuit for...
8472569 Fine symbol timing estimation  
Systems and methods for fine symbol timing estimation are disclosed herein. In one embodiment, a wireless receiver includes a differential detector, a correlator, a coarse symbol timing estimator,...
8473638 Method and apparatus for time and frequency transfer in communication networks  
A timing system for time synchronization between a time server and a time client over a packet network. The timing system includes a time server for generating current timestamp information and a...
8464087 Flash memory devices with high data transmission rates and memory systems including such flash memory devices  
A flash memory device includes a memory cell array, a clock signal input, an input for receiving a signal designating a writing operating mode, a plurality of data input/output pads, and a data...
8464089 Tracing apparatus and tracing system  
A tracing apparatus for tracing operational information that is output from a plurality of processing units in relation to data processing operations, the tracing apparatus comprising for each of...
8453003 Communication method  
A communication method is provided to reduce an overhead of inter-processor synchronization for a communication phase in collective communication and to speed up the collective communication. Each...
8442943 Data transfer and synchronization between mobile systems using change log  
A system and method for synchronizing devices which can couple to the Internet, or any network. In one aspect a system for synchronizing data between a first system and a second system is provided....
8443224 Apparatus and method for decoupling asynchronous clock domains  
A circuit and method for synchronizing signals between asynchronous clock domains within digital electronic circuits decouples asynchronous clocks. The timing of the slower clock is used to prevent...
8443225 Method and apparatus synchronizing integrated circuit clocks  
Embodiments described herein include a method and system for synchronizing clocks between coupled integrated circuits (ICs) in a computer system. According to an embodiment, a dedicated timing pin...
8438415 Performing a perform timing facility function instruction for synchronizing TOD clocks  
A system, method and computer program product for steering a time-of-day (TOD) clock for a computer system having a physical clock providing a time base for executing operations that is stepped to...
8434138 One time password  
A token calculates a one time password by generating a HMAC-SHA-1 value based upon a key K and a counter value C, truncating the generated HMAC-SHA-1 value modulo 10^Digit, where Digit is the...
8423812 Time correction in a semiconductor device using correction information provided by an adjacent semiconductor device  
In an information processing apparatus that includes a first and second semiconductor devices that are connected to each other and also includes a system control device that is connected to the...
8417982 Dual clock first-in first-out (FIFO) memory system  
Some of the embodiments of the present disclosure provide a method for operating a first in first out (FIFO) memory system in different clock domains, the method comprising receiving a write...
8417981 Time format conversion method, device and system  
A method and device for converting between different time domains at a local unit utilizing an processor is disclosed. Time counters to count time in at least two different formats are located...
8412974 Global synchronization of parallel processors using clock pulse width modulation  
A circuit generates a global clock signal with a pulse width modification to synchronize processors in a parallel computing system. The circuit may include a hardware module and a clock splitter....
8412975 USB based synchronization and timing system  
A synchronization apparatus, comprising: a USB device having a USB microcontroller, circuitry for observing USB traffic, and circuitry for decoding from a USB data stream a periodic data structure...
8411703 Method and apparatus for a reduced lane-lane skew, low-latency transmission system  
A method and apparatus for a multiple lane transmission system that provides a fixed, low-latency mode of operation with reduced lane-lane skew while process, voltage, and temperature (PVT)...
8412946 Trustworthy timestamps and certifiable clocks using logs linked by cryptographic hashes  
A method and apparatus for creating and/or using trustworthy timestamps and certifiable clocks using logs linked by cryptographic hashes. In one embodiment, the method comprises maintaining a...
8407513 Clock distribution with forward frequency error information  
This disclosure relates to providing an information signal to one or more sub-systems within a wireless communications device, where the information signal enables the sub-systems to operate based...
8407510 DDR interface bus control  
Systems and techniques for improved bus control, which may be particularly useful for double data rate (DDR) data transfer. A circuit may include a clock transmitter in communication with a clock...
8407508 Serial bus clock frequency calibration system and method thereof  
A serial bus clock frequency calibration system and a method thereof are disclosed herein. The system utilizes a first frequency calibration device, a second frequency calibration device and a...
8401359 Video receiving apparatus and video receiving method  
A video receiving apparatus having an input terminal to receive pixel-based video data transmitted with pixel clock synchronized with the video data is provided. The video receiving apparatus may...
8402300 Synchronization of clocks in autonomous components of an MR system and synchronous execution of commands in those components  
In a device and a method to execute commands in components of an imaging system, in particular of a magnetic resonance tomography system, local clocks in the components are temporally synchronized,...
8402303 Method for encoder frequency shift compensation  
The embodiments disclose a method for encoder frequency-shift compensation, including, determining frequency values of an input encoder signal, analyzing an encoder index clock signal and the input...
8402302 Timer system for maintaining the accuracy of a real time clock when synchronization source is not available  
An electronic timer system includes a counter-based time generator for continuously generating raw base time, and a translator for translating between raw base time and local precise time. The...
8402298 Array-type processor having delay adjusting circuit for adjusting a clock cycle in accordance with a critical path delay of the data path  
Disclosed is an array-type processor including a data path unit in which a plurality of processor elements are arranged in an array; a state-transition management unit that stores information for...
8402301 Delaying one-shot signal objects  
A device may include a processor to execute a thread. The processor may be further configured to execute a set of wrappers that are called from within the thread to invoke a set of one-shot signal...
8402299 Electronics device having timekeeping function and computer-readable record medium storing program for timekeeping function  
An electronics device comprising a time information acquisition unit which acquires time information representing present time from an external device, an update unit which updates reference time...
8397099 Using pulses to control work ingress  
The present invention extends to methods, systems, and computer program products for using pulses to control work ingress. Generally, embodiments of the invention use a variable-speed clock for...
8397095 Method and apparatus for synchronizing time of day of terminal in convergent network  
Provided is a method and apparatus for synchronizing a time of day (TOD) in a convergent network, wherein the TOD is received from a time server connected in the convergent network and is provided...
8396587 Conveyance control system and conveyance control method  
Provided is a conveyance control system in which fast and smooth control is realized without causing a control delay by a processing delay of a control apparatus such as a PLC, and wiring between a...
8397098 Method for countervailing clock skew and core logic circuit using the same  
A method for countervailing clock skew between a first clock signal and a second clock signal in a core logic circuit. The second clock signal is sampled based on the first clock signal in a...
8397094 Node-to-node synchronizing apparatus, node-to-node synchronizing method, and computer product  
A node-to-node synchronizing apparatus includes an information generating unit. Before receiving a synchronization request for synchronization, the information generating unit receives, from each...
8392741 Latency control circuit and semiconductor memory device including the same  
A latency control circuit includes a delay unit configured to delay an input signal for a delay corresponding to a phase difference between an external clock and an internal clock and generate a...
8392686 System and method for read synchronization of memory modules  
A memory module includes several memory devices coupled to a memory hub. The memory hub includes several link interfaces coupled to respective processors, several memory controller coupled to...
8392742 Cyclemaster synchronization in a distributed bridge  
A method of synchronizing cyclemasters over a distributed bridge is disclosed. The method comprises: a local portal sending a synchronization signal to a peer portal through a bridge fabric upon...