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8677170 Method for generating a clock signal  
An apparatus for generating a delayed clock signal. The apparatus is a computer system with a processor to which a memory device is coupled. The memory device has a delay clock generator that has a...
8675797 Real time processing supported by programmable control unit  
The real time processing supported by programmable control unit (RTP PCU) includes a method, a system and an apparatus for implementing programmable algorithms for analyzing a very wide range of...
8677169 Session redundancy using a replay model  
A mechanism for synchronizing states of components in a first routing engine to corresponding components in a second routing engine is provided. In order to reduce the amount of data required to...
8675666 Systems and methods for distributing GPS clock to communications device  
A method for synchronizing network elements to a global clock derived from the GPS clock acquired by a plurality of base stations. The global clock is distributed to controllers of various...
8671302 Method and apparatus for wireless clock regeneration  
Methods and systems for operating a wireless clock system for multimedia datastream transmission and display. Source clock frames are compared with a reference clock frames and the clock difference...
8671303 Write-leveling implementation in programmable logic devices  
Circuits, methods, and apparatus for memory interfaces that compensate for skew between a clock signal and DQ/DQS signals that may be caused by a fly-by routing topology. The skew is compensated by...
8671305 Techniques for adjusting periodic signals based on data detection  
A circuit includes a phase detector circuit, a phase frequency detector circuit, a data detection circuit, a multiplexer circuit, and a clock signal generation circuit. The phase detector circuit...
8670137 Method and apparatus for printing using synchronization signal  
A method and apparatus for printing using a synchronization signal are provided. Printing processes are performed in the apparatus by determining points in time for performing the printing...
8671301 Method for ensuring synchronous presentation of additional data with audio data  
A recording medium, method and apparatus for managing data are discussed. According to an embodiment, the present invention provides a method of reproducing main data and additional data. The...
8665738 Transmission apparatus and signal transmission method  
A transmission apparatus stores frame data of a first frame in a second frame having a bit rate different from that of the first frame through regulation of the amount of stuffs to be stored in the...
8667315 Synchronization control apparatus, information processing apparatus, and synchronization management method for managing synchronization between a first processor and a second processor  
A synchronization control apparatus includes a counter that carries out a counting and outputs resulting count information, a timeout time holder that holds a predetermined timeout time and outputs...
8666006 Systems and methods for high speed data recovery with free running sampling clock  
Systems and methods are disclosed for improving digital feed-forward data recovery of high speed data from a received data stream in a data transceiver or receiver where the receiver clock is...
8667316 Precision synchronisation architecture for superspeed universal serial bus devices  
A method of providing a synchronization channel to a SuperSpeed USB device is provided. The method including a SuperSpeed communication channel connection to the SuperSpeed USB device with a USB...
8661284 Method and system to improve the operations of a registered memory module  
A method and system to improve the operations of a registered memory module. In one embodiment of the invention, the registered memory module allows asynchronous read and write operations when a...
8650429 Clock phase alignment  
A method and apparatus for clock phase alignment are described. An external clock is aligned to an internal clock by adjusting phase of the external clock. The external clock is of a physical...
8645741 Method and system for predicting a latency spike category of audio and video streams to adjust a jitter buffer size accordingly  
Described are the architecture of such a system, algorithms for time synchronization during a multiway conferencing session, methods to fight with network imperfections such as jitter to improve...
8644439 Circuits and methods for signal transfer between different clock domains  
In certain embodiments, a circuit for transferring signals from a source clock domain to a destination clock domain comprises a first pulse generation circuit, a hold flip-flop circuit, a clocked...
8638251 Delay compensation for sigma delta modulator  
A continuous time delta-sigma modulator is provided that includes an integrator stage including a plurality of integrators; a quantizer to receive an input signal from the integrator stage and...
8631266 Semiconductor memory device and method of controlling the same  
A method of tuning a phase of a clock signal includes performing data training on a plurality of data pins through which data are input and output, in synchronization with a data clock signal;...
8631267 Adjustable byte lane offset for memory module to reduce skew  
Disclosed herein are solutions for addressing the problem of skew of data within a byte lane by factors caused external to the integrated circuit or module providing the data. To compensate for...
8631265 Synchronization circuit that facilitates multiple parallel reads and writes  
The disclosed embodiments provide a synchronization circuit that supports multiple parallel reads and writes. This synchronization circuit includes multiple coupled data storage locations that...
8630317 Memory system with calibrated data communication  
An integrated circuit device includes a transmitter circuit operable to transmit a timing signal over a first wire to a DRAM. The DRAM receives a first signal having a balanced number of logical...
8627132 Autonomous multi-device event synchronization and sequencing technique eliminating master and slave assignments  
An apparatus and method for event synchronization. One or more devices that have a plurality of events to be carried out in a scheduled order in time are connected to a single shared time position...
8627133 Virtual machine boot speed-up by clock acceleration  
A mechanism for virtual machine (VM) boot speed-up by clock acceleration is disclosed. A method of the invention includes detecting that a VM managed by a hypervisor of a host machine is starting a...
8626980 High density, low jitter, synchronous USB expansion  
A method of providing high density expansion of a USB network, the method comprising: attaching a plurality of USB hubs to adjacent slots in a PXI instrumentation chassis; configuring one of the...
8626852 Email thread monitoring and automatic forwarding of related email messages  
A computer system can implement a mechanism for email thread monitoring and automatic forwarding of related email messages. In one embodiment, a first email message is provided from an email...
8621109 Adaptable management in sync engines  
Synchronization of two or more items can be optimized through the use of parallel execution of synchronization tasks and adaptable processing that monitors and adjusts for system loading. Two or...
8621076 Delivery performance analysis for internet services  
One preferred embodiment of the present invention provides systems and methods for analyzing the delivery performance of newsgroup services. Briefly described, in architecture, one embodiment,...
8621253 Processor boost based on user interface demand  
A method and system for boosting a clock frequency for a processor in a mobile device based on user interface (UI) demand are described. In response to a user interaction through a UI in the mobile...
8615673 Device synchronization using independent clocks  
At least one radio frequency (RF) instrument may be configured according to a plurality of RF measurement configurations for performing a plurality of tests on a device under test (DUT). A list of...
8613065 Method and system for multiple passcode generation  
This invention relates to a method and a system for generating user passcodes for each of a plurality of transaction providers from a mobile user device. A method and system for activating a...
8607089 Interface for storage device access over memory bus  
A nonvolatile storage or memory device is accessed over a memory bus. The memory bus has an electrical interface typically used for volatile memory devices. A controller coupled to the bus sends...
8607247 Method and system for workitem synchronization  
Method, system, and computer program product embodiments for synchronizing workitems on one or more processors are disclosed. The embodiments include executing a barrier skip instruction by a first...
8601231 Semiconductor memory asynchronous pipeline  
An asynchronously pipelined SDRAM has separate pipeline stages that are controlled by asynchronous signals. Rather than using a clock signal to synchronize data at each stage, an asynchronous...
8595537 DLL phase detection using advanced phase equalization  
A system and method are disclosed to generate and terminate clock shift modes during initialization of a synchronous circuit (e.g., a delay-locked loop or DLL). Upon initialization, the DLL is...
8595543 Method and circuit for trimming an internal oscillator of a USB device according to a counting number between a first and second clock count value  
A circuit and method for trimming an internal oscillator of a USB device that generates a clock signal as a frequency source of the USB device detect an end of packet from an input data stream to...
8594575 Shifted channel characteristics for mitigating co-channel interference  
Methods and apparatuses for minimizing co-channel interference in communications systems are disclosed. A method in accordance with the present invention comprises shifting a characteristic of the...
8595540 Rendering a content stream based on a digital clock generated based on timing information  
Systems, methods, and other embodiments associated with clock generation are provided. In one embodiment, an apparatus comprises a digital clock circuit. Receive logic is configured to receive a...
8595536 Rate verification of an incoming serial alignment sequence  
A technique for rate verification of an incoming serial alignment sequence includes receiving an incoming serial stream. A determination is then made as to whether an align sequence is recognized...
8589714 Falling clock edge JTAG bus routers  
The disclosure describes a novel method and apparatus for allowing a controller to access a bus router using a communication occurring in response to one edge of a clock to select one or more...
8589716 Clock integrated circuit  
The clock circuit of an integrated circuit operates with variations such as temperature, ground noise, and power noise. Various aspects of an improved clock integrated circuit address one or more...
8587452 Time coordinated energy monitoring system utilizing communications links  
A method, system and device for synchronizing a time period over which energy measurements are accumulated for an energy monitoring system including a plurality of energy monitoring devices is...
8588355 Timing recovery controller and operation method thereof  
A timing recovery controller capable of performing timing recovery for a data sequence at twice a symbol rate includes a sampler, a timing base device, a timing error detector and a timing lock...
8589715 Method and system for correcting timing errors due to thermal changes within a portable computing device  
A method and system for correcting timing errors due to thermal changes within a portable computing device are disclosed. The system and method may include calculating an estimate of frequency for...
8583956 Interactive device with local area time synchronization capbility  
An interactive device with local area time synchronization is contemplated. The device includes a communications module linkable to a corresponding communications module of one or more other...
8578201 Conversion of timestamps between multiple entities within a computing system  
Method is described for converting received timestamps to a time-recording standard recognized by the receiving computing system. Embodiments of the invention generally include receiving data from...
8578200 Conversion of timestamps between multiple entities within a computing system  
Method, apparatus and system are described for converting received timestamps to a time-recording standard recognized by the receiving computing system. Embodiments of the invention generally...
8572425 Data processing device and mobile device  
A microcomputer is provided having a memory card interface capable of correctly latching data even when a card such as an MMC card is connected thereto. In the microcomputer having an interface...
8572424 Semiconductor device to select and output data to a data bus  
A semiconductor device that can transmit data in wide bus width regardless of the width of an external data bus connected thereto. In a semiconductor device on the data output side, m-bit internal...
8566632 Multi-rate sampling for network receiving nodes using distributed clock synchronization  
Various embodiments relate to a network receiver using distributed clock synchronization. The network receiver may include a first timing engine that samples bits received by the receiver with a...