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8627132 Autonomous multi-device event synchronization and sequencing technique eliminating master and slave assignments  
An apparatus and method for event synchronization. One or more devices that have a plurality of events to be carried out in a scheduled order in time are connected to a single shared time position...
8627133 Virtual machine boot speed-up by clock acceleration  
A mechanism for virtual machine (VM) boot speed-up by clock acceleration is disclosed. A method of the invention includes detecting that a VM managed by a hypervisor of a host machine is starting a...
8626980 High density, low jitter, synchronous USB expansion  
A method of providing high density expansion of a USB network, the method comprising: attaching a plurality of USB hubs to adjacent slots in a PXI instrumentation chassis; configuring one of the...
8626852 Email thread monitoring and automatic forwarding of related email messages  
A computer system can implement a mechanism for email thread monitoring and automatic forwarding of related email messages. In one embodiment, a first email message is provided from an email...
8621109 Adaptable management in sync engines  
Synchronization of two or more items can be optimized through the use of parallel execution of synchronization tasks and adaptable processing that monitors and adjusts for system loading. Two or...
8621076 Delivery performance analysis for internet services  
One preferred embodiment of the present invention provides systems and methods for analyzing the delivery performance of newsgroup services. Briefly described, in architecture, one embodiment,...
8621253 Processor boost based on user interface demand  
A method and system for boosting a clock frequency for a processor in a mobile device based on user interface (UI) demand are described. In response to a user interaction through a UI in the mobile...
8615673 Device synchronization using independent clocks  
At least one radio frequency (RF) instrument may be configured according to a plurality of RF measurement configurations for performing a plurality of tests on a device under test (DUT). A list of...
8613065 Method and system for multiple passcode generation  
This invention relates to a method and a system for generating user passcodes for each of a plurality of transaction providers from a mobile user device. A method and system for activating a...
8607089 Interface for storage device access over memory bus  
A nonvolatile storage or memory device is accessed over a memory bus. The memory bus has an electrical interface typically used for volatile memory devices. A controller coupled to the bus sends...
8607247 Method and system for workitem synchronization  
Method, system, and computer program product embodiments for synchronizing workitems on one or more processors are disclosed. The embodiments include executing a barrier skip instruction by a first...
8601231 Semiconductor memory asynchronous pipeline  
An asynchronously pipelined SDRAM has separate pipeline stages that are controlled by asynchronous signals. Rather than using a clock signal to synchronize data at each stage, an asynchronous...
8595537 DLL phase detection using advanced phase equalization  
A system and method are disclosed to generate and terminate clock shift modes during initialization of a synchronous circuit (e.g., a delay-locked loop or DLL). Upon initialization, the DLL is...
8595543 Method and circuit for trimming an internal oscillator of a USB device according to a counting number between a first and second clock count value  
A circuit and method for trimming an internal oscillator of a USB device that generates a clock signal as a frequency source of the USB device detect an end of packet from an input data stream to...
8594575 Shifted channel characteristics for mitigating co-channel interference  
Methods and apparatuses for minimizing co-channel interference in communications systems are disclosed. A method in accordance with the present invention comprises shifting a characteristic of the...
8595540 Rendering a content stream based on a digital clock generated based on timing information  
Systems, methods, and other embodiments associated with clock generation are provided. In one embodiment, an apparatus comprises a digital clock circuit. Receive logic is configured to receive a...
8595536 Rate verification of an incoming serial alignment sequence  
A technique for rate verification of an incoming serial alignment sequence includes receiving an incoming serial stream. A determination is then made as to whether an align sequence is recognized...
8589714 Falling clock edge JTAG bus routers  
The disclosure describes a novel method and apparatus for allowing a controller to access a bus router using a communication occurring in response to one edge of a clock to select one or more...
8589716 Clock integrated circuit  
The clock circuit of an integrated circuit operates with variations such as temperature, ground noise, and power noise. Various aspects of an improved clock integrated circuit address one or more...
8587452 Time coordinated energy monitoring system utilizing communications links  
A method, system and device for synchronizing a time period over which energy measurements are accumulated for an energy monitoring system including a plurality of energy monitoring devices is...
8588355 Timing recovery controller and operation method thereof  
A timing recovery controller capable of performing timing recovery for a data sequence at twice a symbol rate includes a sampler, a timing base device, a timing error detector and a timing lock...
8589715 Method and system for correcting timing errors due to thermal changes within a portable computing device  
A method and system for correcting timing errors due to thermal changes within a portable computing device are disclosed. The system and method may include calculating an estimate of frequency for...
8583956 Interactive device with local area time synchronization capbility  
An interactive device with local area time synchronization is contemplated. The device includes a communications module linkable to a corresponding communications module of one or more other...
8578201 Conversion of timestamps between multiple entities within a computing system  
Method is described for converting received timestamps to a time-recording standard recognized by the receiving computing system. Embodiments of the invention generally include receiving data from...
8578200 Conversion of timestamps between multiple entities within a computing system  
Method, apparatus and system are described for converting received timestamps to a time-recording standard recognized by the receiving computing system. Embodiments of the invention generally...
8572425 Data processing device and mobile device  
A microcomputer is provided having a memory card interface capable of correctly latching data even when a card such as an MMC card is connected thereto. In the microcomputer having an interface...
8572424 Semiconductor device to select and output data to a data bus  
A semiconductor device that can transmit data in wide bus width regardless of the width of an external data bus connected thereto. In a semiconductor device on the data output side, m-bit internal...
8566632 Multi-rate sampling for network receiving nodes using distributed clock synchronization  
Various embodiments relate to a network receiver using distributed clock synchronization. The network receiver may include a first timing engine that samples bits received by the receiver with a...
8559577 Apparatus and method for timing of signals  
The invention relates to a method and an apparatus (1) for the timing of signals (2), preferably of signals (2) including fast changing disturbances, the apparatus (1) comprising a first timer (3)...
8559576 Adaptive synchronization circuit  
Embodiments of a synchronization circuit are described. This synchronization circuit includes multiple selectively coupled synchronization stages which are configurable to synchronize data and...
8560875 Apparatus for clock calibrating a less precise second clock signal with a more precise first clock signal wherein the first clock signal is inactive during a sniff mode and the second clock signal is active during a sniff mode  
An apparatus for clock calibration on a remote device includes a first oscillator, a second oscillator, and a clock calibration module. The first oscillator generates a first clock signal during an...
8554951 Synchronization and ordering of multiple accessess in a distributed system  
Several different embodiments of a massively scalable object storage system are described. The object storage system is particularly useful for storage in a cloud computing installation whereby...
8549535 Distributed taskflow architecture  
A method, a system and a product are disclosed for executing a taskflow in a distributed taskflow architecture and for providing the latter. In at least one embodiment, the taskflow is generated by...
8548616 Digital audio device  
A digital audio device has a plurality of input ports that are provided with a plurality of digital audio signals. A plurality of extraction parts extract a clock signal from the digital audio...
8543848 Reducing latency when activating a power supply unit  
A method for reducing latency using a charging module when activating a power supply unit (PSU) among a plurality of PSUs in a power supply system. The method includes: Receiving, by the PSU from a...
8543746 Self-synchronizing data streaming between address-based producer and consumer circuits  
A circuit arrangement and method facilitate the direct streaming of data between producer and consumer circuits (12P, 12C) that are otherwise configured to communicate over an address-based network...
8539275 Single wire serial interface  
A single wire serial interface for power ICs and other devices is provided. To use the interface, a device is configured to include an EN/SET input pin. A counter within the device counts clock...
8533515 Method and system for synchronizing multiple secure clocks using an average adjusted time of the secure clocks if the average adjusted time is within the limit intersection and using a substitute average adjusted time if the averaged adjusted time is outside the limit intersection  
A method for synchronizing secure clocks in a system without using any external clock, a system configured to perform the method, and a computer medium storing system code. Each secure clock is...
8533516 Low power radio controlled clock incorporating independent timing corrections  
A timekeeping device that tracks the time provided by a digital broadcast and the protocol of that broadcast, defined by its data frame structure and modulation scheme, are adapted to allow for...
8533522 Double data rate output circuit  
A synchronization circuit for re-synchronizing data from an input clock to an output clock is presented. The first transparent latch receives data synchronized to an input clock. A second...
8533503 Managing power consumption in a multicore processor  
A method and computer-usable medium including instructions for performing a method of managing power consumption in a multicore processor comprising a plurality of processor elements with at least...
8527804 Architecture and method for eliminating store buffers in a DSP/processor with multiple memory accesses  
A method and apparatus for controlling system access to a memory that includes receiving first and second instructions, and evaluating whether both instructions can architecturally complete. When...
8527802 Memory device data latency circuits and methods  
A memory device can include a data path that includes a first-in-first-out circuit (FIFO) to transfer data according to a latency between at least one memory cell array and signal connections of...
8522058 Computer system with power source control and power source control method  
A computer system with power source control and a power source control method are presented. The computer system at least includes a first storage unit and a second storage unit, and the first...
8521925 Method and communication system for determining the time of an event in an IO device  
A method and communication system that provide an inexpensive approach that enables the times of events that are detected in IO device to be determined in a higher-level controller. The...
8516290 Clocking scheme for bridge system  
Various techniques are provided for bridging interfaces, such as different interfaces for use with a host device. In one example, a system includes an asynchronous first interface adapted to...
8514098 Synchronization between devices  
The present disclosure relates to a method to determine a clock signal when separate clocks are used. In one embodiment, a disciplined clock system comprising an update subsystem and a synthesis...
8516292 Method and apparatus for providing symmetrical output data for a double data rate DRAM  
An apparatus and method is disclosed to compensate for skew and asymmetry of a locally processed system clock used to synchronize an output signal, e.g., a data signal or a timing signal, from a...
8516276 Apparatus and method for controlling power supplied to fixing unit  
An apparatus and method for controlling the power supplied to a fixing unit are provided. The apparatus includes a voltage detector detecting a voltage of input power supplied to heat at least one...
8516291 Information processing apparatus, data reception device and method of controlling the information processing apparatus  
A clock adjustment circuit delays a phase of a clock signal on the basis of a TAP value so as to output an adjusted clock signal. By synchronizing transmission data with the adjusted clock signal,...