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7120806 |
Method for setting a power operating mode transition interval of a disk drive in a mobile device based on application category
The invention may be embodied in a method for operating a disk drive in a mobile device to optimize power usage based on an application category. The mobile device may be a hand held computing...
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7120808 |
Information processing apparatus and method, as well as program
Performing power saving control which can be inherited and standardized easily, and which keeps power devices from having to become larger is made possible. A current In flowing through an...
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7117379 |
Method and apparatus for a computing system having an active sleep mode
An apparatus is described. The apparatus includes a computing system having a normal active mode and an active sleep mode. The active sleep mode consumes less power than the normal active mode. The...
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7117380 |
Apparatus, system, and method for autonomic power adjustment in an electronic device
An apparatus, a system, and a method are provided for autonomic power adjustment in an electronic device. The apparatus, system, and method include a collector configured to collect indicia of a...
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7114090 |
Computing system with operational low power states
A method is described that involves operating a computing system within a normal on state and transitioning from the normal on state to a main CPU/OS based state. In the main CPU/OS based state one...
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7114086 |
System for reduced power consumption by monitoring instruction buffer and method thereof
A system and method are provided for reducing power consumption within a video processing portion of a system. Activity associated with an instruction buffer is monitored to determine whether power...
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7114088 |
Circuit and method for the input of a start signal for a controller
A circuit and method for the input of a start signal, a controller being transferred from a first state into a second state as a function of the start signal, the energy consumption of the...
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7111178 |
Method and apparatus for adjusting the voltage and frequency to minimize power dissipation in a multiprocessor system
A method for adjusting the voltage and frequency to minimize power dissipation in a processor. The method of one embodiment comprises determining a power consumption value. The power consumption...
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RE39252 |
Instruction dependent clock scheme
A method and apparatus including a first circuit configured to receive multiple instructions including a first instruction having a first execution time, and to generate a first signal having a...
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7100061 |
Adaptive power control
A method for controlling the power used by a computer including the steps of measuring the operating characteristics of a central processor of the computer, determining when the operating...
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7100060 |
Techniques for utilization of asymmetric secondary processing resources
A processor having asymmetric secondary processing resources. One disclosed embodiment includes a first execution resource to perform a first function and a second execution resource that also...
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7100063 |
Low power operation control unit and program optimizing apparatus
An objective is to perform a low power operation of a microprocessor on the pipeline stage of an instruction decode and a preceding pipeline stage without the necessity for increasing a circuit...
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7100062 |
Power management controller and method
A power management controller for conserving power in a device implementing power conservation states and a calendar-scheduler is disclosed. The calendar-scheduler records calendar-based events...
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7096373 |
System and method for optimizing clock speed generation in a computer
The present invention relates to a method of reducing a clock speed of a host bus to extend battery life and its operating time when a battery is supplying electric energy for a portable computer....
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7096374 |
Method and apparatus for defining an input state vector that achieves low power consumption in digital circuit in an idle state
The method defines an input state vector that achieves low power consumption when applied to the circuit inputs of a digital circuit in an idle state. The digital circuit includes one or more...
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7093149 |
Tiered secondary memory architecture to reduce power consumption in a portable computer system
A computer system that optimizes the power efficiency of a portable computer system is described. Specifically, the secondary memory of the system is partitioned. A standard hard disk drive is used...
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7093153 |
Method and apparatus for lowering bus clock frequency in a complex integrated data processing system
A data processing system ( 100 ) comprises a system bus ( 120 ), a plurality of devices ( 110, 150, 160, 170 ) coupled to the system bus ( 120 ), a bus monitor circuit ( 140 ), and a clock...
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7093148 |
Microcontroller Operable in normal and low speed modes utilizing control signals for executing commands in a read-only memory during the low speed modes
A microcontroller includes a clock circuit with a register storing clock frequency information corresponding to a low speed or normal mode respectively operated by a low frequency or normal clock,...
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7089432 |
Method for operating a processor at first and second rates depending upon whether the processor is executing code to control predetermined hard drive operations
Clock speed of the processor in a hard disk drive is controlled during run time to optimize the trade-off between minimizing power consumption and maximizing performance. Processor clock speed is...
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7089443 |
Multiple clock domain microprocessor
A multiple clock domain (MCD) microarchitecture uses a globally-asynchronous, locally-synchronous (GALS) clocking style. In an MCD microprocessor each functional block operates with a separately...
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7089438 |
Circuit, system and method for selectively turning off internal clock drivers
The present invention includes a circuit, system and method for selectively turning off internal clock drivers to reduce operating current. The present invention may be used to reduce power...
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7089430 |
Managing multiple processor performance states
In one embodiment of the invention, a performance information associated with a processor is read. A processor performance table that corresponds to the performance information is located. The...
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7089437 |
Apparatus for determining power consumed by a bus of a digital signal processor using counted number of logic state transitions on bus
In order to measure the power consumed by a bus in a digital signal processor, each bus conductor has a lead electrically coupled thereto. The lead is coupled to apparatus that provides a signal...
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7085941 |
Clock control apparatus and method, for a memory controller, that processes a block access into single continuous macro access while minimizing power consumption
A clock control apparatus for a memory controller comprises an interface unit which processes a block access to a plurality of banks of an SDRAM as a single continuous macro access in order to...
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7085944 |
Power management by transmitting single multiplexed signal to multiple system components to change settings of internal performance registers in response to change in power source
A method and apparatus to detect a power change in a system (e.g. computer) and to automatically adjust, in response to the power change, the performance states (e.g. supply voltages, clock...
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7085946 |
Backup memory control unit with reduced current consumption having normal self-refresh and unsettled modes of operation
A backup memory control unit can reduce the current consumption when a memory (SDRAM) is inactive by providing the memory with an unsettled mode in which no power is supplied to the memory. It...
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7082542 |
Power management using processor throttling emulation
In one embodiment of the invention, a processor state of a processor is determined upon expiration of a system management interrupt (SMI) timer. The processor state is one of an operational state...
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7080269 |
Method and apparatus for implementing power-saving sleep mode in design with multiple clock domains
A system and a method are provided for implementing a power-saving sleep mode in a synchronous circuit core having multiple clock domains including primary and secondary clock domains. The primary...
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7076671 |
Managing an operating frequency of processors in a multi-processor computer system
In a system, method and apparatus for the frequency management of processors in a multi-processor (MP) computer system, a first processor requiring a first level of performance is operated at a...
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7076674 |
Portable computer having dual clock mode
The present invention provides a portable computer. In one aspect, the portable computer has a first power mode and a second power mode. The portable computer includes a memory bus and a control...
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7076683 |
Clock control circuit for controlling an oscillation circuit in a data transfer control device according to states of a first device and a second device
An oscillation circuit generates a reference clock signal for a clock signal supplied to each section of a data transfer control device. In a clock output control circuit, a clock command is...
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7076672 |
Method and apparatus for performance effective power throttling
An apparatus to determine if a temperature of an electronic device is equal to or exceeds a predetermined threshold. In response to detecting the temperature of the electronic device has at least...
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7073081 |
Methods and apparatus for conserving battery power in an electronic shelf label system
An electronic price label (ESL) system with a reduced power consumption ESL is described. In one aspect, an ESL system and method conserves battery power by removing power from certain ESL...
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7073084 |
Data processing apparatus
A data processing apparatus has a first processing unit for processing an input data, a second processing unit responsive to the data processed by the first processing unit for executing a...
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7069463 |
Bus clock controlling apparatus and method
The present invention relates to an apparatus and method for throttling a clock of a bus used for data exchange between devices in a computer such as a portable computer or notebook. Methods...
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7069461 |
Closed-loop, supply-adjusted RAM memory circuit
The supply voltage of a memory system is adjusted in response to changes in the frequency of the clock signal. The memory system measures a time from when data becomes valid on the output of a...
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7069359 |
Circuit and technique to stall the communication of data over a double pumped bus
An apparatus includes a first circuit and a second circuit. The first circuit receives indications of first data that is associated with a first data set and second data that is associated with a...
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7065662 |
Information handling system featuring a power-based current limiting circuit
A method of implementing a power-based current limiting circuit in an information handling system includes providing a power supply having an output voltage operating range that can vary between a...
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7062394 |
Performance characterization using effective processor frequency
An embodiment of the present invention includes a method to analyze processor performance. A processor is saturated with a workload. The processor has a specified operating frequency and a thermal...
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7062665 |
Control of voltage regulator thermal condition
A system and method for automatically adjusting microprocessor activity following thermal stress of a voltage regulator is disclosed. A thermal monitoring circuit determines whether the voltage...
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7062663 |
Voltage regulation in an integrated circuit
The invention relates to power regulation of integrated circuits such as microprocessors. It suggests measuring instantaneous power consumption inside of the integrated circuit ( 13 ), by sensing...
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7062666 |
Signal-initiated method for suspending operation of a pipelined data processor
A signal-initiated method for suspending operation of a pipelined data processor by selectively disabling a clock signal to pipeline subcircuitry in response to at least one control signal.
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7058828 |
System, method and apparatus for the frequency management of blades in a bladed architecture based on performance requirements
In a system, method and apparatus for managing the operating frequency of blades in a blade-based computer system based upon performance requirements, a first blade that requires a specific power...
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7058830 |
Power saving in a floating point unit using a multiplier and aligner bypass
The present invention provides for saving power in a floating point unit. Bypass logic is coupled to the input of the aligner and the multiplier. An aligner bypass is coupled to the output of the...
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7058832 |
Idle power reduction for state machines
A state machine provides a power reducing capability by turning off a clock signal to a memory which stores the state of the state machine. Preferably, the state machine is connected to receive...
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7058824 |
Method and system for using idle threads to adaptively throttle a computer
A method and system for adaptively throttling a computer is provided. Prior CPU utilization is calculated when a CPU enters an idle state. If the prior CPU utilization warrants a change in the CPU...
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7055049 |
Portable computer with low-power audio CD-player
A system and method to reduce power consumption in a portable computer system while allowing the CDROM drive to continue playing audio CDs. When the system enters a suspend mode, the status of the...
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7051218 |
Message based power management
A message based power management system converts legacy signals used in power management, and other signals used to differentiate between power states, to messages sent over a communication link. A...
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7050959 |
Dynamic thermal management for integrated circuits
The present invention provides for dynamic thermal management of integrated circuits, including memory modules, within a computer system. The thermal management methodology described herein closely...
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7051227 |
Method and apparatus for reducing clock frequency during low workload periods
A clock frequency control unit for an integrated circuit (IC) includes a clock generator, a finite state machine (FSM), and a gating circuit (GC). The FSM has at least first and second states...
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